sd_card_spi.cpp 8.5 KB

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  1. // Driver and interface for accessing SD card in SPI mode
  2. // Used on BlueSCSI v1.0.
  3. #include "BlueSCSI_platform.h"
  4. #include "BlueSCSI_log.h"
  5. #include "gd32f20x_spi.h"
  6. #include "gd32f20x_dma.h"
  7. #include <SdFat.h>
  8. #ifndef SD_USE_SDIO
  9. class GD32SPIDriver : public SdSpiBaseClass
  10. {
  11. public:
  12. void begin(SdSpiConfig config) {
  13. rcu_periph_clock_enable(RCU_SPI0);
  14. rcu_periph_clock_enable(RCU_DMA0);
  15. dma_parameter_struct rx_dma_config =
  16. {
  17. .periph_addr = (uint32_t)&SPI_DATA(SD_SPI),
  18. .periph_width = DMA_PERIPHERAL_WIDTH_8BIT,
  19. .memory_addr = 0, // Set before transfer
  20. .memory_width = DMA_MEMORY_WIDTH_8BIT,
  21. .number = 0, // Set before transfer
  22. .priority = DMA_PRIORITY_ULTRA_HIGH,
  23. .periph_inc = DMA_PERIPH_INCREASE_DISABLE,
  24. .memory_inc = DMA_MEMORY_INCREASE_ENABLE,
  25. .direction = DMA_PERIPHERAL_TO_MEMORY
  26. };
  27. dma_init(DMA0, SD_SPI_RX_DMA_CHANNEL, &rx_dma_config);
  28. dma_parameter_struct tx_dma_config =
  29. {
  30. .periph_addr = (uint32_t)&SPI_DATA(SD_SPI),
  31. .periph_width = DMA_PERIPHERAL_WIDTH_8BIT,
  32. .memory_addr = 0, // Set before transfer
  33. .memory_width = DMA_MEMORY_WIDTH_8BIT,
  34. .number = 0, // Set before transfer
  35. .priority = DMA_PRIORITY_HIGH,
  36. .periph_inc = DMA_PERIPH_INCREASE_DISABLE,
  37. .memory_inc = DMA_MEMORY_INCREASE_ENABLE,
  38. .direction = DMA_MEMORY_TO_PERIPHERAL
  39. };
  40. dma_init(DMA0, SD_SPI_TX_DMA_CHANNEL, &tx_dma_config);
  41. }
  42. void activate() {
  43. spi_parameter_struct config = {
  44. SPI_MASTER,
  45. SPI_TRANSMODE_FULLDUPLEX,
  46. SPI_FRAMESIZE_8BIT,
  47. SPI_NSS_SOFT,
  48. SPI_ENDIAN_MSB,
  49. SPI_CK_PL_LOW_PH_1EDGE,
  50. SPI_PSC_256
  51. };
  52. // Select closest available divider based on system frequency
  53. int divider = (SystemCoreClock + m_sckfreq / 2) / m_sckfreq;
  54. if (divider <= 2)
  55. config.prescale = SPI_PSC_2;
  56. else if (divider <= 4)
  57. config.prescale = SPI_PSC_4;
  58. else if (divider <= 8)
  59. config.prescale = SPI_PSC_8;
  60. else if (divider <= 16)
  61. config.prescale = SPI_PSC_16;
  62. else if (divider <= 32)
  63. config.prescale = SPI_PSC_32;
  64. else if (divider <= 64)
  65. config.prescale = SPI_PSC_64;
  66. else if (divider <= 128)
  67. config.prescale = SPI_PSC_128;
  68. else
  69. config.prescale = SPI_PSC_256;
  70. spi_init(SD_SPI, &config);
  71. spi_enable(SD_SPI);
  72. }
  73. void deactivate() {
  74. spi_disable(SD_SPI);
  75. }
  76. void wait_idle() {
  77. while (!(SPI_STAT(SD_SPI) & SPI_STAT_TBE));
  78. while (SPI_STAT(SD_SPI) & SPI_STAT_TRANS);
  79. }
  80. // Single byte receive
  81. uint8_t receive() {
  82. // Wait for idle and clear RX buffer
  83. wait_idle();
  84. (void)SPI_DATA(SD_SPI);
  85. // Send dummy byte and wait for receive
  86. SPI_DATA(SD_SPI) = 0xFF;
  87. while (!(SPI_STAT(SD_SPI) & SPI_STAT_RBNE));
  88. return SPI_DATA(SD_SPI);
  89. }
  90. // Single byte send
  91. void send(uint8_t data) {
  92. SPI_DATA(SD_SPI) = data;
  93. wait_idle();
  94. }
  95. // Multiple byte receive
  96. uint8_t receive(uint8_t* buf, size_t count)
  97. {
  98. // Wait for idle and clear RX buffer
  99. wait_idle();
  100. (void)SPI_DATA(SD_SPI);
  101. // Check if this is part of callback streaming request
  102. bool stream = false;
  103. if (m_stream_callback && buf == m_stream_buffer + m_stream_count)
  104. {
  105. stream = true;
  106. }
  107. else if (m_stream_callback)
  108. {
  109. bluedbg("Stream buffer mismatch: ", (uint32_t)buf, " vs. ", (uint32_t)(m_stream_buffer + m_stream_count));
  110. }
  111. // Use DMA to stream dummy TX data and store RX data
  112. uint8_t tx_data = 0xFF;
  113. DMA_INTC(DMA0) = DMA_FLAG_ADD(DMA_FLAG_FTF | DMA_FLAG_ERR, SD_SPI_RX_DMA_CHANNEL);
  114. DMA_INTC(DMA0) = DMA_FLAG_ADD(DMA_FLAG_FTF | DMA_FLAG_ERR, SD_SPI_TX_DMA_CHANNEL);
  115. DMA_CHMADDR(DMA0, SD_SPI_RX_DMA_CHANNEL) = (uint32_t)buf;
  116. DMA_CHMADDR(DMA0, SD_SPI_TX_DMA_CHANNEL) = (uint32_t)&tx_data;
  117. DMA_CHCTL(DMA0, SD_SPI_TX_DMA_CHANNEL) &= ~DMA_CHXCTL_MNAGA; // No memory increment for TX
  118. DMA_CHCNT(DMA0, SD_SPI_RX_DMA_CHANNEL) = count;
  119. DMA_CHCNT(DMA0, SD_SPI_TX_DMA_CHANNEL) = count;
  120. DMA_CHCTL(DMA0, SD_SPI_RX_DMA_CHANNEL) |= DMA_CHXCTL_CHEN;
  121. DMA_CHCTL(DMA0, SD_SPI_TX_DMA_CHANNEL) |= DMA_CHXCTL_CHEN;
  122. SPI_CTL1(SD_SPI) |= SPI_CTL1_DMAREN | SPI_CTL1_DMATEN;
  123. uint32_t start = millis();
  124. while (!(DMA_INTF(DMA0) & DMA_FLAG_ADD(DMA_FLAG_FTF | DMA_FLAG_ERR, SD_SPI_RX_DMA_CHANNEL)))
  125. {
  126. if (millis() - start > 500)
  127. {
  128. bluelog("ERROR: SPI DMA receive of ", (int)count, " bytes timeouted");
  129. return 1;
  130. }
  131. if (stream)
  132. {
  133. uint32_t complete = m_stream_count + (count - DMA_CHCNT(DMA0, SD_SPI_RX_DMA_CHANNEL));
  134. m_stream_callback(complete);
  135. }
  136. }
  137. if (DMA_INTF(DMA0) & DMA_FLAG_ADD(DMA_FLAG_ERR, SD_SPI_RX_DMA_CHANNEL))
  138. {
  139. bluelog("ERROR: SPI DMA receive set DMA_FLAG_ERR");
  140. }
  141. SPI_CTL1(SD_SPI) &= ~(SPI_CTL1_DMAREN | SPI_CTL1_DMATEN);
  142. DMA_CHCTL(DMA0, SD_SPI_RX_DMA_CHANNEL) &= ~DMA_CHXCTL_CHEN;
  143. DMA_CHCTL(DMA0, SD_SPI_TX_DMA_CHANNEL) &= ~DMA_CHXCTL_CHEN;
  144. if (stream)
  145. {
  146. m_stream_count += count;
  147. }
  148. return 0;
  149. }
  150. // Multiple byte send
  151. void send(const uint8_t* buf, size_t count) {
  152. // Check if this is part of callback streaming request
  153. bool stream = false;
  154. if (m_stream_callback && buf == m_stream_buffer + m_stream_count)
  155. {
  156. stream = true;
  157. }
  158. else if (m_stream_callback)
  159. {
  160. bluedbg("Stream buffer mismatch: ", (uint32_t)buf, " vs. ", (uint32_t)(m_stream_buffer + m_stream_count));
  161. }
  162. // Use DMA to stream TX data
  163. DMA_INTC(DMA0) = DMA_FLAG_ADD(DMA_FLAG_FTF | DMA_FLAG_ERR, SD_SPI_TX_DMA_CHANNEL);
  164. DMA_CHMADDR(DMA0, SD_SPI_TX_DMA_CHANNEL) = (uint32_t)buf;
  165. DMA_CHCTL(DMA0, SD_SPI_TX_DMA_CHANNEL) |= DMA_CHXCTL_MNAGA; // Memory increment for TX
  166. DMA_CHCNT(DMA0, SD_SPI_TX_DMA_CHANNEL) = count;
  167. DMA_CHCTL(DMA0, SD_SPI_TX_DMA_CHANNEL) |= DMA_CHXCTL_CHEN;
  168. SPI_CTL1(SD_SPI) |= SPI_CTL1_DMATEN;
  169. uint32_t start = millis();
  170. while (!(DMA_INTF(DMA0) & DMA_FLAG_ADD(DMA_FLAG_FTF | DMA_FLAG_ERR, SD_SPI_TX_DMA_CHANNEL)))
  171. {
  172. if (millis() - start > 500)
  173. {
  174. bluelog("ERROR: SPI DMA transmit of ", (int)count, " bytes timeouted");
  175. return;
  176. }
  177. if (stream)
  178. {
  179. uint32_t complete = m_stream_count + (count - DMA_CHCNT(DMA0, SD_SPI_TX_DMA_CHANNEL));
  180. m_stream_callback(complete);
  181. }
  182. }
  183. if (DMA_INTF(DMA0) & DMA_FLAG_ADD(DMA_FLAG_ERR, SD_SPI_TX_DMA_CHANNEL))
  184. {
  185. bluelog("ERROR: SPI DMA transmit set DMA_FLAG_ERR");
  186. }
  187. wait_idle();
  188. SPI_CTL1(SD_SPI) &= ~(SPI_CTL1_DMAREN | SPI_CTL1_DMATEN);
  189. DMA_CHCTL(DMA0, SD_SPI_TX_DMA_CHANNEL) &= ~DMA_CHXCTL_CHEN;
  190. if (stream)
  191. {
  192. m_stream_count += count;
  193. }
  194. }
  195. void setSckSpeed(uint32_t maxSck) {
  196. m_sckfreq = maxSck;
  197. }
  198. void set_sd_callback(sd_callback_t func, const uint8_t *buffer)
  199. {
  200. m_stream_buffer = buffer;
  201. m_stream_count = 0;
  202. m_stream_callback = func;
  203. }
  204. private:
  205. uint32_t m_sckfreq;
  206. const uint8_t *m_stream_buffer;
  207. uint32_t m_stream_count;
  208. sd_callback_t m_stream_callback;
  209. };
  210. void sdCsInit(SdCsPin_t pin)
  211. {
  212. }
  213. void sdCsWrite(SdCsPin_t pin, bool level)
  214. {
  215. if (level)
  216. GPIO_BOP(SD_PORT) = SD_CS_PIN;
  217. else
  218. GPIO_BC(SD_PORT) = SD_CS_PIN;
  219. }
  220. GD32SPIDriver g_sd_spi_port;
  221. SdSpiConfig g_sd_spi_config(0, DEDICATED_SPI, SD_SCK_MHZ(30), &g_sd_spi_port);
  222. void bluescsiplatform_set_sd_callback(sd_callback_t func, const uint8_t *buffer)
  223. {
  224. g_sd_spi_port.set_sd_callback(func, buffer);
  225. }
  226. // Check if a DMA request for SD card read has completed.
  227. // This is used to optimize the timing of data transfers on SCSI bus.
  228. bool check_sd_read_done()
  229. {
  230. return (DMA_CHCTL(DMA0, SD_SPI_RX_DMA_CHANNEL) & DMA_CHXCTL_CHEN)
  231. && (DMA_INTF(DMA0) & DMA_FLAG_ADD(DMA_FLAG_FTF, SD_SPI_RX_DMA_CHANNEL));
  232. }
  233. #endif