f7: Define new 'ext_ram' section to allocate data to SRAM1/SRAM2

Note that these areas are cached by the ARM CPU, and since the
cache does not automatically maintain coherency with DMA operations,
don't do DMA to or from ext_ram!!

bootloader/Bootloader.ld.S

@@ -3,15 +3,11 @@
 
 #define FLASH_BASE 0x08000000
 #define FLASH_LEN  8K
-#define RAM_BASE   0x20000000
-#define RAM_LEN    20K
 
 #elif STM32F == 7
 
 #define FLASH_BASE 0x08000000
 #define FLASH_LEN  16K
-#define RAM_BASE   0x20000000
-#define RAM_LEN    64K
 
 #endif
 

inc/stm32/f7.h

@@ -84,6 +84,8 @@ void peripheral_clock_delay(void);
 
 void gpio_set_af(GPIO gpio, unsigned int pin, unsigned int af);
 
+#define section_ext_ram __attribute__((section(".ext_ram")))
+
 /*
  * Local variables:
  * mode: C

scripts/stm32.ld.S

@@ -3,10 +3,13 @@ ENTRY(vector_table)
 MEMORY
 {
   FLASH (rx)      : ORIGIN = FLASH_BASE, LENGTH = FLASH_LEN
-  RAM (rwx)       : ORIGIN = RAM_BASE, LENGTH = RAM_LEN
+#if STM32F == 1
+  RAM (rwx)       : ORIGIN = 0x20000000, LENGTH = 20K
+#elif STM32F == 7
+  RAM (rwx)       : ORIGIN = 0x20000000, LENGTH = 64K
+  EXT_RAM (rwx)   : ORIGIN = 0x20010000, LENGTH = 192K
+#endif
 }
-REGION_ALIAS("RO", FLASH);
-REGION_ALIAS("RW", RAM);
 
 SECTIONS
 {
@@ -21,7 +24,7 @@ SECTIONS
     KEEP (*(.fini))
     . = ALIGN(4);
     _etext = .;
-  } >RO
+  } >FLASH
 
   .data : AT (_etext) {
     . = ALIGN(4);
@@ -31,7 +34,7 @@ SECTIONS
     . = ALIGN(4);
     _edat = .;
     _ldat = LOADADDR(.data);
-  } >RW
+  } >RAM
 
   .bss : {
     . = ALIGN(8);
@@ -46,7 +49,17 @@ SECTIONS
     *(.bss*)
     . = ALIGN(4);
     _ebss = .;
-  } >RW
+  } >RAM
+
+#if STM32F == 7
+  .ext_ram (NOLOAD) : {
+    . = ALIGN(8);
+    _ext_ram_start = .;
+    *(.ext_ram)
+    . = ALIGN(4);
+    _ext_ram_end = .;
+  } >EXT_RAM
+#endif
 
   /DISCARD/ : {
     *(.eh_frame)

src/Greaseweazle.ld.S

@@ -3,15 +3,11 @@
 
 #define FLASH_BASE 0x08002000
 #define FLASH_LEN  56K
-#define RAM_BASE   0x20000000
-#define RAM_LEN    20K
 
 #elif STM32F == 7
 
 #define FLASH_BASE 0x08004000
 #define FLASH_LEN  48K
-#define RAM_BASE   0x20000000
-#define RAM_LEN    64K
 
 #endif
 

src/floppy.c

@@ -88,9 +88,6 @@ static enum {
     ST_sink_bytes,
 } floppy_state = ST_inactive;
 
-/* We sometimes cast u_buf to uint32_t[], hence the alignment constraint. */
-#define U_BUF_SZ 8192
-static uint8_t u_buf[U_BUF_SZ] aligned(4);
 static uint32_t u_cons, u_prod;
 #define U_MASK(x) ((x)&(U_BUF_SZ-1))
 

src/floppy_f1.c

@@ -57,6 +57,10 @@ typedef uint16_t timcnt_t;
 #define irq_index 23
 void IRQ_23(void) __attribute__((alias("IRQ_INDEX_changed"))); /* EXTI9_5 */
 
+/* We sometimes cast u_buf to uint32_t[], hence the alignment constraint. */
+#define U_BUF_SZ 8192
+static uint8_t u_buf[U_BUF_SZ] aligned(4);
+
 static void floppy_mcu_init(void)
 {
     /* Determine whether input pins must be internally pulled down. */

src/floppy_f7.c

@@ -61,6 +61,10 @@ typedef uint32_t timcnt_t;
 #define irq_index 8
 void IRQ_8(void) __attribute__((alias("IRQ_INDEX_changed"))); /* EXTI2 */
 
+/* We sometimes cast u_buf to uint32_t[], hence the alignment constraint. */
+#define U_BUF_SZ (128*1024)
+static uint8_t u_buf[U_BUF_SZ] aligned(4) section_ext_ram;
+
 static void floppy_mcu_init(void)
 {
     /* Enable clock for Timer 2. */

src/usb/hw_dwc_otg.c

@@ -16,7 +16,7 @@ static bool_t is_hs;
 static struct rx_buf {
     uint32_t data[USB_HS_MPS / 4];
     uint32_t count;
-} rx_buf0[1], rx_bufn[32];
+} rx_buf0[1], rx_bufn[32] section_ext_ram;
 
 #define RX_MASK(_ep, _idx) (((_ep)->_idx) & ((_ep)->rx_nr - 1))