 H. Peter Anvin
|
9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
|
il y a 2 ans |
|
H. Peter Anvin
|
ee45852b85
Full infrastructure for updating flash via JTAG SVF
|
il y a 3 ans |
|
H. Peter Anvin
|
e1c53dfb56
vjtag: allow both SRAM and DRAM to be accessed over VJTAG
|
il y a 3 ans |
|
H. Peter Anvin
|
8ba4a1a3de
vjtag: fix "one bit behind" problem for write properly; use sys_clk
|
il y a 3 ans |
|
H. Peter Anvin
|
47300bdbed
vjtag: require a synchronization prefix to write to memory
|
il y a 3 ans |
|
H. Peter Anvin
|
37de408c19
Allow the CPU to force an FPGA reload; vjtag improvement
|
il y a 3 ans |
