|  H. Peter Anvin | 6db45e74e6
							
							WIP: build both v1 and v2 | 3 年 前 | 
				
					
						|  H. Peter Anvin | 75a6dbc7fa
							
							fpga: infrastructure for building v1 and v2 FPGA | 3 年 前 | 
				
					
						|  H. Peter Anvin | 4e65673781
							
							spirom: add support for sending arbitrary SPI commands | 3 年 前 | 
				
					
						|  H. Peter Anvin | a5abfc202c
							
							reset: don't reset USB of soft reset; soft reset on input BREAK | 3 年 前 | 
				
					
						|  H. Peter Anvin | 3dfb6626a1
							
							More clock tree changes; fix rng oscillator sources | 3 年 前 | 
				
					
						|  H. Peter Anvin | cc37f87c67
							
							sdram: rewrite as parameterized ports; usb: add USB core for testing | 3 年 前 |