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max80_fw
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Albero (Tree):
aae59a22f3
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cleanup-start
dma-queue
esplink
i2c
main
newpagemap
newqreg
setverwww
simpleio
slow
sysvars
uart-rework
unaligned
v1.2
v1.1
v1.0
v0.0
Cronologia Commit
Cerca
Autore
SHA1
Messaggio
Data
H. Peter Anvin
980eaf0400
Restructure clock tree; better sdram timing; random number generator
3 anni fa
H. Peter Anvin
4000a82467
video: explicitly make the clock a "data" output
3 anni fa
H. Peter Anvin
0b53cefc85
video: revert to outputting "real" data on the HDMI channels
3 anni fa
H. Peter Anvin
74d9da52b0
hdmi/tmds: fix symbol data ordering
3 anni fa
H. Peter Anvin
8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
3 anni fa
H. Peter Anvin
510e702728
video: initial simple video generator; add support for HDMI TERC4
3 anni fa