 H. Peter Anvin
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980eaf0400
Restructure clock tree; better sdram timing; random number generator
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3 anni fa |
|
H. Peter Anvin
|
4000a82467
video: explicitly make the clock a "data" output
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3 anni fa |
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H. Peter Anvin
|
0b53cefc85
video: revert to outputting "real" data on the HDMI channels
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3 anni fa |
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H. Peter Anvin
|
74d9da52b0
hdmi/tmds: fix symbol data ordering
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3 anni fa |
|
H. Peter Anvin
|
8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
|
3 anni fa |
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H. Peter Anvin
|
510e702728
video: initial simple video generator; add support for HDMI TERC4
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3 anni fa |
