 H. Peter Anvin
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8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
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il y a 3 ans |
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H. Peter Anvin
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510e702728
video: initial simple video generator; add support for HDMI TERC4
|
il y a 3 ans |
|
H. Peter Anvin
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23a7324677
hdmi: slow down to 60 MHz (120 Mbaud, 96 Mbps) for testing
|
il y a 3 ans |
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H. Peter Anvin
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996bd201be
Timing improvements: wait state for iodev, fix handling of sr_clk
|
il y a 3 ans |
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H. Peter Anvin
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42f4ad6376
Make downloader work; use PLL for SDRAM clock offset
|
il y a 3 ans |
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H. Peter Anvin
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f476073603
SPI ROM -> SDRAM download unit (not quite working yet?)
|
il y a 3 ans |
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H. Peter Anvin
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062a3d9eb1
Reorganize tree so a single Makefile can do the right thing
|
il y a 3 ans |
