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greybox
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980eaf0400
Restructure clock tree; better sdram timing; random number generator
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%!s(int64=3) %!d(string=hai) anos |
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simulation
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2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1
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%!s(int64=2) %!d(string=hai) anos |
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synthesis
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2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1
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%!s(int64=2) %!d(string=hai) anos |
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int_osc.csv
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2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1
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%!s(int64=2) %!d(string=hai) anos |
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int_osc.html
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2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1
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%!s(int64=2) %!d(string=hai) anos |
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int_osc.spd
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980eaf0400
Restructure clock tree; better sdram timing; random number generator
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%!s(int64=3) %!d(string=hai) anos |
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int_osc.xml
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2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1
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%!s(int64=2) %!d(string=hai) anos |
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int_osc_inst.vhd
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980eaf0400
Restructure clock tree; better sdram timing; random number generator
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%!s(int64=3) %!d(string=hai) anos |
H. Peter Anvin
2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1