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ip
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8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
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il y a 3 ans |
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output_files
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8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
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il y a 3 ans |
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scripts
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27454bdbd3
qsfdeps.pl: ignore Signaltap files
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il y a 3 ans |
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simulation
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f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
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il y a 3 ans |
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.gitignore
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e32df0c25b
Remove max80.map from tree
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il y a 3 ans |
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Makefile
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05cb5b3547
make flash: re-initialize the FPGA after flash complete
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il y a 3 ans |
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abcbus.sv
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f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
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il y a 3 ans |
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fast_mem.sv
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dd69eafb99
Many timing fixes; better IRQ handling for abcbus
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il y a 3 ans |
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functions.sv
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f2060589ab
Default baud rate = 115200, baud rate programmable
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il y a 3 ans |
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i2c.sv
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4970fb6ef6
rtc: issue dummy clock cycles if SDA appears stuck
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il y a 3 ans |
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iodevs.vh
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1dfcf38fed
sdcard: attempt to handle insertion and removal
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il y a 3 ans |
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max80.pins
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2f3640b11c
fpga: rename abc_master to abc_host
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il y a 3 ans |
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max80.qpf
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062a3d9eb1
Reorganize tree so a single Makefile can do the right thing
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il y a 3 ans |
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max80.qsf
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0edc64a9c8
abcio, abcdisk: revamp callback interface, fix abcdisk state machine
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il y a 3 ans |
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max80.sdc
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dd69eafb99
Many timing fixes; better IRQ handling for abcbus
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il y a 3 ans |
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max80.sv
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8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
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il y a 3 ans |
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max80jic.cof
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be3a50be52
sdcard: mount disk images, Makefile/ld: infrastructure for dram data
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il y a 3 ans |
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picorv32.v
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ec99762a84
Use waitirq rather than suspending a memory transaction for SD card
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il y a 3 ans |
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sdcard.sv
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ec99762a84
Use waitirq rather than suspending a memory transaction for SD card
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il y a 3 ans |
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sdram.sv
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6ae39aaf12
Make romcopy device programmable and able to zero memory
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il y a 3 ans |
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spi_master.sv
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062a3d9eb1
Reorganize tree so a single Makefile can do the right thing
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il y a 3 ans |
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spirom.sv
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f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
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il y a 3 ans |
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synchro.sv
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f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
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il y a 3 ans |
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sysclock.sv
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0271d2cd06
abcrtc: ABC-bus interface to RTC (currently readonly)
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il y a 3 ans |
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tmdsenc.sv
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74d9da52b0
hdmi/tmds: fix symbol data ordering
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il y a 3 ans |
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transpose.sv
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510e702728
video: initial simple video generator; add support for HDMI TERC4
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il y a 3 ans |
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tty.sv
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6ae39aaf12
Make romcopy device programmable and able to zero memory
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il y a 3 ans |
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video.sv
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74d9da52b0
hdmi/tmds: fix symbol data ordering
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il y a 3 ans |
H. Peter Anvin
74d9da52b0
hdmi/tmds: fix symbol data ordering