ABC80/max80_fw @ 82184216428afd0450bbe1334b33e3da198cc25c

H. Peter Anvin 8218421642 fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings		4 jaren geleden
..
ip	8218421642 fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings	4 jaren geleden
output_files	8218421642 fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings	4 jaren geleden
scripts	27454bdbd3 qsfdeps.pl: ignore Signaltap files	4 jaren geleden
simulation	f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again	4 jaren geleden
.gitignore	e32df0c25b Remove max80.map from tree	4 jaren geleden
Makefile	05cb5b3547 make flash: re-initialize the FPGA after flash complete	4 jaren geleden
abcbus.sv	f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again	4 jaren geleden
fast_mem.sv	dd69eafb99 Many timing fixes; better IRQ handling for abcbus	4 jaren geleden
functions.sv	f2060589ab Default baud rate = 115200, baud rate programmable	4 jaren geleden
i2c.sv	4970fb6ef6 rtc: issue dummy clock cycles if SDA appears stuck	4 jaren geleden
iodevs.vh	1dfcf38fed sdcard: attempt to handle insertion and removal	4 jaren geleden
max80.pins	2f3640b11c fpga: rename abc_master to abc_host	4 jaren geleden
max80.qpf	062a3d9eb1 Reorganize tree so a single Makefile can do the right thing	4 jaren geleden
max80.qsf	0edc64a9c8 abcio, abcdisk: revamp callback interface, fix abcdisk state machine	4 jaren geleden
max80.sdc	dd69eafb99 Many timing fixes; better IRQ handling for abcbus	4 jaren geleden
max80.sv	8218421642 fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings	4 jaren geleden
max80jic.cof	be3a50be52 sdcard: mount disk images, Makefile/ld: infrastructure for dram data	4 jaren geleden
picorv32.v	ec99762a84 Use waitirq rather than suspending a memory transaction for SD card	4 jaren geleden
sdcard.sv	ec99762a84 Use waitirq rather than suspending a memory transaction for SD card	4 jaren geleden
sdram.sv	6ae39aaf12 Make romcopy device programmable and able to zero memory	4 jaren geleden
spi_master.sv	062a3d9eb1 Reorganize tree so a single Makefile can do the right thing	4 jaren geleden
spirom.sv	f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again	4 jaren geleden
synchro.sv	f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again	4 jaren geleden
sysclock.sv	0271d2cd06 abcrtc: ABC-bus interface to RTC (currently readonly)	4 jaren geleden
tmdsenc.sv	510e702728 video: initial simple video generator; add support for HDMI TERC4	4 jaren geleden
transpose.sv	510e702728 video: initial simple video generator; add support for HDMI TERC4	4 jaren geleden
tty.sv	6ae39aaf12 Make romcopy device programmable and able to zero memory	4 jaren geleden
video.sv	8218421642 fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings	4 jaren geleden