SD card interface rewrite to improve compatibility with some SD cards.

- Fixed write problems with Samsung SD card controllers
- Added workaround to prevent timeouts on slow writes.
- Upgrade to PSoC Creator 3.1 and gcc 4.8.4

lib/SCSI2SD/CHANGELOG

@@ -1,3 +1,11 @@
+20150201		4.1
+	- Rewrite of the SD card interface to fix compatibility problems.
+		This fixes write issues with Samsung SD cards.
+	- Workaround for SCSI hosts that set 250ms timeouts. Some NCR53C80/53C9X
+	drivers (openbsd, netbsd, and others) set a byte-to-byte timeout which
+	can be exceeded by SD card latency.
+	- Upgrade to PSoC Creator 3.1 and gcc 4.8.4.
+
 20150108		4.0
 	- Fix handling requests for LUNs other than 0 from SCSI-2 hosts.
 	- Handle glitches of the scsi signals to improve stability and operate with

lib/SCSI2SD/software/SCSI2SD/src/config.c

@@ -17,6 +17,7 @@
 
 #include "device.h"
 #include "config.h"
+#include "debug.h"
 #include "USBFS.h"
 #include "led.h"
 
@@ -29,7 +30,7 @@
 
 #include <string.h>
 
-static const uint16_t FIRMWARE_VERSION = 0x0403;
+static const uint16_t FIRMWARE_VERSION = 0x0410;
 
 enum USB_ENDPOINTS
 {
@@ -99,12 +100,8 @@ writeFlashCommand(const uint8_t* cmd, size_t cmdSize)
 	}
 	else
 	{
-		uint8_t spcBuffer[CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE];
-		CyFlash_Start();
-		CySetFlashEEBuffer(spcBuffer);
 		CySetTemp();
 		int status = CyWriteRowData(flashArray, flashRow, cmd + 1);
-		CyFlash_Stop();
 
 		uint8_t response[] =
 		{
@@ -124,6 +121,15 @@ pingCommand()
 	hidPacket_send(response, sizeof(response));
 }
 
+static void
+sdInfoCommand()
+{
+	uint8_t response[sizeof(sdDev.csd) + sizeof(sdDev.cid)];
+	memcpy(response, sdDev.csd, sizeof(sdDev.csd));
+	memcpy(response + sizeof(sdDev.csd), sdDev.cid, sizeof(sdDev.cid));
+
+	hidPacket_send(response, sizeof(response));
+}
 static void
 processCommand(const uint8_t* cmd, size_t cmdSize)
 {
@@ -145,6 +151,10 @@ processCommand(const uint8_t* cmd, size_t cmdSize)
 		Bootloadable_1_Load();
 		break;
 
+	case CONFIG_SDINFO:
+		sdInfoCommand();
+		break;
+
 	case CONFIG_NONE: // invalid
 	default:
 		break;
@@ -262,7 +272,10 @@ void debugPoll()
 		hidBuffer[24] = scsiDev.cmdCount;
 		hidBuffer[25] = scsiDev.watchdogTick;
 		hidBuffer[26] = blockDev.state;
-		
+		hidBuffer[27] = scsiDev.lastSenseASC >> 8;
+		hidBuffer[28] = scsiDev.lastSenseASC;
+
+
 		hidBuffer[58] = sdDev.capacity >> 24;
 		hidBuffer[59] = sdDev.capacity >> 16;
 		hidBuffer[60] = sdDev.capacity >> 8;
@@ -300,6 +313,16 @@ void debugInit()
 	Debug_Timer_Start();
 }
 
+void debugPause()
+{
+	Debug_Timer_Stop();
+}
+
+void debugResume()
+{
+	Debug_Timer_Start();
+}
+
 // Public method for storing MODE SELECT results.
 void configSave(int scsiId, uint16_t bytesPerSector)
 {
@@ -317,16 +340,11 @@ void configSave(int scsiId, uint16_t bytesPerSector)
 			memcpy(rowCfgData, tgt, sizeof(rowData));
 			rowCfgData->bytesPerSector = bytesPerSector;
 
-
-			uint8_t spcBuffer[CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE];
-			CyFlash_Start();
-			CySetFlashEEBuffer(spcBuffer);
 			CySetTemp();
 			CyWriteRowData(
 				SCSI_CONFIG_ARRAY,
 				SCSI_CONFIG_0_ROW + (cfgIdx * SCSI_CONFIG_ROWS),
 				(uint8_t*)rowCfgData);
-			CyFlash_Stop();
 			return;
 		}
 	}

lib/SCSI2SD/software/SCSI2SD/src/debug.h

@@ -0,0 +1,25 @@
+//	Copyright (C) 2015 Michael McMaster <michael@codesrc.com>
+//
+//	This file is part of SCSI2SD.
+//
+//	SCSI2SD is free software: you can redistribute it and/or modify
+//	it under the terms of the GNU General Public License as published by
+//	the Free Software Foundation, either version 3 of the License, or
+//	(at your option) any later version.
+//
+//	SCSI2SD is distributed in the hope that it will be useful,
+//	but WITHOUT ANY WARRANTY; without even the implied warranty of
+//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//	GNU General Public License for more details.
+//
+//	You should have received a copy of the GNU General Public License
+//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
+#ifndef Debug_H
+#define Debug_H
+
+void debugInit(void);
+void debugPause(void);
+void debugResume(void);
+
+#endif
+

lib/SCSI2SD/software/SCSI2SD/src/disk.c

@@ -20,6 +20,8 @@
 #include "scsi.h"
 #include "scsiPhy.h"
 #include "config.h"
+#include "debug.h"
+#include "debug.h"
 #include "disk.h"
 #include "sd.h"
 #include "time.h"
@@ -486,6 +488,8 @@ int scsiDiskCommand()
 
 void scsiDiskPoll()
 {
+	debugPause(); // TODO comment re. timeouts.
+
 	if (scsiDev.phase == DATA_IN &&
 		transfer.currentBlock != transfer.blocks)
 	{
@@ -565,15 +569,17 @@ void scsiDiskPoll()
 		int prep = 0;
 		int i = 0;
 		int scsiDisconnected = 0;
-		volatile uint32_t lastActivityTime = getTime_ms();
+		int scsiComplete = 0;
+		uint32_t lastActivityTime = getTime_ms();
 		int scsiActive = 0;
 		int sdActive = 0;
-		
+
 		while ((i < totalSDSectors) &&
-			(scsiDev.phase == DATA_OUT) && // scsiDisconnect keeps our phase.
+			((scsiDev.phase == DATA_OUT) || // scsiDisconnect keeps our phase.
+				scsiComplete) &&
 			!scsiDev.resetFlag)
 		{
-			if ((sdActive == 1) && sdWriteSectorDMAPoll())
+			if ((sdActive == 1) && sdWriteSectorDMAPoll(i == (totalSDSectors - 1)))
 			{
 				sdActive = 0;
 				i++;
@@ -585,11 +591,13 @@ void scsiDiskPoll()
 				sdActive = 1;
 			}
 
+			uint32_t now = getTime_ms();
+
 			if ((scsiActive == 1) && scsiReadDMAPoll())
 			{
 				scsiActive = 0;
 				++prep;
-				lastActivityTime = getTime_ms();
+				lastActivityTime = now;
 			}
 			else if ((scsiActive == 0) &&
 				((prep - i) < buffers) &&
@@ -609,7 +617,7 @@ void scsiDiskPoll()
 				(scsiActive == 0) &&
 				!scsiDisconnected &&
 				scsiDev.discPriv &&
-				(diffTime_ms(lastActivityTime, getTime_ms()) >= 20) &&
+				(diffTime_ms(lastActivityTime, now) >= 20) &&
 				(scsiDev.phase == DATA_OUT))
 			{
 				// We're transferring over the SCSI bus faster than the SD card
@@ -628,7 +636,7 @@ void scsiDiskPoll()
 					(prep == i) || // Buffers empty.
 					// Send some messages every 100ms so we don't timeout.
 					// At a minimum, a reselection involves an IDENTIFY message.
-					(diffTime_ms(lastActivityTime, getTime_ms()) >= 100)
+					(diffTime_ms(lastActivityTime, now) >= 100)
 				))
 			{
 				int reconnected = scsiReconnect();
@@ -643,8 +651,38 @@ void scsiDiskPoll()
 					scsiDev.resetFlag = 1;
 				}
 			}
+			else if (
+				!scsiComplete &&
+				(sdActive == 1) &&
+				(prep == totalSDSectors) && // All scsi data read and buffered
+				!scsiDev.discPriv && // Prefer disconnect where possible.
+				(diffTime_ms(lastActivityTime, now) >= 150) &&
+
+				(scsiDev.phase == DATA_OUT) &&
+				!(scsiDev.cdb[scsiDev.cdbLen - 1] & 0x01) // Not linked command
+				)
+			{
+				// We're transferring over the SCSI bus faster than the SD card
+				// can write.  All data is buffered, and we're just waiting for
+				// the SD card to complete. The host won't let us disconnect.
+				// Some drivers set a 250ms timeout on transfers to complete.
+				// SD card writes are supposed to complete
+				// within 200ms, but sometimes they don'to.
+				// Just pretend we're finished.
+				scsiComplete = 1;
+
+				process_Status();
+				process_MessageIn(); // Will go to BUS_FREE state
+
+				// Try and prevent anyone else using the SCSI bus while we're not ready.
+				SCSI_SetPin(SCSI_Out_BSY); 
+			}
 		}
 
+		if (scsiComplete)
+		{
+			SCSI_ClearPin(SCSI_Out_BSY);
+		}
 		while (
 			!scsiDev.resetFlag &&
 			scsiDisconnected &&
@@ -672,6 +710,7 @@ void scsiDiskPoll()
 		}
 		scsiDiskReset();
 	}
+	debugResume(); // TODO comment re. timeouts.
 }
 
 void scsiDiskReset()
@@ -697,6 +736,8 @@ void scsiDiskReset()
 	}
 	transfer.inProgress = 0;
 	transfer.multiBlock = 0;
+		//		SD_CS_Write(1);
+
 }
 
 void scsiDiskInit()

lib/SCSI2SD/software/SCSI2SD/src/main.c

@@ -25,6 +25,8 @@
 
 const char* Notice = "Copyright (C) 2014 Michael McMaster <michael@codesrc.com>";
 
+uint8_t testData[512];
+
 int main()
 {
 	timeInit();
@@ -42,10 +44,13 @@ int main()
 
 	scsiInit();
 	scsiDiskInit();
-	
+
 	uint32_t lastSDPoll = getTime_ms();
 	sdPoll();
-	
+
+
+
+
 	while (1)
 	{
 		scsiDev.watchdogTick++;
@@ -53,7 +58,7 @@ int main()
 		scsiPoll();
 		scsiDiskPoll();
 		configPoll();
-		
+
 		uint32_t now = getTime_ms();
 		if (diffTime_ms(lastSDPoll, now) > 200)
 		{

lib/SCSI2SD/software/SCSI2SD/src/scsi.c

@@ -38,9 +38,7 @@ static void enter_SelectionPhase(void);
 static void process_SelectionPhase(void);
 static void enter_BusFree(void);
 static void enter_MessageIn(uint8 message);
-static void process_MessageIn(void);
 static void enter_Status(uint8 status);
-static void process_Status(void);
 static void enter_DataIn(int len);
 static void process_DataIn(void);
 static void process_DataOut(void);
@@ -72,7 +70,7 @@ static void enter_MessageIn(uint8 message)
 	scsiDev.phase = MESSAGE_IN;
 }
 
-static void process_MessageIn()
+void process_MessageIn()
 {
 	scsiEnterPhase(MESSAGE_IN);
 	scsiWriteByte(scsiDev.msgIn);
@@ -115,9 +113,10 @@ static void enter_Status(uint8 status)
 
 	scsiDev.lastStatus = scsiDev.status;
 	scsiDev.lastSense = scsiDev.target->sense.code;
+	scsiDev.lastSenseASC = scsiDev.target->sense.asc;
 }
 
-static void process_Status()
+void process_Status()
 {
 	scsiEnterPhase(STATUS);
 
@@ -145,6 +144,8 @@ static void process_Status()
 
 	scsiDev.lastStatus = scsiDev.status;
 	scsiDev.lastSense = scsiDev.target->sense.code;
+	scsiDev.lastSenseASC = scsiDev.target->sense.asc;
+
 
 	// Command Complete occurs AFTER a valid status has been
 	// sent. then we go bus-free.
@@ -460,8 +461,9 @@ static void scsiReset()
 	// There is no guarantee that the RST line will be negated by then.
 	// NOTE: We could be connected and powered by USB for configuration,
 	// in which case TERMPWR cannot be supplied, and reset will ALWAYS
-	// be true.
-	CyDelay(10); // 10ms.
+	// be true. Therefore, the sleep here must be slow to avoid slowing
+	// USB comms
+	CyDelay(1); // 1ms.
 }
 
 static void enter_SelectionPhase()

lib/SCSI2SD/software/SCSI2SD/src/scsi.h

@@ -103,7 +103,7 @@ typedef struct
 
 	int phase;
 
-	uint8 data[MAX_SECTOR_SIZE];
+	uint8 data[MAX_SECTOR_SIZE * 2];
 	int dataPtr; // Index into data, reset on [re]selection to savedDataPtr
 	int savedDataPtr; // Index into data, initially 0.
 	int dataLen;
@@ -134,10 +134,14 @@ typedef struct
 	uint8 watchdogTick;
 	uint8 lastStatus;
 	uint8 lastSense;
+	uint16_t lastSenseASC;
 } ScsiDevice;
 
 extern ScsiDevice scsiDev;
 
+void process_Status(void);
+void process_MessageIn(void);
+
 void scsiInit(void);
 void scsiPoll(void);
 void scsiDisconnect(void);

lib/SCSI2SD/software/SCSI2SD/src/sd.c

@@ -30,18 +30,26 @@
 // Global
 SdDevice sdDev;
 
+enum SD_IO_STATE { SD_DMA, SD_ACCEPTED, SD_BUSY, SD_IDLE };
+static int sdIOState = SD_IDLE;
+
 // Private DMA variables.
-static int dmaInProgress = 0;
 static uint8 sdDMARxChan = CY_DMA_INVALID_CHANNEL;
 static uint8 sdDMATxChan = CY_DMA_INVALID_CHANNEL;
 
 // DMA descriptors
 static uint8 sdDMARxTd[2] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD };
-static uint8 sdDMATxTd[2] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD };
+static uint8 sdDMATxTd[3] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD, CY_DMA_INVALID_TD };
 
 // Dummy location for DMA to send unchecked CRC bytes to
 static uint8 discardBuffer;
 
+// 2 bytes CRC, response, 8bits to close the clock..
+// "NCR" time is up to 8 bytes.
+static uint8_t writeResponseBuffer[8];
+
+static uint8_t writeStartToken = 0xFC;
+
 // Source of dummy SPI bytes for DMA
 static uint8 dummyBuffer = 0xFF;
 
@@ -77,85 +85,108 @@ static uint8 sdCrc7(uint8* chr, uint8 cnt, uint8 crc)
 }
 
 // Read and write 1 byte.
-static uint8 sdSpiByte(uint8 value)
+static uint8_t sdSpiByte(uint8_t value)
 {
 	SDCard_WriteTxData(value);
 	while (!(SDCard_ReadRxStatus() & SDCard_STS_RX_FIFO_NOT_EMPTY)) {}
 	return SDCard_ReadRxData();
 }
 
-static void sdSendCRCCommand(uint8 cmd, uint32 param)
+static uint16_t sdDoCommand(
+	uint8_t cmd,
+	uint32_t param,
+	int useCRC,
+	int use2byteResponse)
 {
-	uint8 send[6];
+	uint8_t send[7];
 
 	send[0] = cmd | 0x40;
 	send[1] = param >> 24;
 	send[2] = param >> 16;
 	send[3] = param >> 8;
 	send[4] = param;
-	send[5] = (sdCrc7(send, 5, 0) << 1) | 1;
-
-	for(cmd = 0; cmd < sizeof(send); cmd++)
+	if (useCRC)
 	{
-		sdSpiByte(send[cmd]);
+		send[5] = (sdCrc7(send, 5, 0) << 1) | 1;
 	}
-	// Allow command to process before reading result code.
-	sdSpiByte(0xFF);
-}
+	else
+	{
+		send[5] = 1; // stop bit
+	}
+	send[6] = 0xFF; // Result code or stuff byte.
 
-static void sdSendCommand(uint8 cmd, uint32 param)
-{
-	uint8 send[6];
+	CyDmaTdSetConfiguration(sdDMATxTd[0], sizeof(send), CY_DMA_DISABLE_TD, TD_INC_SRC_ADR|SD_TX_DMA__TD_TERMOUT_EN);
+	CyDmaTdSetAddress(sdDMATxTd[0], LO16((uint32)&send), LO16((uint32)SDCard_TXDATA_PTR));
+	CyDmaTdSetConfiguration(sdDMARxTd[0], sizeof(send), CY_DMA_DISABLE_TD, SD_RX_DMA__TD_TERMOUT_EN);
+	CyDmaTdSetAddress(sdDMARxTd[0], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&discardBuffer));
+	// The DMA controller is a bit trigger-happy. It will retain
+	// a drq request that was triggered while the channel was
+	// disabled.
+	CyDmaClearPendingDrq(sdDMATxChan);
+	CyDmaClearPendingDrq(sdDMARxChan);
 
-	send[0] = cmd | 0x40;
-	send[1] = param >> 24;
-	send[2] = param >> 16;
-	send[3] = param >> 8;
-	send[4] = param;
-	send[5] = 1; // 7:1 CRC, 0: Stop bit.
+	txDMAComplete = 0;
+	rxDMAComplete = 0;
 
-	for(cmd = 0; cmd < sizeof(send); cmd++)
+	CyDmaChSetInitialTd(sdDMARxChan, sdDMARxTd[0]);
+	CyDmaChSetInitialTd(sdDMATxChan, sdDMATxTd[0]);
+
+	// There is no flow control, so we must ensure we can read the bytes
+	// before we start transmitting
+	CyDmaChEnable(sdDMARxChan, 1);
+	CyDmaChEnable(sdDMATxChan, 1);
+
+	while (!(txDMAComplete && rxDMAComplete)) {}
+
+	uint16_t response = discardBuffer;
+	if (cmd == SD_STOP_TRANSMISSION)
 	{
-		sdSpiByte(send[cmd]);
+		// Stuff byte is required for this command only.
+		// Part 1 Simplified standard 3.01
+		// "The stop command has an execution delay due to the serial command
+		// transmission."
+		response = sdSpiByte(0xFF);
 	}
-	// Allow command to process before reading result code.
-	sdSpiByte(0xFF);
-}
 
-static uint8 sdReadResp()
-{
-	uint8 v;
-	uint8 i = 128;
-	do
+	uint32_t start = getTime_ms();
+	while ((response & 0x80) && (diffTime_ms(start, getTime_ms()) <= 200))
+	{
+		response = sdSpiByte(0xFF);
+	}
+	if (use2byteResponse)
 	{
-		v = sdSpiByte(0xFF);
-	} while(i-- && (v & 0x80));
-	return v;
+		response = (response << 8) | sdSpiByte(0xFF);
+	}
+	return response;
 }
 
-static uint8 sdCommandAndResponse(uint8 cmd, uint32 param)
+
+static uint16_t sdCommandAndResponse(uint8_t cmd, uint32_t param)
 {
-	sdSpiByte(0xFF);
-	sdSendCommand(cmd, param);
-	return sdReadResp();
+	// Some Samsung cards enter a busy-state after single-sector reads.
+	// But we also need to wait for R1B to complete from the multi-sector
+	// reads.
+	while (sdSpiByte(0xFF) == 0x00) {}
+	return sdDoCommand(cmd, param, 0, 0);
 }
 
-static uint8 sdCRCCommandAndResponse(uint8 cmd, uint32 param)
+static uint16_t sdCRCCommandAndResponse(uint8_t cmd, uint32_t param)
 {
-	sdSpiByte(0xFF);
-	sdSendCRCCommand(cmd, param);
-	return sdReadResp();
+	// Some Samsung cards enter a busy-state after single-sector reads.
+	// But we also need to wait for R1B to complete from the multi-sector
+	// reads.
+	while (sdSpiByte(0xFF) == 0x00) {}
+	return sdDoCommand(cmd, param, 1, 0);
 }
 
 // Clear the sticky status bits on error.
 static void sdClearStatus()
 {
-	uint8 r2hi = sdCRCCommandAndResponse(SD_SEND_STATUS, 0);
-	uint8 r2lo = sdSpiByte(0xFF);
-	(void) r2hi; (void) r2lo;
+	sdSpiByte(0xFF);
+	uint16_t r2 = sdDoCommand(SD_SEND_STATUS, 0, 1, 1);
+	(void) r2;
 }
 
-
 void
 sdReadMultiSectorPrep()
 {
@@ -179,7 +210,7 @@ sdReadMultiSectorPrep()
 
 		scsiDev.status = CHECK_CONDITION;
 		scsiDev.target->sense.code = HARDWARE_ERROR;
-		scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
+		scsiDev.target->sense.asc = LOGICAL_UNIT_NOT_READY_CAUSE_NOT_REPORTABLE;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -192,12 +223,16 @@ static void
 dmaReadSector(uint8_t* outputBuffer)
 {
 	// Wait for a start-block token.
-	// Don't wait more than 200ms.
-	// The standard recommends 100ms.
+	// Don't wait more than 200ms.  The standard recommends 100ms.
 	uint32_t start = getTime_ms();
-	uint8 token = sdSpiByte(0xFF);
+	uint8_t token = sdSpiByte(0xFF);
 	while (token != 0xFE && (diffTime_ms(start, getTime_ms()) <= 200))
 	{
+		if (token && ((token & 0xE0) == 0))
+		{
+			// Error token!
+			break;
+		}
 		token = sdSpiByte(0xFF);
 	}
 	if (token != 0xFE)
@@ -210,9 +245,10 @@ dmaReadSector(uint8_t* outputBuffer)
 		{
 			scsiDev.status = CHECK_CONDITION;
 			scsiDev.target->sense.code = HARDWARE_ERROR;
-			scsiDev.target->sense.asc = UNRECOVERED_READ_ERROR;
+			scsiDev.target->sense.asc = 0x4400 | token;
 			scsiDev.phase = STATUS;
 		}
+		sdClearStatus();
 		return;
 	}
 
@@ -225,13 +261,7 @@ dmaReadSector(uint8_t* outputBuffer)
 	CyDmaTdSetConfiguration(sdDMATxTd[0], SD_SECTOR_SIZE + 2, CY_DMA_DISABLE_TD, SD_TX_DMA__TD_TERMOUT_EN);
 	CyDmaTdSetAddress(sdDMATxTd[0], LO16((uint32)&dummyBuffer), LO16((uint32)SDCard_TXDATA_PTR));
 
-	dmaInProgress = 1;
-	// The DMA controller is a bit trigger-happy. It will retain
-	// a drq request that was triggered while the channel was
-	// disabled.
-	CyDmaClearPendingDrq(sdDMATxChan);
-	CyDmaClearPendingDrq(sdDMARxChan);
-
+	sdIOState = SD_DMA;
 	txDMAComplete = 0;
 	rxDMAComplete = 0;
 
@@ -241,6 +271,12 @@ dmaReadSector(uint8_t* outputBuffer)
 	CyDmaChSetInitialTd(sdDMARxChan, sdDMARxTd[0]);
 	CyDmaChSetInitialTd(sdDMATxChan, sdDMATxTd[0]);
 
+	// The DMA controller is a bit trigger-happy. It will retain
+	// a drq request that was triggered while the channel was
+	// disabled.
+	CyDmaClearPendingDrq(sdDMATxChan);
+	CyDmaClearPendingDrq(sdDMARxChan);
+
 	// There is no flow control, so we must ensure we can read the bytes
 	// before we start transmitting
 	CyDmaChEnable(sdDMARxChan, 1);
@@ -253,7 +289,7 @@ sdReadSectorDMAPoll()
 	if (rxDMAComplete && txDMAComplete)
 	{
 		// DMA transfer is complete
-		dmaInProgress = 0;
+		sdIOState = SD_IDLE;
 		return 1;
 	}
 	else
@@ -277,7 +313,7 @@ void sdReadSingleSectorDMA(uint32_t lba, uint8_t* outputBuffer)
 
 		scsiDev.status = CHECK_CONDITION;
 		scsiDev.target->sense.code = HARDWARE_ERROR;
-		scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
+		scsiDev.target->sense.asc = LOGICAL_UNIT_DOES_NOT_RESPOND_TO_SELECTION;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -296,14 +332,13 @@ sdReadMultiSectorDMA(uint8_t* outputBuffer)
 
 void sdCompleteRead()
 {
-	if (dmaInProgress)
+	if (sdIOState != SD_IDLE)
 	{
 		// Not much choice but to wait until we've completed the transfer.
 		// Cancelling the transfer can't be done as we have no way to reset
 		// the SD card.
 		while (!sdReadSectorDMAPoll()) { /* spin */ }
 	}
-
 	transfer.inProgress = 0;
 
 	// We cannot send even a single "padding" byte, as we normally would when
@@ -312,34 +347,19 @@ void sdCompleteRead()
 	// an error condition as we're trying to read past-the-end of the storage
 	// device.
 	// ie. do not use sdCommandAndResponse here.
-	uint8 r1b;
-	sdSendCommand(SD_STOP_TRANSMISSION, 0);
-	r1b = sdReadResp();
+	uint8 r1b = sdDoCommand(SD_STOP_TRANSMISSION, 0, 0, 0);
 
 	if (r1b)
 	{
-		// Try very hard to make sure the transmission stops
-		int retries = 255;
-		while (r1b && retries)
-		{
-			r1b = sdCommandAndResponse(SD_STOP_TRANSMISSION, 0);
-			retries--;
-		}
-
 		scsiDev.status = CHECK_CONDITION;
 		scsiDev.target->sense.code = HARDWARE_ERROR;
-		scsiDev.target->sense.asc = UNRECOVERED_READ_ERROR;
+		scsiDev.target->sense.asc = UNRECOVERED_READ_ERROR | r1b;
 		scsiDev.phase = STATUS;
 	}
 
-	// R1b has an optional trailing "busy" signal.
-	{
-		uint8 busy;
-		do
-		{
-			busy = sdSpiByte(0xFF);
-		} while (busy == 0);
-	}
+	// R1b has an optional trailing "busy" signal, but we defer waiting on this.
+	// The next call so sdCommandAndResponse will wait for the busy state to
+	// clear.
 }
 
 static void sdWaitWriteBusy()
@@ -354,19 +374,23 @@ static void sdWaitWriteBusy()
 void
 sdWriteMultiSectorDMA(uint8_t* outputBuffer)
 {
-	sdSpiByte(0xFC); // MULTIPLE byte start token
+	// Transmit 512 bytes of data and then 2 bytes CRC, and then get the response byte
+	// We need to do this without stopping the clock
+	CyDmaTdSetConfiguration(sdDMATxTd[0], 1, sdDMATxTd[1], TD_INC_SRC_ADR);
+	CyDmaTdSetAddress(sdDMATxTd[0], LO16((uint32)&writeStartToken), LO16((uint32)SDCard_TXDATA_PTR));
 
-	// Transmit 512 bytes of data and then 2 bytes CRC.
-	CyDmaTdSetConfiguration(sdDMATxTd[0], SD_SECTOR_SIZE, sdDMATxTd[1], TD_INC_SRC_ADR);
-	CyDmaTdSetAddress(sdDMATxTd[0], LO16((uint32)outputBuffer), LO16((uint32)SDCard_TXDATA_PTR));
-	CyDmaTdSetConfiguration(sdDMATxTd[1], 2, CY_DMA_DISABLE_TD, SD_TX_DMA__TD_TERMOUT_EN);
-	CyDmaTdSetAddress(sdDMATxTd[1], LO16((uint32)&dummyBuffer), LO16((uint32)SDCard_TXDATA_PTR));
+	CyDmaTdSetConfiguration(sdDMATxTd[1], SD_SECTOR_SIZE, sdDMATxTd[2], TD_INC_SRC_ADR);
+	CyDmaTdSetAddress(sdDMATxTd[1], LO16((uint32)outputBuffer), LO16((uint32)SDCard_TXDATA_PTR));
 
-	CyDmaTdSetConfiguration(sdDMARxTd[0], SD_SECTOR_SIZE + 2, CY_DMA_DISABLE_TD, SD_RX_DMA__TD_TERMOUT_EN);
-	CyDmaTdSetAddress(sdDMARxTd[0], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&discardBuffer));
+	CyDmaTdSetConfiguration(sdDMATxTd[2], 2 + sizeof(writeResponseBuffer), CY_DMA_DISABLE_TD, SD_TX_DMA__TD_TERMOUT_EN);
+	CyDmaTdSetAddress(sdDMATxTd[2], LO16((uint32)&dummyBuffer), LO16((uint32)SDCard_TXDATA_PTR));
 
+	CyDmaTdSetConfiguration(sdDMARxTd[0], SD_SECTOR_SIZE + 3, sdDMARxTd[1], 0);
+	CyDmaTdSetAddress(sdDMARxTd[0], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&discardBuffer));
+	CyDmaTdSetConfiguration(sdDMARxTd[1], sizeof(writeResponseBuffer), CY_DMA_DISABLE_TD, SD_RX_DMA__TD_TERMOUT_EN|TD_INC_DST_ADR);
+	CyDmaTdSetAddress(sdDMARxTd[1], LO16((uint32)SDCard_RXDATA_PTR), LO16((uint32)&writeResponseBuffer));
 	
-	dmaInProgress = 1;
+	sdIOState = SD_DMA;
 	// The DMA controller is a bit trigger-happy. It will retain
 	// a drq request that was triggered while the channel was
 	// disabled.
@@ -389,51 +413,76 @@ sdWriteMultiSectorDMA(uint8_t* outputBuffer)
 }
 
 int
-sdWriteSectorDMAPoll()
+sdWriteSectorDMAPoll(int sendStopToken)
 {
 	if (rxDMAComplete && txDMAComplete)
 	{
-		uint8_t dataToken = sdSpiByte(0xFF); // Response
-		if (dataToken == 0x0FF)
+		if (sdIOState == SD_DMA)
 		{
-			return 0; // Write has not completed.
-		}
-		else if (((dataToken & 0x1F) >> 1) != 0x2) // Accepted.
-		{
-			uint8 r1b, busy;
-		
-			sdWaitWriteBusy();
-
-			r1b = sdCommandAndResponse(SD_STOP_TRANSMISSION, 0);
-			(void) r1b;
-			sdSpiByte(0xFF);
-
-			// R1b has an optional trailing "busy" signal.
+			// Retry a few times. The data token format is:
+			// XXX0AAA1
+			int i = 0;
+			uint8_t dataToken;
 			do
 			{
-				busy = sdSpiByte(0xFF);
-			} while (busy == 0);
+				dataToken = writeResponseBuffer[i]; // Response
+				++i;
+			} while (((dataToken & 0x0101) != 1) && (i < sizeof(writeResponseBuffer)));
+
+			// At this point we should either have an accepted token, or we'll
+			// timeout and proceed into the error case below.
+			if (((dataToken & 0x1F) >> 1) != 0x2) // Accepted.
+			{
+				sdIOState = SD_IDLE;
 
-			// Wait for the card to come out of busy.
-			sdWaitWriteBusy();
+				sdWaitWriteBusy();
+				sdSpiByte(0xFD); // STOP TOKEN
+				sdWaitWriteBusy();
 
-			transfer.inProgress = 0;
-			scsiDiskReset();
-			sdClearStatus();
+				transfer.inProgress = 0;
+				scsiDiskReset();
+				sdClearStatus();
 
-			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = HARDWARE_ERROR;
-			scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
-			scsiDev.phase = STATUS;
+				scsiDev.status = CHECK_CONDITION;
+				scsiDev.target->sense.code = HARDWARE_ERROR;
+				scsiDev.target->sense.asc = 0x6900 | dataToken;
+				scsiDev.phase = STATUS;
+			}
+			else
+			{
+				sdIOState = SD_ACCEPTED;
+			}
 		}
-		else
+
+		if (sdIOState == SD_ACCEPTED)
 		{
-			sdWaitWriteBusy();
+			// Wait while the SD card is busy
+			if (sdSpiByte(0xFF) == 0xFF)
+			{
+				if (sendStopToken)
+				{
+					sdIOState = SD_BUSY;
+					transfer.inProgress = 0;
+
+					sdSpiByte(0xFD); // STOP TOKEN
+				}
+				else
+				{
+					sdIOState = SD_IDLE;
+				}
+			}
 		}
-		// DMA transfer is complete and the SD card has accepted the write.
-		dmaInProgress = 0;
 
-		return 1;
+		if (sdIOState == SD_BUSY)
+		{
+			// Wait while the SD card is busy
+			if (sdSpiByte(0xFF) == 0xFF)
+			{
+				sdIOState = SD_IDLE;
+			}
+		}
+
+		return sdIOState == SD_IDLE;
 	}
 	else
 	{
@@ -443,31 +492,28 @@ sdWriteSectorDMAPoll()
 
 void sdCompleteWrite()
 {
-	if (dmaInProgress)
+	if (sdIOState != SD_IDLE)
 	{
 		// Not much choice but to wait until we've completed the transfer.
 		// Cancelling the transfer can't be done as we have no way to reset
 		// the SD card.
-		while (!sdWriteSectorDMAPoll()) { /* spin */ }
+		while (!sdWriteSectorDMAPoll(1)) { /* spin */ }
 	}
-	
-	transfer.inProgress = 0;
 
-	uint8 r1, r2;
-
-	sdSpiByte(0xFD); // STOP TOKEN
-	// Wait for the card to come out of busy.
-	sdWaitWriteBusy();
+	transfer.inProgress = 0;
 
-	r1 = sdCommandAndResponse(13, 0); // send status
-	r2 = sdSpiByte(0xFF);
-	if (r1 || r2)
+	if (scsiDev.phase == DATA_OUT)
 	{
-		sdClearStatus();
-		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = HARDWARE_ERROR;
-		scsiDev.target->sense.asc = WRITE_ERROR_AUTO_REALLOCATION_FAILED;
-		scsiDev.phase = STATUS;
+		sdSpiByte(0xFF);
+		uint16_t r2 = sdDoCommand(SD_SEND_STATUS, 0, 0, 1);
+		if (r2)
+		{
+			sdClearStatus();
+			scsiDev.status = CHECK_CONDITION;
+			scsiDev.target->sense.code = HARDWARE_ERROR;
+			scsiDev.target->sense.asc = WRITE_ERROR_AUTO_REALLOCATION_FAILED;
+			scsiDev.phase = STATUS;
+		}
 	}
 }
 
@@ -533,7 +579,7 @@ static int sdReadOCR()
 	uint32_t start = getTime_ms();
 	int complete;
 	uint8 status;
-	
+
 	do
 	{
 		uint8 buf[4];
@@ -557,11 +603,33 @@ static int sdReadOCR()
 	return (status == 0) && complete;
 }
 
+static void sdReadCID()
+{
+	uint8 startToken;
+	int maxWait, i;
+
+	uint8 status = sdCRCCommandAndResponse(SD_SEND_CID, 0);
+	if(status){return;}
+
+	maxWait = 1023;
+	do
+	{
+		startToken = sdSpiByte(0xFF);
+	} while(maxWait-- && (startToken != 0xFE));
+	if (startToken != 0xFE) { return; }
+
+	for (i = 0; i < 16; ++i)
+	{
+		sdDev.cid[i] = sdSpiByte(0xFF);
+	}
+	sdSpiByte(0xFF); // CRC
+	sdSpiByte(0xFF); // CRC
+}
+
 static int sdReadCSD()
 {
 	uint8 startToken;
 	int maxWait, i;
-	uint8 buf[16];
 
 	uint8 status = sdCRCCommandAndResponse(SD_SEND_CSD, 0);
 	if(status){goto bad;}
@@ -575,29 +643,29 @@ static int sdReadCSD()
 
 	for (i = 0; i < 16; ++i)
 	{
-		buf[i] = sdSpiByte(0xFF);
+		sdDev.csd[i] = sdSpiByte(0xFF);
 	}
 	sdSpiByte(0xFF); // CRC
 	sdSpiByte(0xFF); // CRC
 
-	if ((buf[0] >> 6) == 0x00)
+	if ((sdDev.csd[0] >> 6) == 0x00)
 	{
 		// CSD version 1
 		// C_SIZE in bits [73:62]
-		uint32 c_size = (((((uint32)buf[6]) & 0x3) << 16) | (((uint32)buf[7]) << 8) | buf[8]) >> 6;
-		uint32 c_mult = (((((uint32)buf[9]) & 0x3) << 8) | ((uint32)buf[0xa])) >> 7;
-		uint32 sectorSize = buf[5] & 0x0F;
+		uint32 c_size = (((((uint32)sdDev.csd[6]) & 0x3) << 16) | (((uint32)sdDev.csd[7]) << 8) | sdDev.csd[8]) >> 6;
+		uint32 c_mult = (((((uint32)sdDev.csd[9]) & 0x3) << 8) | ((uint32)sdDev.csd[0xa])) >> 7;
+		uint32 sectorSize = sdDev.csd[5] & 0x0F;
 		sdDev.capacity = ((c_size+1) * ((uint64)1 << (c_mult+2)) * ((uint64)1 << sectorSize)) / SD_SECTOR_SIZE;
 	}
-	else if ((buf[0] >> 6) == 0x01)
+	else if ((sdDev.csd[0] >> 6) == 0x01)
 	{
 		// CSD version 2
 		// C_SIZE in bits [69:48]
 
 		uint32 c_size =
-			((((uint32)buf[7]) & 0x3F) << 16) |
-			(((uint32)buf[8]) << 8) |
-			((uint32)buf[7]);
+			((((uint32)sdDev.csd[7]) & 0x3F) << 16) |
+			(((uint32)sdDev.csd[8]) << 8) |
+			((uint32)sdDev.csd[7]);
 		sdDev.capacity = (c_size + 1) * 1024;
 	}
 	else
@@ -638,6 +706,7 @@ static void sdInitDMA()
 		sdDMARxTd[1] = CyDmaTdAllocate();
 		sdDMATxTd[0] = CyDmaTdAllocate();
 		sdDMATxTd[1] = CyDmaTdAllocate();
+		sdDMATxTd[2] = CyDmaTdAllocate();
 
 		SD_RX_DMA_COMPLETE_StartEx(sdRxISR);
 		SD_TX_DMA_COMPLETE_StartEx(sdTxISR);
@@ -653,6 +722,8 @@ int sdInit()
 	sdDev.version = 0;
 	sdDev.ccs = 0;
 	sdDev.capacity = 0;
+	memset(sdDev.csd, 0, sizeof(sdDev.csd));
+	memset(sdDev.cid, 0, sizeof(sdDev.cid));
 
 	sdInitDMA();
 
@@ -678,7 +749,8 @@ int sdInit()
 	SD_CS_Write(0); // Set CS active (active low)
 	CyDelayUs(1);
 
-	v = sdCRCCommandAndResponse(SD_GO_IDLE_STATE, 0);
+	sdSpiByte(0xFF);
+	v = sdDoCommand(SD_GO_IDLE_STATE, 0, 1, 0);
 	if(v != 1){goto bad;}
 
 	ledOn();
@@ -713,6 +785,7 @@ int sdInit()
 	SDCard_ClearFIFO();
 
 	if (!sdReadCSD()) goto bad;
+	sdReadCID();
 
 	result = 1;
 	goto out;
@@ -730,7 +803,7 @@ out:
 void sdWriteMultiSectorPrep()
 {
 	uint8 v;
-	
+
 	// Set the number of blocks to pre-erase by the multiple block write command
 	// We don't care about the response - if the command is not accepted, writes
 	// will just be a bit slower.
@@ -752,14 +825,14 @@ void sdWriteMultiSectorPrep()
 	{
 		sdLBA = sdLBA * SD_SECTOR_SIZE;
 	}
-	v = sdCommandAndResponse(25, sdLBA);
+	v = sdCommandAndResponse(SD_WRITE_MULTIPLE_BLOCK, sdLBA);
 	if (v)
 	{
 		scsiDiskReset();
 		sdClearStatus();
 		scsiDev.status = CHECK_CONDITION;
 		scsiDev.target->sense.code = HARDWARE_ERROR;
-		scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
+		scsiDev.target->sense.asc = 0x8800 | v;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -772,7 +845,7 @@ void sdPoll()
 {
 	// Check if there's an SD card present.
 	if ((scsiDev.phase == BUS_FREE) &&
-		!dmaInProgress)
+		(sdIOState == SD_IDLE))
 	{
 		// The CS line is pulled high by the SD card.
 		// De-assert the line, and check if it's high.

lib/SCSI2SD/software/SCSI2SD/src/sd.h

@@ -25,12 +25,14 @@ typedef enum
 	SD_SEND_OP_COND = 1,
 	SD_SEND_IF_COND = 8, // SD V2
 	SD_SEND_CSD = 9,
+	SD_SEND_CID = 10,
 	SD_STOP_TRANSMISSION = 12,
 	SD_SEND_STATUS = 13,
 	SD_SET_BLOCKLEN = 16,
 	SD_READ_SINGLE_BLOCK = 17,
 	SD_READ_MULTIPLE_BLOCK = 18,
 	SD_APP_SET_WR_BLK_ERASE_COUNT = 23,
+	SD_WRITE_MULTIPLE_BLOCK = 25,
 	SD_APP_SEND_OP_COND = 41,
 	SD_APP_CMD = 55,
 	SD_READ_OCR = 58,
@@ -53,6 +55,9 @@ typedef struct
 	int version; // SDHC = version 2.
 	int ccs; // Card Capacity Status. 1 = SDHC or SDXC
 	uint32 capacity; // in 512 byte blocks
+
+	uint8_t csd[16]; // Unparsed CSD
+	uint8_t cid[16]; // Unparsed CID
 } SdDevice;
 
 extern SdDevice sdDev;
@@ -61,7 +66,7 @@ int sdInit(void);
 
 void sdWriteMultiSectorPrep(void);
 void sdWriteMultiSectorDMA(uint8_t* outputBuffer);
-int sdWriteSectorDMAPoll();
+int sdWriteSectorDMAPoll(int sendStopToken);
 void sdCompleteWrite(void);
 
 void sdReadMultiSectorPrep(void);

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Bootloadable_1.c

@@ -1,13 +1,13 @@
 /*******************************************************************************
 * File Name: Bootloadable_1.c
-* Version 1.20
+* Version 1.30
 *
 *  Description:
 *   Provides an API for the Bootloadable application. The API includes a
-*   single function for starting bootloader.
+*   single function for starting the bootloader.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -20,7 +20,7 @@
 * Function Name: Bootloadable_1_Load
 ********************************************************************************
 * Summary:
-*  Begins the bootloading algorithm, downloading a new ACD image from the host.
+*  Begins the bootloading algorithm downloading a new ACD image from the host.
 *
 * Parameters:
 *  None
@@ -40,28 +40,23 @@ void Bootloadable_1_Load(void)
 
 
 /*******************************************************************************
-* Function Name: Bootloadable_1_SetFlashByte
-********************************************************************************
-* Summary:
-*  Sets byte at specified address in Flash.
-*
-* Parameters:
-*  None
-*
-* Returns:
-*  None
-*
+* The following code is OBSOLETE and must not be used.
 *******************************************************************************/
 void Bootloadable_1_SetFlashByte(uint32 address, uint8 runType) 
 {
     uint32 flsAddr = address - CYDEV_FLASH_BASE;
-    uint8 rowData[CYDEV_FLS_ROW_SIZE];
+    uint8  rowData[CYDEV_FLS_ROW_SIZE];
 
     #if !(CY_PSOC4)
-        uint8 arrayId = (uint8)(flsAddr / CYDEV_FLS_SECTOR_SIZE);
+        uint8 arrayId = ( uint8 )(flsAddr / CYDEV_FLS_SECTOR_SIZE);
     #endif  /* !(CY_PSOC4) */
 
-    uint16 rowNum = (uint16)((flsAddr % CYDEV_FLS_SECTOR_SIZE) / CYDEV_FLS_ROW_SIZE);
+    #if (CY_PSOC4)
+        uint16 rowNum = ( uint16 )(flsAddr / CYDEV_FLS_ROW_SIZE);
+    #else
+        uint16 rowNum = ( uint16 )((flsAddr % CYDEV_FLS_SECTOR_SIZE) / CYDEV_FLS_ROW_SIZE);
+    #endif  /* (CY_PSOC4) */
+
     uint32 baseAddr = address - (address % CYDEV_FLS_ROW_SIZE);
     uint16 idx;
 
@@ -72,12 +67,21 @@ void Bootloadable_1_SetFlashByte(uint32 address, uint8 runType)
     }
     rowData[address % CYDEV_FLS_ROW_SIZE] = runType;
 
-
     #if(CY_PSOC4)
-        (void) CySysFlashWriteRow((uint32)rowNum, rowData);
+        (void) CySysFlashWriteRow((uint32) rowNum, rowData);
     #else
         (void) CyWriteRowData(arrayId, rowNum, rowData);
     #endif  /* (CY_PSOC4) */
+
+    #if(CY_PSOC5)
+        /***************************************************************************
+        * When writing Flash, data in the instruction cache can become stale.
+        * Therefore, the cache data does not correlate to the data just written to
+        * Flash. A call to CyFlushCache() is required to invalidate the data in the
+        * cache and force fresh information to be loaded from Flash.
+        ***************************************************************************/
+        CyFlushCache();
+    #endif /* (CY_PSOC5) */
 }
 
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Bootloadable_1.h

@@ -1,13 +1,13 @@
 /*******************************************************************************
 * File Name: Bootloadable_1.h
-* Version 1.20
+* Version 1.30
 *
 *  Description:
 *   Provides an API for the Bootloadable application. The API includes a
 *   single function for starting bootloader.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -24,7 +24,7 @@
 /* Check to see if required defines such as CY_PSOC5LP are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5LP)
-    #error Component Bootloadable_v1_20 requires cy_boot v3.0 or later
+    #error Component Bootloadable_v1_30 requires cy_boot v3.0 or later
 #endif /* !defined (CY_PSOC5LP) */
 
 
@@ -89,13 +89,13 @@ extern void Bootloadable_1_Load(void) ;
 
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from version 1.10
+* The following code is OBSOLETE and must not be used starting from version 1.10
 *******************************************************************************/
 #define CYBTDLR_SET_RUN_TYPE(x)     Bootloadable_1_SET_RUN_TYPE(x)
 
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from version 1.20
+* The following code is OBSOLETE and must not be used starting from version 1.20
 *******************************************************************************/
 #define Bootloadable_1_START_APP                      (0x80u)
 #define Bootloadable_1_START_BTLDR                    (0x40u)
@@ -136,12 +136,26 @@ extern void Bootloadable_1_Load(void) ;
 #define Bootloadable_1_SetFlashRunType(runType)           \
                         Bootloadable_1_SetFlashByte(Bootloadable_1_MD_APP_RUN_ADDR(0), (runType))
 
-void Bootloadable_1_SetFlashByte(uint32 address, uint8 runType) ;
 
+/*******************************************************************************
+* The following code is OBSOLETE and must not be used.
+*
+* If the obsoleted macro definitions intended for use in the application use the
+* following scheme, redefine your own versions of these definitions:
+*    #ifdef <OBSOLETED_DEFINE>
+*        #undef  <OBSOLETED_DEFINE>
+*        #define <OBSOLETED_DEFINE>      (<New Value>)
+*    #endif
+*
+* Note: Redefine obsoleted macro definitions with caution. They might still be
+*       used in the application and their modification might lead to unexpected
+*       consequences.
+*******************************************************************************/
+void Bootloadable_1_SetFlashByte(uint32 address, uint8 runType) ;
 #if(CY_PSOC4)
-    #define Bootloadable_1_SOFTWARE_RESET         CY_SET_REG32(CYREG_CM0_AIRCR, 0x05FA0004u)
+    #define Bootloadable_1_SOFTWARE_RESET         CySoftwareReset()
 #else
-    #define Bootloadable_1_SOFTWARE_RESET         CY_SET_REG8(CYREG_RESET_CR2, 0x01u)
+    #define Bootloadable_1_SOFTWARE_RESET         CySoftwareReset()
 #endif  /* (CY_PSOC4) */
 
 #if(CY_PSOC4)

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Iar.icf

@@ -9,7 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__   = 131072 - 1;
 define symbol __ICFEDIT_region_RAM_start__ = 0x20000000 - (32768 / 2);
 define symbol __ICFEDIT_region_RAM_end__   = 0x20000000 + (32768 / 2) - 1;
 /*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x2000;
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
 define symbol __ICFEDIT_size_heap__   = 0x0400;
 /**** End of ICF editor section. ###ICF###*/
 
@@ -40,7 +40,10 @@ define block CSTACK      with alignment = 8, size = __ICFEDIT_size_cstack__   {
 define block HEAP        with alignment = 8, size = __ICFEDIT_size_heap__     { };
 define block HSTACK      {block HEAP, last block CSTACK};
 
+if (CY_APPL_LOADABLE)
+{
 define block LOADER     { readonly section .cybootloader };
+}
 define block APPL       with fixed order {readonly section .romvectors, readonly};
 
 /* The address of Flash row next after Bootloader image */
@@ -83,7 +86,11 @@ do not initialize  { section .noinit };
 do not initialize  { readwrite section .ramvectors };
 
 /******** Placements *********/
+if (CY_APPL_LOADABLE)
+{
 ".cybootloader"    : place at start of ROM_region {block LOADER};
+}
+
 "APPL"             : place at start of APPL_region {block APPL};
 
 "RAMVEC"           : place at start of RAM_region { readwrite section .ramvectors };
@@ -101,7 +108,10 @@ keep {  section .cybootloader,
         section .cymeta };
 
 ".cyloadermeta"   : place at address mem : (CY_APPL_LOADER ? (CY_FLASH_SIZE - CY_METADATA_SIZE) : 0xF0000000) { readonly section .cyloadermeta };
+if (CY_APPL_LOADABLE)
+{
 ".cyloadablemeta" : place at address mem : (CY_FLASH_SIZE - CY_FLASH_ROW_SIZE * (CY_APPL_NUM - 1) - CY_METADATA_SIZE) { readonly section .cyloadablemeta };
+}
 ".cyconfigecc"    : place at address mem : (0x80000000 + CY_ECC_OFFSET) { readonly section .cyconfigecc };
 ".cycustnvl"      : place at address mem : 0x90000000 { readonly section .cycustnvl };
 ".cywolatch"      : place at address mem : 0x90100000 { readonly section .cywolatch };

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3RealView.scat

@@ -4,7 +4,7 @@
 
 ;********************************************************************************
 ;* File Name: Cm3RealView.scat
-;* Version 4.0
+;* Version 4.20
 ;*
 ;*  Description:
 ;*  This Linker Descriptor file describes the memory layout of the PSoC5
@@ -14,7 +14,7 @@
 ;*
 ;*  Note:
 ;*
-;*  romvectors: Cypress default Interrupt sevice routine vector table.
+;*  romvectors: Cypress default Interrupt service routine vector table.
 ;*
 ;*      This is the ISR vector table at bootup. Used only for the reset vector.
 ;*
@@ -25,7 +25,7 @@
 ;*
 ;*
 ;********************************************************************************
-;* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+;* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 ;* You may use this file only in accordance with the license, terms, conditions,
 ;* disclaimers, and limitations in the end user license agreement accompanying
 ;* the software package with which this file was provided.
@@ -112,11 +112,11 @@ APPLICATION APPL_START (CY_FLASH_SIZE - APPL_START)
         .ANY (+RW, +ZI)
     }
 
-    ARM_LIB_HEAP (0x20000000 + (32768 / 2) - 0x0400 - 0x2000) EMPTY 0x0400
+    ARM_LIB_HEAP (0x20000000 + (32768 / 2) - 0x0400 - 0x1000) EMPTY 0x0400
     {
     }
 
-    ARM_LIB_STACK (0x20000000 + (32768 / 2)) EMPTY -0x2000
+    ARM_LIB_STACK (0x20000000 + (32768 / 2)) EMPTY -0x1000
     {
     }
 }

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Cm3Start.c

@@ -1,12 +1,12 @@
 /*******************************************************************************
 * File Name: Cm3Start.c
-* Version 4.0
+* Version 4.20
 *
 *  Description:
 *  Startup code for the ARM CM3.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -52,6 +52,12 @@ CY_ISR(IntDefaultHandler);
     extern void __iar_data_init3 (void);
 #endif  /* (__ARMCC_VERSION) */
 
+#if defined(__GNUC__)
+    #include <errno.h>
+    extern int  errno;
+    extern int  end;
+#endif  /* defined(__GNUC__) */
+
 /* Global variables */
 #if !defined (__ICCARM__)
     CY_NOINIT static uint32 cySysNoInitDataValid;
@@ -76,7 +82,7 @@ cyisraddress CyRamVectors[CY_NUM_VECTORS];
 ********************************************************************************
 *
 * Summary:
-*  This function is called for all interrupts, other than reset, that get
+*  This function is called for all interrupts, other than a reset that gets
 *  called before the system is setup.
 *
 * Parameters:
@@ -95,7 +101,7 @@ CY_ISR(IntDefaultHandler)
     while(1)
     {
         /***********************************************************************
-        * We should never get here. If we do, a serious problem occured, so go
+        * We must not get here. If we do, a serious problem occurs, so go
         * into an infinite loop.
         ***********************************************************************/
     }
@@ -104,7 +110,7 @@ CY_ISR(IntDefaultHandler)
 
 #if defined(__ARMCC_VERSION)
 
-/* Local function for the device reset. */
+/* Local function for device reset. */
 extern void Reset(void);
 
 /* Application entry point. */
@@ -161,7 +167,7 @@ void Reset(void)
 ********************************************************************************
 *
 * Summary:
-*  This function is called imediatly before the users main
+*  This function is called immediately before the users main
 *
 * Parameters:
 *  None
@@ -179,7 +185,7 @@ void $Sub$$main(void)
 
     while (1)
     {
-        /* If main returns it is undefined what we should do. */
+        /* If main returns, it is undefined what we should do. */
     }
 }
 
@@ -193,7 +199,7 @@ extern void __cy_stack(void);
 /* Application entry point. */
 extern int main(void);
 
-/* The static objects constructors initializer */
+/* Static objects constructors initializer */
 extern void __libc_init_array(void);
 
 typedef unsigned char __cy_byte_align8 __attribute ((aligned (8)));
@@ -211,6 +217,84 @@ extern const char __cy_region_num __attribute__((weak));
 #define __cy_region_num ((size_t)&__cy_region_num)
 
 
+/*******************************************************************************
+* System Calls of the Red Hat newlib C Library
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: _exit
+********************************************************************************
+*
+* Summary:
+*  Exit a program without cleaning up files. If your system doesn't provide
+*  this, it is best to avoid linking with subroutines that require it (exit,
+*  system).
+*
+* Parameters:
+*  status: Status caused program exit.
+*
+* Return:
+*  None
+*
+*******************************************************************************/
+__attribute__((weak))
+void _exit(int status)
+{
+    /* Cause divide by 0 exception */
+    int x = status / (int) INT_MAX;
+    x = 4 / x;
+
+    while(1)
+    {
+
+    }
+}
+
+
+/*******************************************************************************
+* Function Name: _sbrk
+********************************************************************************
+*
+* Summary:
+*  Increase program data space. As malloc and related functions depend on this,
+*  it is useful to have a working implementation. The following suffices for a
+*  standalone system; it exploits the symbol end automatically defined by the
+*  GNU linker.
+*
+* Parameters:
+*  nbytes: The number of bytes requested (if the parameter value is positive)
+*  from the heap or returned back to the heap (if the parameter value is
+*  negative).
+*
+* Return:
+*  None
+*
+*******************************************************************************/
+__attribute__((weak))
+void * _sbrk (int nbytes)
+{
+    extern int  end;            /* Symbol defined by linker map. Start of free memory (as symbol). */
+    void *      returnValue;
+
+    /* The statically held previous end of the heap, with its initialization. */
+    static void *heapPointer = (void *) &end;                 /* Previous end */
+
+    if (((heapPointer + nbytes) - (void *) &end) <= CYDEV_HEAP_SIZE)
+    {
+        returnValue  = heapPointer;
+        heapPointer += nbytes;
+    }
+    else
+    {
+        errno = ENOMEM;
+        returnValue = (void *) -1;
+    }
+
+    return (returnValue);
+}
+
+
 /*******************************************************************************
 * Function Name: Reset
 ********************************************************************************
@@ -249,17 +333,6 @@ void Reset(void)
     Start_c();
 }
 
-__attribute__((weak))
-void _exit(int status)
-{
-    /* Cause a divide by 0 exception */
-    int x = status / INT_MAX;
-    x = 4 / x;
-
-    while(1)
-    {
-    }
-}
 
 /*******************************************************************************
 * Function Name: Start_c
@@ -267,7 +340,7 @@ void _exit(int status)
 *
 * Summary:
 *  This function handles initializing the .data and .bss sections in
-*  preperation for running standard C code.  Once initialization is complete
+*  preparation for running the standard C code.  Once initialization is complete
 *  it will call main(). This function will never return.
 *
 * Parameters:
@@ -284,7 +357,7 @@ void Start_c(void)
     const struct __cy_region *rptr = __cy_regions;
 
     /* Initialize memory */
-    for (regions = __cy_region_num, rptr = __cy_regions; regions--; rptr++)
+    for (regions = __cy_region_num; regions != 0u; regions--)
     {
         uint32 *src = (uint32 *)rptr->init;
         uint32 *dst = (uint32 *)rptr->data;
@@ -293,13 +366,18 @@ void Start_c(void)
 
         for (count = 0u; count != limit; count += sizeof (uint32))
         {
-            *dst++ = *src++;
+            *dst = *src;
+            dst++;
+            src++;
         }
         limit = rptr->zero_size;
         for (count = 0u; count != limit; count += sizeof (uint32))
         {
-            *dst++ = 0u;
+            *dst = 0u;
+            dst++;
         }
+
+        rptr++;
     }
 
     /* Invoke static objects constructors */
@@ -320,8 +398,8 @@ void Start_c(void)
 ********************************************************************************
 *
 * Summary:
-*  This function perform early initializations for the IAR Embedded
-*  Workbench IDE. It is executed in the context of reset interrupt handler
+*  This function performs early initializations for the IAR Embedded
+*  Workbench IDE. It is executed in the context of a reset interrupt handler
 *  before the data sections are initialized.
 *
 * Parameters:
@@ -383,14 +461,14 @@ int __low_level_init(void)
     const cyisraddress RomVectors[CY_NUM_ROM_VECTORS] =
 #endif  /* defined (__ICCARM__) */
 {
-    INITIAL_STACK_POINTER,   /* The initial stack pointer  0 */
-    #if defined (__ICCARM__) /* The reset handler          1 */
+    INITIAL_STACK_POINTER,   /* Initial stack pointer  0 */
+    #if defined (__ICCARM__) /* Reset handler          1 */
         __iar_program_start,
     #else
         (cyisraddress)&Reset,
     #endif  /* defined (__ICCARM__) */
-    &IntDefaultHandler,      /* The NMI handler            2 */
-    &IntDefaultHandler,      /* The hard fault handler     3 */
+    &IntDefaultHandler,      /* NMI handler            2 */
+    &IntDefaultHandler,      /* Hard fault handler     3 */
 };
 
 #if defined(__ARMCC_VERSION)
@@ -438,7 +516,7 @@ void initialize_psoc(void)
     /* Was stored in CFGMEM to avoid being cleared while SRAM gets cleared */
     CyResetStatus = CY_GET_REG8(CYREG_PHUB_CFGMEM23_CFG1);
 
-    /* Point NVIC at the RAM vector table. */
+    /* Point NVIC at RAM vector table. */
     *CYINT_VECT_TABLE = CyRamVectors;
 
     /* Initialize the configuration registers. */
@@ -446,7 +524,7 @@ void initialize_psoc(void)
 
     #if(0u != DMA_CHANNELS_USED__MASK0)
 
-        /* Setup DMA - only necessary if the design contains a DMA component. */
+        /* Setup DMA - only necessary if design contains DMA component. */
         CyDmacConfigure();
 
     #endif  /* (0u != DMA_CHANNELS_USED__MASK0) */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmGnu.s

@@ -1,12 +1,12 @@
 /*******************************************************************************
 * File Name: CyBootAsmGnu.s
-* Version 4.0
+* Version 4.20
 *
 *  Description:
 *   Assembly routines for GNU as.
 *
 ********************************************************************************
-* Copyright 2010-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2010-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmIar.s

@@ -1,12 +1,12 @@
 ;-------------------------------------------------------------------------------
 ; FILENAME: CyBootAsmIar.s
-; Version 4.0
+; Version 4.20
 ;
 ;  DESCRIPTION:
 ;    Assembly routines for IAR Embedded Workbench IDE.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright 2013, Cypress Semiconductor Corporation.  All rights reserved.
+; Copyright 2013-2014, Cypress Semiconductor Corporation.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions,
 ; disclaimers, and limitations in the end user license agreement accompanying
 ; the software package with which this file was provided.
@@ -30,7 +30,7 @@
 ;
 ;  Note Implementation of CyEnterCriticalSection manipulates the IRQ enable bit
 ;  with interrupts still enabled. The test and set of the interrupt bits is not
-;  atomic. Therefore, to avoid corrupting processor state, it must be the policy 
+;  atomic. Therefore, to avoid a corrupting processor state, it must be the policy 
 ;  that all interrupt routines restore the interrupt enable bits as they were 
 ;  found on entry.
 ;

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyBootAsmRv.s

@@ -1,12 +1,12 @@
 ;-------------------------------------------------------------------------------
 ; FILENAME: CyBootAsmRv.s
-; Version 4.0
+; Version 4.20
 ;
 ;  DESCRIPTION:
 ;    Assembly routines for RealView.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright 2010-2013, Cypress Semiconductor Corporation.  All rights reserved.
+; Copyright 2010-2014, Cypress Semiconductor Corporation.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions,
 ; disclaimers, and limitations in the end user license agreement accompanying
 ; the software package with which this file was provided.
@@ -110,7 +110,7 @@ byte_4 DCB 0x09
 ;
 ;  Note Implementation of CyEnterCriticalSection manipulates the IRQ enable bit
 ;  with interrupts still enabled. The test and set of the interrupt bits is not
-;  atomic; this is true for both PSoC 3 and PSoC 5. Therefore, to avoid
+;  atomic; this is true for both PSoC 3 and PSoC 5. Therefore, to avoid a
 ;  corrupting processor state, it must be the policy that all interrupt routines
 ;  restore the interrupt enable bits as they were found on entry.
 ;

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyDmac.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: CyDmac.c
-* Version 4.0
+* Version 4.20
 *
 * Description:
 *  Provides an API for the DMAC component. The API includes functions for the
@@ -18,10 +18,10 @@
 *  not being used.
 *
 *  This code uses the first byte of each TD to manage the free list of TD's.
-*  The user can over write this once the TD is allocated.
+*  The user can overwrite this once the TD is allocated.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -37,8 +37,8 @@
 * are initialized. To avoid zeroing, these variables should be initialized
 * properly during segments initialization as well.
 *******************************************************************************/
-static uint8  CyDmaTdCurrentNumber = CY_DMA_NUMBEROF_TDS;           /* Current Number of free elements in the list */
-static uint8  CyDmaTdFreeIndex = (uint8)(CY_DMA_NUMBEROF_TDS - 1u); /* Index of the first available TD */
+static uint8  CyDmaTdCurrentNumber = CY_DMA_NUMBEROF_TDS;           /* Current Number of free elements on list */
+static uint8  CyDmaTdFreeIndex = (uint8)(CY_DMA_NUMBEROF_TDS - 1u); /* Index of first available TD */
 static uint32 CyDmaChannels = DMA_CHANNELS_USED__MASK0;              /* Bit map of DMA channel ownership */
 
 
@@ -48,7 +48,7 @@ static uint32 CyDmaChannels = DMA_CHANNELS_USED__MASK0;              /* Bit map
 *
 * Summary:
 *  Creates a linked list of all the TDs to be allocated. This function is called
-*  by the startup code; you do not normally need to call it. You could call this
+*  by the startup code; you do not normally need to call it. You can call this
 *  function if all of the DMA channels are inactive.
 *
 * Parameters:
@@ -72,7 +72,7 @@ void CyDmacConfigure(void)
         CY_DMA_TDMEM_STRUCT_PTR[dmaIndex].TD0[0u] = (uint8)(dmaIndex - 1u);
     }
 
-    /* Make the last one point to zero. */
+    /* Make last one point to zero. */
     CY_DMA_TDMEM_STRUCT_PTR[dmaIndex].TD0[0u] = 0u;
 }
 
@@ -102,8 +102,8 @@ void CyDmacConfigure(void)
 *   are determined by the BUS_TIMEOUT field in the PHUBCFG register.
 *
 * Theory:
-*  Once an error occurs the error bits are sticky and are only cleared by a
-*  write 1 to the error register.
+*  Once an error occurs the error bits are sticky and are only cleared by 
+*  writing 1 to the error register.
 *
 *******************************************************************************/
 uint8 CyDmacError(void) 
@@ -131,15 +131,15 @@ uint8 CyDmacError(void)
 *   Set to 1 when an access is attempted to an invalid address.
 *
 *  DMAC_BUS_TIMEOUT:
-*   Set to 1 when a bus timeout occurs. Cleared by writing a 1. Timeout values
+*   Set to 1 when a bus timeout occurs. Cleared by writing 1. Timeout values
 *   are determined by the BUS_TIMEOUT field in the PHUBCFG register.
 *
 * Return:
 *  None
 *
 * Theory:
-*  Once an error occurs the error bits are sticky and are only cleared by a
-*  write 1 to the error register.
+*  Once an error occurs the error bits are sticky and are only cleared by 
+*  writing 1 to the error register.
 *
 *******************************************************************************/
 void CyDmacClearError(uint8 error) 
@@ -153,7 +153,7 @@ void CyDmacClearError(uint8 error)
 ********************************************************************************
 *
 * Summary:
-*  When an DMAC_BUS_TIMEOUT, DMAC_UNPOP_ACC and DMAC_PERIPH_ERR occurs the
+*  When DMAC_BUS_TIMEOUT, DMAC_UNPOP_ACC, and DMAC_PERIPH_ERR occur the
 *  address of the error is written to the error address register and can be read
 *  with this function.
 *
@@ -198,12 +198,12 @@ uint8 CyDmaChAlloc(void)
     /* Enter critical section! */
     interruptState = CyEnterCriticalSection();
 
-    /* Look for a free channel. */
+    /* Look for free channel. */
     for(dmaIndex = 0u; dmaIndex < CY_DMA_NUMBEROF_CHANNELS; dmaIndex++)
     {
         if(0uL == (CyDmaChannels & channel))
         {
-            /* Mark the channel as used. */
+            /* Mark channel as used. */
             CyDmaChannels |= channel;
             break;
         }
@@ -249,7 +249,7 @@ cystatus CyDmaChFree(uint8 chHandle)
         /* Enter critical section */
         interruptState = CyEnterCriticalSection();
 
-        /* Clear the bit mask that keeps track of ownership. */
+        /* Clear bit mask that keeps track of ownership. */
         CyDmaChannels &= ~(((uint32) 1u) << chHandle);
 
         /* Exit critical section */
@@ -277,10 +277,10 @@ cystatus CyDmaChFree(uint8 chHandle)
 *   Preserves the original TD state when the TD has completed. This parameter
 *   applies to all TDs in the channel.
 *
-*   0 - When a TD is completed, the DMAC leaves the TD configuration values in
+*   0 - When TD is completed, the DMAC leaves the TD configuration values in
 *   their current state, and does not restore them to their original state.
 *
-*   1 - When a TD is completed, the DMAC restores the original configuration
+*   1 - When TD is completed, the DMAC restores the original configuration
 *   values of the TD.
 *
 *  When preserveTds is set, the TD slot that equals the channel number becomes
@@ -309,14 +309,14 @@ cystatus CyDmaChEnable(uint8 chHandle, uint8 preserveTds)
     {
         if (0u != preserveTds)
         {
-            /* Store the intermediate TD states separately in CHn_SEP_TD0/1 to
-            *  preserve the original TD chain
+            /* Store intermediate TD states separately in CHn_SEP_TD0/1 to
+            *  preserve original TD chain
             */
             CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] |= CY_DMA_CH_BASIC_CFG_WORK_SEP;
         }
         else
         {
-            /* Store the intermediate and final TD states on top of the original TD chain */
+            /* Store intermediate and final TD states on top of original TD chain */
             CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] &= (uint8)(~CY_DMA_CH_BASIC_CFG_WORK_SEP);
         }
 
@@ -365,7 +365,7 @@ cystatus CyDmaChDisable(uint8 chHandle)
         /* Disable channel */
         CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] &= ((uint8) (~CY_DMA_CH_BASIC_CFG_EN));
 
-        /* Store the intermediate and final TD states on top of the original TD chain */
+        /* Store intermediate and final TD states on top of original TD chain */
         CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] &= ((uint8) (~CY_DMA_CH_BASIC_CFG_WORK_SEP));
         status = CYRET_SUCCESS;
     }
@@ -379,7 +379,7 @@ cystatus CyDmaChDisable(uint8 chHandle)
 ********************************************************************************
 *
 * Summary:
-*  Clears pending DMA data request.
+*  Clears pending the DMA data request.
 *
 * Parameters:
 *  uint8 chHandle:
@@ -518,7 +518,7 @@ cystatus CyDmaChSetExtendedAddress(uint8 chHandle, uint16 source, uint16 destina
 *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitialize().
 *
 *  uint8 startTd:
-*   The index of TD to set as the first TD associated with the channel. Zero is
+*   Set the TD index as the first TD associated with the channel. Zero is
 *   a valid TD index.
 *
 * Return:
@@ -759,13 +759,13 @@ uint8 CyDmaTdAllocate(void)
 
     if(CyDmaTdCurrentNumber > NUMBEROF_CHANNELS)
     {
-        /* Get pointer to the Next available. */
+        /* Get pointer to Next available. */
         element = CyDmaTdFreeIndex;
 
         /* Decrement the count. */
         CyDmaTdCurrentNumber--;
 
-        /* Update the next available pointer. */
+        /* Update next available pointer. */
         CyDmaTdFreeIndex = CY_DMA_TDMEM_STRUCT_PTR[element].TD0[0];
     }
 
@@ -798,7 +798,7 @@ void CyDmaTdFree(uint8 tdHandle)
         /* Enter critical section! */
         uint8 interruptState = CyEnterCriticalSection();
 
-        /* Get pointer to the Next available. */
+        /* Get pointer to Next available. */
         CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0u] = CyDmaTdFreeIndex;
 
         /* Set new Next Available. */
@@ -942,9 +942,9 @@ cystatus CyDmaTdSetConfiguration(uint8 tdHandle, uint16 transferCount, uint8 nex
 *  CYRET_BAD_PARAM if tdHandle is invalid.
 *
 * Side Effects:
-*  If a TD has a transfer count of N and is executed, the transfer count becomes
+*  If TD has a transfer count of N and is executed, the transfer count becomes
 *  0. If it is reexecuted, the Transfer count of zero will be interpreted as a
-*  request for indefinite transfer. Be careful when requesting a TD with a
+*  request for indefinite transfer. Be careful when requesting TD with a
 *  transfer count of zero.
 *
 *******************************************************************************/
@@ -955,25 +955,25 @@ cystatus CyDmaTdGetConfiguration(uint8 tdHandle, uint16 * transferCount, uint8 *
 
     if(tdHandle < CY_DMA_NUMBEROF_TDS)
     {
-        /* If we have a pointer */
+        /* If we have pointer */
         if(NULL != transferCount)
         {
-            /* Get the 12 bits of the transfer count */
+            /* Get 12 bits of transfer count */
             reg16 *convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0];
             *transferCount = 0x0FFFu & CY_GET_REG16(convert);
         }
 
-        /* If we have a pointer */
+        /* If we have pointer */
         if(NULL != nextTd)
         {
-            /* Get the Next TD pointer */
+            /* Get Next TD pointer */
             *nextTd = CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[2u];
         }
 
-        /* If we have a pointer */
+        /* If we have pointer */
         if(NULL != configuration)
         {
-            /* Get the configuration the TD */
+            /* Get configuration TD */
             *configuration = CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[3u];
         }
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyDmac.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: CyDmac.h
-* Version 4.0
+* Version 4.20
 *
 *  Description:
 *   Provides the function definitions for the DMA Controller.
@@ -10,7 +10,7 @@
 *   System Reference Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -116,7 +116,7 @@ typedef struct dmac_tdmem2_struct
 
 #define CY_DMA_TD_SIZE              0x08u
 
-/* The "u" was removed as workaround for Keil compiler bug */
+/* "u" was removed as workaround for Keil compiler bug */
 #define CY_DMA_TD_SWAP_EN           0x80
 #define CY_DMA_TD_SWAP_SIZE4        0x40
 #define CY_DMA_TD_AUTO_EXEC_NEXT    0x20
@@ -178,7 +178,18 @@ typedef struct dmac_tdmem2_struct
 
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0
+* The following code is OBSOLETE and must not be used.
+*
+* If the obsoleted macro definitions intended for use in the application use the
+* following scheme, redefine your own versions of these definitions:
+*    #ifdef <OBSOLETED_DEFINE>
+*        #undef  <OBSOLETED_DEFINE>
+*        #define <OBSOLETED_DEFINE>      (<New Value>)
+*    #endif
+*
+* Note: Redefine obsoleted macro definitions with caution. They might still be
+*       used in the application and their modification might lead to unexpected
+*       consequences.
 *******************************************************************************/
 #define DMA_INVALID_CHANNEL         (CY_DMA_INVALID_CHANNEL)
 #define DMA_INVALID_TD              (CY_DMA_INVALID_TD)

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyFlash.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: CyFlash.c
-* Version 4.0
+* Version 4.20
 *
 *  Description:
 *   Provides an API for the FLASH/EEPROM.
@@ -13,7 +13,7 @@
 *   System Reference Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation. All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -21,9 +21,12 @@
 
 #include "CyFlash.h"
 
+/*  The number of EEPROM arrays */
+#define CY_FLASH_EEPROM_NUMBER_ARRAYS                 (1u)
+
 
 /*******************************************************************************
-* Holds die temperature, updated by CySetTemp(). Used for flash writting.
+* Holds the die temperature, updated by CySetTemp(). Used for flash writing.
 * The first byte is the sign of the temperature (0 = negative, 1 = positive).
 * The second byte is the magnitude.
 *******************************************************************************/
@@ -35,6 +38,7 @@ uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];
 
 
 static cystatus CySetTempInt(void);
+static cystatus CyFlashGetSpcAlgorithm(void);
 
 
 /*******************************************************************************
@@ -53,13 +57,48 @@ static cystatus CySetTempInt(void);
 *******************************************************************************/
 void CyFlash_Start(void) 
 {
-    /* Active Power Mode */
-    *CY_FLASH_PM_ACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;
+    uint8 interruptState;
+
+    interruptState = CyEnterCriticalSection();
+
+
+    /***************************************************************************
+    * Enable SPC clock. This also internally enables the 36MHz IMO, since this
+    * is required for the SPC to function.
+    ***************************************************************************/
+    CY_FLASH_PM_ACT_CFG0_REG    |= CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC;
+    CY_FLASH_PM_ALTACT_CFG0_REG |= CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC;
+
 
-    /* Standby Power Mode */
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;
+    /***************************************************************************
+    * The wake count defines the number of Bus Clock cycles it takes for the
+    * flash or eeprom to wake up from a low power mode independent of the chip
+    * power mode. Wake up time for these blocks is 5 us.
+    * The granularity of this register is 2 Bus Clock cycles, so a value of 0x1E
+    * (30d) defines the wake up time as 60 cycles of the Bus Clock.
+    * This register needs to be written with a value dependent on the Bus Clock
+    * frequency so that the duration of the cycles is equal to or greater than
+    * the 5 us delay required.
+    ***************************************************************************/
+    CY_FLASH_SPC_FM_EE_WAKE_CNT_REG = CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ;
+
+
+    /***************************************************************************
+    * Enable flash. Active flash macros consume current, but re-enabling a
+    * disabled flash macro takes 5us. If the CPU attempts to fetch out of the
+    * macro during that time, it will be stalled. This bit allows the flash to
+    * be enabled even if the CPU is disabled, which allows a quicker return to
+    * code execution.
+    ***************************************************************************/
+    CY_FLASH_PM_ACT_CFG12_REG    |= CY_FLASH_PM_ACT_CFG12_EN_FM;
+    CY_FLASH_PM_ALTACT_CFG12_REG |= CY_FLASH_PM_ALTACT_CFG12_EN_FM;
+
+    while(0u == (CY_FLASH_SPC_FM_EE_CR_REG & CY_FLASH_EE_EE_AWAKE))
+    {
+        /* Non-zero status denotes that the EEPROM/Flash is awake & powered. */
+    }
 
-    CyDelayUs(CY_FLASH_EE_STARTUP_DELAY);
+    CyExitCriticalSection(interruptState);
 }
 
 
@@ -83,11 +122,14 @@ void CyFlash_Start(void)
 *******************************************************************************/
 void CyFlash_Stop(void) 
 {
-    /* Active Power Mode */
-    *CY_FLASH_PM_ACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));
+    uint8 interruptState;
+
+    interruptState = CyEnterCriticalSection();
+
+    CY_FLASH_PM_ACT_CFG12_REG    &= ((uint8)(~CY_FLASH_PM_ACT_CFG12_EN_FM));
+    CY_FLASH_PM_ALTACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ALTACT_CFG12_EN_FM));
 
-    /* Standby Power Mode */
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));
+    CyExitCriticalSection(interruptState);
 }
 
 
@@ -97,7 +139,7 @@ void CyFlash_Stop(void)
 *
 * Summary:
 *  Sends a command to the SPC to read the die temperature. Sets a global value
-*  used by the Write functions. This function must be called once before
+*  used by the Write function. This function must be called once before
 *  executing a series of Flash writing functions.
 *
 * Parameters:
@@ -153,13 +195,65 @@ static cystatus CySetTempInt(void)
 }
 
 
+/*******************************************************************************
+* Function Name: CyFlashGetSpcAlgorithm
+********************************************************************************
+*
+* Summary:
+*  Sends a command to the SPC to download code into RAM.
+*
+* Parameters:
+*  None
+*
+* Return:
+*  status:
+*   CYRET_SUCCESS - if successful
+*   CYRET_LOCKED  - if Flash writing already in use
+*   CYRET_UNKNOWN - if there was an SPC error
+*
+*******************************************************************************/
+static cystatus CyFlashGetSpcAlgorithm(void) 
+{
+    cystatus status;
+
+    /* Make sure SPC is powered */
+    CySpcStart();
+
+    if(CySpcLock() == CYRET_SUCCESS)
+    {
+        status = CySpcGetAlgorithm();
+
+        if(CYRET_STARTED == status)
+        {
+            while(CY_SPC_BUSY)
+            {
+                /* Spin until idle. */
+                CyDelayUs(1u);
+            }
+
+            if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
+            {
+                status = CYRET_SUCCESS;
+            }
+        }
+        CySpcUnlock();
+    }
+    else
+    {
+        status = CYRET_LOCKED;
+    }
+
+    return (status);
+}
+
+
 /*******************************************************************************
 * Function Name: CySetTemp
 ********************************************************************************
 *
 * Summary:
-*  This is a wraparound for CySetTempInt(). It is used to return second
-*  successful read of temperature value.
+*  This is a wraparound for CySetTempInt(). It is used to return the second
+*  successful read of the temperature value.
 *
 * Parameters:
 *  None
@@ -171,14 +265,14 @@ static cystatus CySetTempInt(void)
 *   CYRET_UNKNOWN if there was an SPC error.
 *
 *  uint8 dieTemperature[2]:
-*   Holds die temperature for the flash writting algorithm. The first byte is
+*   Holds the die temperature for the flash writing algorithm. The first byte is
 *   the sign of the temperature (0 = negative, 1 = positive). The second byte is
 *   the magnitude.
 *
 *******************************************************************************/
 cystatus CySetTemp(void) 
 {
-    cystatus status = CySetTempInt();
+    cystatus status = CyFlashGetSpcAlgorithm();
 
     if(status == CYRET_SUCCESS)
     {
@@ -195,12 +289,12 @@ cystatus CySetTemp(void)
 *
 * Summary:
 *  Sets the user supplied temporary buffer to store SPC data while performing
-*  flash and EEPROM commands. This buffer is only necessary when Flash ECC is
+*  Flash and EEPROM commands. This buffer is only necessary when the Flash ECC is
 *  disabled.
 *
 * Parameters:
 *  buffer:
-*   Address of block of memory to store temporary memory. The size of the block
+*   The address of a block of memory to store temporary memory. The size of the block
 *   of memory is CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE.
 *
 * Return:
@@ -219,10 +313,12 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
 
         if(NULL == buffer)
         {
+            rowBuffer = rowBuffer;
             status = CYRET_BAD_PARAM;
         }
         else if(CySpcLock() != CYRET_SUCCESS)
         {
+            rowBuffer = rowBuffer;
             status = CYRET_LOCKED;
         }
         else
@@ -233,7 +329,7 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
 
     #else
 
-        /* To supress the warning */
+        /* To suppress warning */
         buffer = buffer;
 
     #endif  /* (CYDEV_ECC_ENABLE == 0u) */
@@ -242,120 +338,48 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
 }
 
 
-#if(CYDEV_ECC_ENABLE == 1)
-
-    /*******************************************************************************
-    * Function Name: CyWriteRowData
-    ********************************************************************************
-    *
-    * Summary:
-    *  Sends a command to the SPC to load and program a row of data in
-    *  Flash or EEPROM.
-    *
-    * Parameters:
-    *  arrayID:    ID of the array to write.
-    *   The type of write, Flash or EEPROM, is determined from the array ID.
-    *   The arrays in the part are sequential starting at the first ID for the
-    *   specific memory type. The array ID for the Flash memory lasts from 0x00 to
-    *   0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.
-    *  rowAddress: rowAddress of flash row to program.
-    *  rowData:    Array of bytes to write.
-    *
-    * Return:
-    *  status:
-    *   CYRET_SUCCESS if successful.
-    *   CYRET_LOCKED if the SPC is already in use.
-    *   CYRET_CANCELED if command not accepted
-    *   CYRET_UNKNOWN if there was an SPC error.
-    *
-    *******************************************************************************/
-    cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) 
-    {
-        uint16 rowSize;
-        cystatus status;
-
-        rowSize = (arrayId > CY_SPC_LAST_FLASH_ARRAYID) ? CYDEV_EEPROM_ROW_SIZE : CYDEV_FLS_ROW_SIZE;
-        status = CyWriteRowFull(arrayId, rowAddress, rowData, rowSize);
-
-        return(status);
-    }
-
-#else
-
-    /*******************************************************************************
-    * Function Name: CyWriteRowData
-    ********************************************************************************
-    *
-    * Summary:
-    *   Sends a command to the SPC to load and program a row of data in
-    *   Flash or EEPROM.
-    *
-    * Parameters:
-    *  arrayID      : ID of the array to write.
-    *   The type of write, Flash or EEPROM, is determined from the array ID.
-    *   The arrays in the part are sequential starting at the first ID for the
-    *   specific memory type. The array ID for the Flash memory lasts from 0x00 to
-    *   0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.
-    *  rowAddress   : rowAddress of flash row to program.
-    *  rowData      : Array of bytes to write.
-    *
-    * Return:
-    *  status:
-    *   CYRET_SUCCESS if successful.
-    *   CYRET_LOCKED if the SPC is already in use.
-    *   CYRET_CANCELED if command not accepted
-    *   CYRET_UNKNOWN if there was an SPC error.
-    *
-    *******************************************************************************/
-    cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) 
-    {
-        uint8 i;
-        uint32 offset;
-        uint16 rowSize;
-        cystatus status;
-
-        /* Check whether rowBuffer pointer has been initialized by CySetFlashEEBuffer() */
-        if(NULL != rowBuffer)
-        {
-            if(arrayId > CY_SPC_LAST_FLASH_ARRAYID)
-            {
-                rowSize = CYDEV_EEPROM_ROW_SIZE;
-            }
-            else
-            {
-                rowSize = CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE;
-
-                /* Save the ECC area. */
-                offset = CYDEV_ECC_BASE +
-                        ((uint32)arrayId * CYDEV_ECC_SECTOR_SIZE) +
-                        ((uint32)rowAddress * CYDEV_ECC_ROW_SIZE);
-
-                for(i = 0u; i < CYDEV_ECC_ROW_SIZE; i++)
-                {
-                    *(rowBuffer + CYDEV_FLS_ROW_SIZE + i) = CY_GET_XTND_REG8((void CYFAR *)(offset + i));
-                }
-            }
-
-            /* Copy the rowdata to the temporary buffer. */
-        #if(CY_PSOC3)
-            (void) memcpy((void *) rowBuffer, (void *)((uint32) rowData), (int16) CYDEV_FLS_ROW_SIZE);
-        #else
-            (void) memcpy((void *) rowBuffer, (const void *) rowData, CYDEV_FLS_ROW_SIZE);
-        #endif  /* (CY_PSOC3) */
-
-            status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, rowSize);
-        }
-        else
-        {
-            status = CYRET_UNKNOWN;
-        }
+/*******************************************************************************
+* Function Name: CyWriteRowData
+********************************************************************************
+*
+* Summary:
+*  Sends a command to the SPC to load and program a row of data in
+*  Flash or EEPROM.
+*
+* Parameters:
+*  arrayID:    ID of the array to write.
+*   The type of write, Flash or EEPROM, is determined from the array ID.
+*   The arrays in the part are sequential starting at the first ID for the
+*   specific memory type. The array ID for the Flash memory lasts from 0x00 to
+*   0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.
+*  rowAddress: rowAddress of flash row to program.
+*  rowData:    Array of bytes to write.
+*
+* Return:
+*  status:
+*   CYRET_SUCCESS if successful.
+*   CYRET_LOCKED if the SPC is already in use.
+*   CYRET_CANCELED if command not accepted
+*   CYRET_UNKNOWN if there was an SPC error.
+*
+*******************************************************************************/
+cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) 
+{
+    uint16 rowSize;
+    cystatus status;
 
-        return(status);
-    }
+    rowSize = (arrayId > CY_SPC_LAST_FLASH_ARRAYID) ? CYDEV_EEPROM_ROW_SIZE : CYDEV_FLS_ROW_SIZE;
+    status = CyWriteRowFull(arrayId, rowAddress, rowData, rowSize);
 
-#endif /* (CYDEV_ECC_ENABLE == 0u) */
+    return(status);
+}
 
 
+/*******************************************************************
+* If "Enable Error Correcting Code (ECC)" and "Store Configuration
+* Data in ECC" DWR options are disabled, ECC section is available
+* for user data.
+*******************************************************************/
 #if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))
 
     /*******************************************************************************
@@ -363,7 +387,7 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
     ********************************************************************************
     *
     * Summary:
-    *  Sends a command to the SPC to load and program a row of config data in flash.
+    *  Sends a command to the SPC to load and program a row of config data in the Flash.
     *  This function is only valid for Flash array IDs (not for EEPROM).
     *
     * Parameters:
@@ -371,8 +395,8 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
     *   The arrays in the part are sequential starting at the first ID for the
     *   specific memory type. The array ID for the Flash memory lasts
     *   from 0x00 to 0x3F.
-    *  rowAddress:   Address of the sector to erase.
-    *  rowECC:       Array of bytes to write.
+    *  rowAddress:   The address of the sector to erase.
+    *  rowECC:       The array of bytes to write.
     *
     * Return:
     *  status:
@@ -385,42 +409,9 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
     cystatus CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, const uint8 * rowECC)\
     
     {
-        uint32 offset;
-        uint16 i;
         cystatus status;
 
-        /* Check whether rowBuffer pointer has been initialized by CySetFlashEEBuffer() */
-        if(NULL != rowBuffer)
-        {
-            /* Read the existing flash data. */
-            offset = ((uint32)arrayId * CYDEV_FLS_SECTOR_SIZE) +
-                     ((uint32)rowAddress * CYDEV_FLS_ROW_SIZE);
-
-            #if (CYDEV_FLS_BASE != 0u)
-                offset += CYDEV_FLS_BASE;
-            #endif  /* (CYDEV_FLS_BASE != 0u) */
-
-            for (i = 0u; i < CYDEV_FLS_ROW_SIZE; i++)
-            {
-                rowBuffer[i] = CY_GET_XTND_REG8((void CYFAR *)(offset + i));
-            }
-
-            #if(CY_PSOC3)
-                (void) memcpy((void *)&rowBuffer[CYDEV_FLS_ROW_SIZE],
-                              (void *)(uint32)rowECC,
-                              (int16)CYDEV_ECC_ROW_SIZE);
-            #else
-                (void) memcpy((void *)&rowBuffer[CYDEV_FLS_ROW_SIZE],
-                              (const void *)rowECC,
-                              CYDEV_ECC_ROW_SIZE);
-            #endif  /* (CY_PSOC3) */
-
-            status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE);
-        }
-        else
-        {
-            status = CYRET_UNKNOWN;
-        }
+        status = CyWriteRowFull(arrayId, rowAddress, rowECC, CYDEV_ECC_ROW_SIZE);
 
         return (status);
     }
@@ -433,7 +424,7 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
 * Function Name: CyWriteRowFull
 ********************************************************************************
 * Summary:
-*  Sends a command to the SPC to load and program a row of data in flash.
+*  Sends a command to the SPC to load and program a row of data in the Flash.
 *  rowData array is expected to contain Flash and ECC data if needed.
 *
 * Parameters:
@@ -452,63 +443,107 @@ cystatus CySetFlashEEBuffer(uint8 * buffer)
 cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8* rowData, uint16 rowSize) \
         
 {
-    cystatus status;
+    cystatus status = CYRET_SUCCESS;
 
-    if(CySpcLock() == CYRET_SUCCESS)
+    if((arrayId <=  CY_SPC_LAST_FLASH_ARRAYID) && (arrayId > (CY_FLASH_NUMBER_ARRAYS  + CY_SPC_FIRST_FLASH_ARRAYID)))
     {
-        /* Load row data into SPC internal latch */
-        status = CySpcLoadRow(arrayId, rowData, rowSize);
+        status = CYRET_BAD_PARAM;
+    }
 
-        if(CYRET_STARTED == status)
+    if(arrayId > CY_SPC_LAST_EE_ARRAYID)
+    {
+        status = CYRET_BAD_PARAM;
+    }
+
+    if((arrayId >= CY_SPC_FIRST_EE_ARRAYID) && (arrayId > (CY_FLASH_EEPROM_NUMBER_ARRAYS + CY_SPC_FIRST_EE_ARRAYID)))
+    {
+        status = CYRET_BAD_PARAM;
+    }
+
+    if(arrayId <=  CY_SPC_LAST_FLASH_ARRAYID)
+    {
+        /* Flash */
+        if(rowNumber > (CY_FLASH_NUMBER_ROWS/CY_FLASH_NUMBER_ARRAYS))
         {
-            while(CY_SPC_BUSY)
-            {
-                /* Wait for SPC to finish and get SPC status */
-                CyDelayUs(1u);
-            }
+            status = CYRET_BAD_PARAM;
+        }
+    }
+    else
+    {
+        /* EEPROM */
+        if(rowNumber > (CY_EEPROM_NUMBER_ROWS/CY_FLASH_EEPROM_NUMBER_ARRAYS))
+        {
+            status = CYRET_BAD_PARAM;
+        }
 
-            /* Hide SPC status */
-            if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
-            {
-                status = CYRET_SUCCESS;
-            }
-            else
-            {
-                status = CYRET_UNKNOWN;
-            }
+        if(CY_EEPROM_SIZEOF_ROW != rowSize)
+        {
+            status = CYRET_BAD_PARAM;
+        }
+    }
 
-            if(CYRET_SUCCESS == status)
+    if(rowData == NULL)
+    {
+        status = CYRET_BAD_PARAM;
+    }
+
+
+    if(status == CYRET_SUCCESS)
+    {
+        if(CySpcLock() == CYRET_SUCCESS)
+        {
+            /* Load row data into SPC internal latch */
+            status = CySpcLoadRowFull(arrayId, rowNumber, rowData, rowSize);
+
+            if(CYRET_STARTED == status)
             {
-                /* Erase and program flash with the data from SPC interval latch */
-                status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);
+                while(CY_SPC_BUSY)
+                {
+                    /* Wait for SPC to finish and get SPC status */
+                    CyDelayUs(1u);
+                }
 
-                if(CYRET_STARTED == status)
+                /* Hide SPC status */
+                if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
                 {
-                    while(CY_SPC_BUSY)
-                    {
-                        /* Wait for SPC to finish and get SPC status */
-                        CyDelayUs(1u);
-                    }
+                    status = CYRET_SUCCESS;
+                }
+                else
+                {
+                    status = CYRET_UNKNOWN;
+                }
 
-                    /* Hide SPC status */
-                    if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
-                    {
-                        status = CYRET_SUCCESS;
-                    }
-                    else
+                if(CYRET_SUCCESS == status)
+                {
+                    /* Erase and program flash with data from SPC interval latch */
+                    status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);
+
+                    if(CYRET_STARTED == status)
                     {
-                        status = CYRET_UNKNOWN;
+                        while(CY_SPC_BUSY)
+                        {
+                            /* Wait for SPC to finish and get SPC status */
+                            CyDelayUs(1u);
+                        }
+
+                        /* Hide SPC status */
+                        if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)
+                        {
+                            status = CYRET_SUCCESS;
+                        }
+                        else
+                        {
+                            status = CYRET_UNKNOWN;
+                        }
                     }
                 }
             }
-
+            CySpcUnlock();
+        }   /* if(CySpcLock() == CYRET_SUCCESS) */
+        else
+        {
+            status = CYRET_LOCKED;
         }
-
-        CySpcUnlock();
-    }
-    else
-    {
-        status = CYRET_LOCKED;
     }
 
     return(status);
@@ -521,9 +556,9 @@ cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8* rowData, u
 *
 * Summary:
 *  Sets the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash. This function must be called before increasing CPU
-*  clock frequency. It can optionally be called after lowering CPU clock
-*  frequency in order to improve CPU performance.
+*  coming back from the Flash. This function must be called before increasing the CPU
+*  clock frequency. It can optionally be called after lowering the CPU clock
+*  frequency in order to improve the CPU performance.
 *
 * Parameters:
 *  uint8 freq:
@@ -542,55 +577,42 @@ void CyFlash_SetWaitCycles(uint8 freq)
 
     /***************************************************************************
     * The number of clock cycles the cache will wait before it samples data
-    * coming back from Flash must be equal or greater to to the CPU frequency
+    * coming back from the Flash must be equal or greater to to the CPU frequency
     * outlined in clock cycles.
     ***************************************************************************/
 
-    #if (CY_PSOC3)
-
-        if (freq <= 22u)
-        {
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_22MHz << CY_FLASH_CYCLES_MASK_SHIFT)));
-        }
-        else if (freq <= 44u)
-        {
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_44MHz << CY_FLASH_CYCLES_MASK_SHIFT)));
-        }
-        else
-        {
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |
-                ((uint8)(CY_FLASH_GREATER_44MHz << CY_FLASH_CYCLES_MASK_SHIFT)));
-        }
-
-    #endif  /* (CY_PSOC3) */
-
-
-    #if (CY_PSOC5)
-
-        if (freq <= 16u)
-        {
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_16MHz << CY_FLASH_CYCLES_MASK_SHIFT)));
-        }
-        else if (freq <= 33u)
-        {
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_33MHz << CY_FLASH_CYCLES_MASK_SHIFT)));
-        }
-        else if (freq <= 50u)
-        {
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_50MHz << CY_FLASH_CYCLES_MASK_SHIFT)));
-        }
-        else
-        {
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |
-                ((uint8)(CY_FLASH_GREATER_51MHz << CY_FLASH_CYCLES_MASK_SHIFT)));
-        }
-
-    #endif  /* (CY_PSOC5) */
+    if (freq < CY_FLASH_CACHE_WS_1_FREQ_MAX)
+    {
+        CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
+                                    CY_FLASH_CACHE_WS_1_VALUE_MASK;
+    }
+    else if (freq < CY_FLASH_CACHE_WS_2_FREQ_MAX)
+    {
+        CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
+                                    CY_FLASH_CACHE_WS_2_VALUE_MASK;
+    }
+    else if (freq < CY_FLASH_CACHE_WS_3_FREQ_MAX)
+    {
+        CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
+                                    CY_FLASH_CACHE_WS_3_VALUE_MASK;
+    }
+#if (CY_PSOC5)
+    else if (freq < CY_FLASH_CACHE_WS_4_FREQ_MAX)
+    {
+        CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
+                                    CY_FLASH_CACHE_WS_4_VALUE_MASK;
+    }
+    else if (freq <= CY_FLASH_CACHE_WS_5_FREQ_MAX)
+    {
+        CY_FLASH_CONTROL_REG = (CY_FLASH_CONTROL_REG & (uint8)(~CY_FLASH_CACHE_WS_VALUE_MASK)) |
+                                    CY_FLASH_CACHE_WS_5_VALUE_MASK;
+    }
+#endif  /* (CY_PSOC5) */
+    else
+    {
+        /* Halt CPU in debug mode if frequency is invalid */
+        CYASSERT(0u != 0u);
+    }
 
     /* Restore global interrupt enable state */
     CyExitCriticalSection(interruptState);
@@ -613,11 +635,45 @@ void CyFlash_SetWaitCycles(uint8 freq)
 *******************************************************************************/
 void CyEEPROM_Start(void) 
 {
-    /* Active Power Mode */
-    *CY_FLASH_PM_ACT_EEFLASH_PTR |= CY_FLASH_PM_EE_MASK;
+    uint8 interruptState;
+
+    interruptState = CyEnterCriticalSection();
+
+
+    /***************************************************************************
+    * Enable SPC clock. This also internally enables the 36MHz IMO, since this
+    * is required for the SPC to function.
+    ***************************************************************************/
+    CY_FLASH_PM_ACT_CFG0_REG    |= CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC;
+    CY_FLASH_PM_ALTACT_CFG0_REG |= CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC;
 
-    /* Standby Power Mode */
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_EE_MASK;
+
+    /***************************************************************************
+    * The wake count defines the number of Bus Clock cycles it takes for the
+    * flash or EEPROM to wake up from a low power mode independent of the chip
+    * power mode. Wake up time for these blocks is 5 us.
+    * The granularity of this register is 2 Bus Clock cycles, so a value of 0x1E
+    * (30d) defines the wake up time as 60 cycles of the Bus Clock.
+    * This register needs to be written with a value dependent on the Bus Clock
+    * frequency so that the duration of the cycles is equal to or greater than
+    * the 5 us delay required.
+    ***************************************************************************/
+    CY_FLASH_SPC_FM_EE_WAKE_CNT_REG = CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ;
+
+
+    /***************************************************************************
+    * Enable EEPROM. Re-enabling an EEPROM macro takes 5us. During this time,
+    * the EE will not acknowledge a PHUB request.
+    ***************************************************************************/
+    CY_FLASH_PM_ACT_CFG12_REG    |= CY_FLASH_PM_ACT_CFG12_EN_EE;
+    CY_FLASH_PM_ALTACT_CFG12_REG |= CY_FLASH_PM_ALTACT_CFG12_EN_EE;
+
+    while(0u == (CY_FLASH_SPC_FM_EE_CR_REG & CY_FLASH_EE_EE_AWAKE))
+    {
+        /* Non-zero status denotes that the EEPROM/Flash is awake & powered. */
+    }
+
+    CyExitCriticalSection(interruptState);
 }
 
 
@@ -637,11 +693,14 @@ void CyEEPROM_Start(void)
 *******************************************************************************/
 void CyEEPROM_Stop (void) 
 {
-    /* Active Power Mode */
-    *CY_FLASH_PM_ACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_EE_MASK));
+    uint8 interruptState;
 
-    /* Standby Power Mode */
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_EE_MASK));
+    interruptState = CyEnterCriticalSection();
+
+    CY_FLASH_PM_ACT_CFG12_REG    &= ((uint8)(~CY_FLASH_PM_ACT_CFG12_EN_EE));
+    CY_FLASH_PM_ALTACT_CFG12_REG &= ((uint8)(~CY_FLASH_PM_ALTACT_CFG12_EN_EE));
+
+    CyExitCriticalSection(interruptState);
 }
 
 
@@ -661,12 +720,12 @@ void CyEEPROM_Stop (void)
 *******************************************************************************/
 void CyEEPROM_ReadReserve(void) 
 {
-    /* Make a request for PHUB to have access */
-    *CY_FLASH_EE_SCR_PTR |= CY_FLASH_EE_SCR_AHB_EE_REQ;
+    /* Make request for PHUB to have access */
+    CY_FLASH_EE_SCR_REG |= CY_FLASH_EE_SCR_AHB_EE_REQ;
 
-    while (0u == (*CY_FLASH_EE_SCR_PTR & CY_FLASH_EE_SCR_AHB_EE_ACK))
+    while (0u == (CY_FLASH_EE_SCR_REG & CY_FLASH_EE_SCR_AHB_EE_ACK))
     {
-        /* Wait for acknowledgement from PHUB */
+        /* Wait for acknowledgment from PHUB */
     }
 }
 
@@ -687,7 +746,7 @@ void CyEEPROM_ReadReserve(void)
 *******************************************************************************/
 void CyEEPROM_ReadRelease(void) 
 {
-    *CY_FLASH_EE_SCR_PTR |= 0x00u;
+    CY_FLASH_EE_SCR_REG &= (uint8)(~CY_FLASH_EE_SCR_AHB_EE_REQ);
 }
 
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyFlash.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: CyFlash.h
-* Version 4.0
+* Version 4.20
 *
 *  Description:
 *   Provides the function definitions for the FLASH/EEPROM.
@@ -10,7 +10,7 @@
 *   System Reference Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -41,13 +41,19 @@ extern uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];
 #define CY_FLASH_NUMBER_ROWS        (CYDEV_FLS_SIZE / CYDEV_FLS_ROW_SIZE)
 #define CY_FLASH_NUMBER_ARRAYS      (CYDEV_FLS_SIZE / CYDEV_FLS_SECTOR_SIZE)
 
+#if(CYDEV_ECC_ENABLE == 0)
+    #define CY_FLASH_SIZEOF_FULL_ROW     (CY_FLASH_SIZEOF_ROW + CY_FLASH_SIZEOF_ECC_ROW)
+#else
+    #define CY_FLASH_SIZEOF_FULL_ROW     (CY_FLASH_SIZEOF_ROW)
+#endif  /* (CYDEV_ECC_ENABLE == 0) */
 #define CY_EEPROM_BASE              (CYDEV_EE_BASE)
 #define CY_EEPROM_SIZE              (CYDEV_EE_SIZE)
 #define CY_EEPROM_SIZEOF_ARRAY      (CYDEV_EEPROM_SECTOR_SIZE)
 #define CY_EEPROM_SIZEOF_ROW        (CYDEV_EEPROM_ROW_SIZE)
-#define CY_EEPROM_NUMBER_ROWS       (EEPROM_SIZE / CYDEV_EEPROM_ROW_SIZE)
+#define CY_EEPROM_NUMBER_ROWS       (CYDEV_EE_SIZE / CYDEV_EEPROM_ROW_SIZE)
 #define CY_EEPROM_NUMBER_ARRAYS     (CYDEV_EE_SIZE / CY_EEPROM_SIZEOF_ARRAY)
-
+#define CY_EEPROM_NUMBER_SECTORS    (CYDEV_EE_SIZE / CYDEV_EEPROM_SECTOR_SIZE)
+#define CY_EEPROM_SIZEOF_SECTOR     (CYDEV_EEPROM_SECTOR_SIZE)
 
 #if !defined(CYDEV_FLS_BASE)
     #define CYDEV_FLS_BASE    CYDEV_FLASH_BASE
@@ -85,13 +91,29 @@ void CyEEPROM_ReadRelease(void) ;
 /***************************************
 *     Registers
 ***************************************/
+/* Active Power Mode Configuration Register 0 */
+#define CY_FLASH_PM_ACT_CFG0_REG             (* (reg8 *) CYREG_PM_ACT_CFG0)
+#define CY_FLASH_PM_ACT_CFG0_PTR             (  (reg8 *) CYREG_PM_ACT_CFG0)
+
+/* Alternate Active Power Mode Configuration Register 0 */
+#define CY_FLASH_PM_ALTACT_CFG0_REG          (* (reg8 *) CYREG_PM_STBY_CFG0)
+#define CY_FLASH_PM_ALTACT_CFG0_PTR          (  (reg8 *) CYREG_PM_STBY_CFG0)
+
 /* Active Power Mode Configuration Register 12 */
-#define CY_FLASH_PM_ACT_EEFLASH_REG         (* (reg8 *) CYREG_PM_ACT_CFG12)
-#define CY_FLASH_PM_ACT_EEFLASH_PTR         (  (reg8 *) CYREG_PM_ACT_CFG12)
+#define CY_FLASH_PM_ACT_CFG12_REG            (* (reg8 *) CYREG_PM_ACT_CFG12)
+#define CY_FLASH_PM_ACT_CFG12_PTR            (  (reg8 *) CYREG_PM_ACT_CFG12)
 
 /* Alternate Active Power Mode Configuration Register 12 */
-#define CY_FLASH_PM_ALTACT_EEFLASH_REG      (* (reg8 *) CYREG_PM_STBY_CFG12)
-#define CY_FLASH_PM_ALTACT_EEFLASH_PTR      (  (reg8 *) CYREG_PM_STBY_CFG12)
+#define CY_FLASH_PM_ALTACT_CFG12_REG         (* (reg8 *) CYREG_PM_STBY_CFG12)
+#define CY_FLASH_PM_ALTACT_CFG12_PTR         (  (reg8 *) CYREG_PM_STBY_CFG12)
+
+/* Wake count (BUS_CLK cycles) it takes for the Flash and EEPROM to wake up */
+#define CY_FLASH_SPC_FM_EE_WAKE_CNT_REG      (* (reg8 *) CYREG_SPC_FM_EE_WAKE_CNT)
+#define CY_FLASH_SPC_FM_EE_WAKE_CNT_PTR      (  (reg8 *) CYREG_SPC_FM_EE_WAKE_CNT)
+
+/* Flash macro control register */
+#define CY_FLASH_SPC_FM_EE_CR_REG            (* (reg8 *) CYREG_SPC_FM_EE_CR)
+#define CY_FLASH_SPC_FM_EE_CR_PTR            (  (reg8 *) CYREG_SPC_FM_EE_CR)
 
 
 /* Cache Control Register */
@@ -119,35 +141,64 @@ void CyEEPROM_ReadRelease(void) ;
 ***************************************/
 
 /* Power Mode Masks */
-#define CY_FLASH_PM_EE_MASK                 (0x10u)
-#define CY_FLASH_PM_FLASH_MASK              (0x01u)
 
-/* Frequency Constants */
+/* Enable EEPROM */
+#define CY_FLASH_PM_ACT_CFG12_EN_EE             (0x10u)
+#define CY_FLASH_PM_ALTACT_CFG12_EN_EE          (0x10u)
+
+/* Enable Flash */
 #if (CY_PSOC3)
+    #define CY_FLASH_PM_ACT_CFG12_EN_FM         (0x01u)
+    #define CY_FLASH_PM_ALTACT_CFG12_EN_FM      (0x01u)
+#else
+    #define CY_FLASH_PM_ACT_CFG12_EN_FM         (0x0Fu)
+    #define CY_FLASH_PM_ALTACT_CFG12_EN_FM      (0x0Fu)
+#endif  /* (CY_PSOC3) */
+
 
-    #define CY_FLASH_LESSER_OR_EQUAL_22MHz      (0x01u)
-    #define CY_FLASH_LESSER_OR_EQUAL_44MHz      (0x02u)
-    #define CY_FLASH_GREATER_44MHz              (0x03u)
 
+/* Frequency Constants */
+#if (CY_PSOC3)
+    #define CY_FLASH_CACHE_WS_VALUE_MASK        (0xC0u)
+    #define CY_FLASH_CACHE_WS_1_VALUE_MASK      (0x40u)
+    #define CY_FLASH_CACHE_WS_2_VALUE_MASK      (0x80u)
+    #define CY_FLASH_CACHE_WS_3_VALUE_MASK      (0xC0u)
+
+    #define CY_FLASH_CACHE_WS_1_FREQ_MAX        (22u)
+    #define CY_FLASH_CACHE_WS_2_FREQ_MAX        (44u)
+    #define CY_FLASH_CACHE_WS_3_FREQ_MAX        (67u)
 #endif  /* (CY_PSOC3) */
 
 #if (CY_PSOC5)
-
-    #define CY_FLASH_LESSER_OR_EQUAL_16MHz      (0x01u)
-    #define CY_FLASH_LESSER_OR_EQUAL_33MHz      (0x02u)
-    #define CY_FLASH_LESSER_OR_EQUAL_50MHz      (0x03u)
-    #define CY_FLASH_GREATER_51MHz              (0x00u)
-
+    #define CY_FLASH_CACHE_WS_VALUE_MASK        (0xE0u)
+    #define CY_FLASH_CACHE_WS_1_VALUE_MASK      (0x40u)
+    #define CY_FLASH_CACHE_WS_2_VALUE_MASK      (0x80u)
+    #define CY_FLASH_CACHE_WS_3_VALUE_MASK      (0xC0u)
+    #define CY_FLASH_CACHE_WS_4_VALUE_MASK      (0x00u)
+    #define CY_FLASH_CACHE_WS_5_VALUE_MASK      (0x20u)
+
+    #define CY_FLASH_CACHE_WS_1_FREQ_MAX        (16u)
+    #define CY_FLASH_CACHE_WS_2_FREQ_MAX        (33u)
+    #define CY_FLASH_CACHE_WS_3_FREQ_MAX        (50u)
+    #define CY_FLASH_CACHE_WS_4_FREQ_MAX        (67u)
+    #define CY_FLASH_CACHE_WS_5_FREQ_MAX        (83u)
 #endif  /* (CY_PSOC5) */
 
 #define CY_FLASH_CYCLES_MASK_SHIFT              (0x06u)
 #define CY_FLASH_CYCLES_MASK                    ((uint8)(0x03u << (CY_FLASH_CYCLES_MASK_SHIFT)))
-#define CY_FLASH_EE_STARTUP_DELAY               (5u)
 
 #define CY_FLASH_EE_SCR_AHB_EE_REQ              (0x01u)
 #define CY_FLASH_EE_SCR_AHB_EE_ACK              (0x02u)
 
 
+#define CY_FLASH_EE_EE_AWAKE                    (0x20u)
+
+/* 5(us) * BUS_CLK(80 MHz) / granularity(2) */
+#define CY_FLASH_SPC_FM_EE_WAKE_CNT_80MHZ       (0xC8u)
+
+/* Enable clk_spc. This also internally enables the 36MHz IMO. */
+#define CY_FLASH_PM_ACT_CFG0_EN_CLK_SPC         (0x08u)
+#define CY_FLASH_PM_ALTACT_CFG0_EN_CLK_SPC      (0x08u)
 
 /* Default values for getting temperature. */
 
@@ -167,7 +218,42 @@ void CyEEPROM_ReadRelease(void) ;
 
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0
+* Thne following code is OBSOLETE and must not be used starting with cy_boot
+* 4.20.
+*
+* If the obsoleted macro definitions intended for use in the application use the
+* following scheme, redefine your own versions of these definitions:
+*    #ifdef <OBSOLETED_DEFINE>
+*        #undef  <OBSOLETED_DEFINE>
+*        #define <OBSOLETED_DEFINE>      (<New Value>)
+*    #endif
+*
+* Note: Redefine obsoleted macro definitions with caution. They might still be
+*       used in the application and their modification might lead to unexpected
+*       consequences.
+*******************************************************************************/
+#if (CY_PSOC5)
+    #define CY_FLASH_LESSER_OR_EQUAL_16MHz      (0x01u)
+    #define CY_FLASH_LESSER_OR_EQUAL_33MHz      (0x02u)
+    #define CY_FLASH_LESSER_OR_EQUAL_50MHz      (0x03u)
+    #define CY_FLASH_GREATER_51MHz              (0x00u)
+#endif  /* (CY_PSOC5) */
+
+#if (CY_PSOC3)
+    #define CY_FLASH_LESSER_OR_EQUAL_22MHz      (0x01u)
+    #define CY_FLASH_LESSER_OR_EQUAL_44MHz      (0x02u)
+    #define CY_FLASH_GREATER_44MHz              (0x03u)
+#endif  /* (CY_PSOC3) */
+
+#define CY_FLASH_PM_ACT_EEFLASH_REG         (* (reg8 *) CYREG_PM_ACT_CFG12)
+#define CY_FLASH_PM_ACT_EEFLASH_PTR         (  (reg8 *) CYREG_PM_ACT_CFG12)
+#define CY_FLASH_PM_ALTACT_EEFLASH_REG      (* (reg8 *) CYREG_PM_STBY_CFG12)
+#define CY_FLASH_PM_ALTACT_EEFLASH_PTR      (  (reg8 *) CYREG_PM_STBY_CFG12)
+#define CY_FLASH_PM_EE_MASK                 (0x10u)
+#define CY_FLASH_PM_FLASH_MASK              (0x01u)
+
+/*******************************************************************************
+* The following code is OBSOLETE and must not be used starting with cy_boot 3.0
 *******************************************************************************/
 #define FLASH_SIZE                  (CY_FLASH_SIZE)
 #define FLASH_SIZEOF_SECTOR         (CY_FLASH_SIZEOF_ARRAY)
@@ -177,12 +263,10 @@ void CyEEPROM_ReadRelease(void) ;
 #define EEPROM_SIZEOF_SECTOR        (CY_EEPROM_SIZEOF_ARRAY)
 #define EEPROM_NUMBER_ROWS          (CY_EEPROM_NUMBER_ROWS)
 #define EEPROM_NUMBER_SECTORS       (CY_EEPROM_NUMBER_ARRAYS)
-#define CY_EEPROM_NUMBER_SECTORS    (CY_EEPROM_NUMBER_ARRAYS)
-#define CY_EEPROM_SIZEOF_SECTOR     (CY_EEPROM_SIZEOF_ARRAY)
 
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.30
+* The following code is OBSOLETE and must not be used starting with cy_boot 3.30
 *******************************************************************************/
 #define FLASH_CYCLES_PTR            (CY_FLASH_CONTROL_PTR)
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyLib.c

@@ -1,16 +1,16 @@
 /*******************************************************************************
 * File Name: CyLib.c
-* Version 4.0
+* Version 4.20
 *
 *  Description:
-*   Provides system API for the clocking, interrupts and watchdog timer.
+*   Provides a system API for the clocking, interrupts and watchdog timer.
 *
 *  Note:
 *   Documentation of the API's in this file is located in the
 *   System Reference Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -49,6 +49,12 @@ static uint8 CyUSB_PowerOnCheck(void)  ;
 static void CyIMO_SetTrimValue(uint8 freq) ;
 static void CyBusClk_Internal_SetDivider(uint16 divider);
 
+#if(CY_PSOC5)
+	static cySysTickCallback CySysTickCallbacks[CY_SYS_SYST_NUM_OF_CALLBACKS];
+    static void CySysTickServiceCallbacks(void);
+    uint32 CySysTickInitVar = 0u;
+#endif  /* (CY_PSOC5) */
+
 
 /*******************************************************************************
 * Function Name: CyPLL_OUT_Start
@@ -72,7 +78,7 @@ static void CyBusClk_Internal_SetDivider(uint16 divider);
 *     clock can still be used.
 *
 * Side Effects:
-*  If wait is enabled: This function wses the Fast Time Wheel to time the wait.
+*  If wait is enabled: This function uses the Fast Time Wheel to time the wait.
 *  Any other use of the Fast Time Wheel will be stopped during the period of
 *  this function and then restored. This function also uses the 100 KHz ILO.
 *  If not enabled, this function will enable the 100 KHz ILO for the period of
@@ -95,7 +101,7 @@ cystatus CyPLL_OUT_Start(uint8 wait)
     uint8 pmTwCfg2State;
 
 
-    /* Enables the PLL circuit  */
+    /* Enables PLL circuit  */
     CY_CLK_PLL_CFG0_REG |= CY_CLK_PLL_ENABLE;
 
     if(wait != 0u)
@@ -111,7 +117,7 @@ cystatus CyPLL_OUT_Start(uint8 wait)
 
         while(0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))
         {
-            /* Wait for the interrupt status */
+            /* Wait for interrupt status */
             if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))
             {
                 if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))
@@ -180,11 +186,11 @@ void CyPLL_OUT_Stop(void)
 *  None
 *
 * Side Effects:
-*  If as result of this function execution the CPU clock frequency is increased
+*  If this function execution results in the CPU clock frequency increasing,
 *  then the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-*  with appropriate parameter. It can be optionally called if CPU clock
-*  frequency is lowered in order to improve CPU performance.
+*  coming back from the Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
 *  See CyFlash_SetWaitCycles() description for more information.
 *
 *******************************************************************************/
@@ -235,11 +241,11 @@ void CyPLL_OUT_SetPQ(uint8 pDiv, uint8 qDiv, uint8 current)
 *  None
 *
 * Side Effects:
-*  If as result of this function execution the CPU clock frequency is increased
+*  If this function execution results in the CPU clock frequency increasing,
 *  then the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-*  with appropriate parameter. It can be optionally called if CPU clock
-*  frequency is lowered in order to improve CPU performance.
+*  coming back from the3 Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
 *  See CyFlash_SetWaitCycles() description for more information.
 *
 *******************************************************************************/
@@ -279,7 +285,7 @@ void CyPLL_OUT_SetSource(uint8 source)
 *  None
 *
 * Side Effects:
-*  If wait is enabled: This function wses the Fast Time Wheel to time the wait.
+*  If wait is enabled: This function uses the Fast Time Wheel to time the wait.
 *  Any other use of the Fast Time Wheel will be stopped during the period of
 *  this function and then restored. This function also uses the 100 KHz ILO.
 *  If not enabled, this function will enable the 100 KHz ILO for the period of
@@ -305,7 +311,7 @@ void CyIMO_Start(uint8 wait)
 
     if(0u != wait)
     {
-        /* Need to turn on the 100KHz ILO if it happens to not already be running.*/
+        /* Need to turn on 100KHz ILO if it happens to not already be running.*/
         ilo100KhzEnable = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;
         pmFtwCfg0Reg = CY_LIB_PM_TW_CFG0_REG;
         pmFtwCfg2Reg = CY_LIB_PM_TW_CFG2_REG;
@@ -314,7 +320,7 @@ void CyIMO_Start(uint8 wait)
 
         while (0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))
         {
-            /* Wait for the interrupt status */
+            /* Wait for interrupt status */
         }
 
         if(0u == ilo100KhzEnable)
@@ -442,7 +448,7 @@ static void CyIMO_SetTrimValue(uint8 freq)
         /* If USB is powered */
         if(usbPowerOn == 1u)
         {
-            /* Lock the USB Oscillator */
+            /* Lock USB Oscillator */
             CY_LIB_USB_CR1_REG |= CY_LIB_USB_CLK_EN;
         }
         break;
@@ -477,11 +483,11 @@ static void CyIMO_SetTrimValue(uint8 freq)
 *  None
 *
 * Side Effects:
-*  If as result of this function execution the CPU clock frequency is increased
+*  If this function execution results in the CPU clock frequency increasing,
 *  then the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-*  with appropriate parameter. It can be optionally called if CPU clock
-*  frequency is lowered in order to improve CPU performance.
+*  coming back from the Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
 *  See CyFlash_SetWaitCycles() description for more information.
 *
 *  When the USB setting is chosen, the USB clock locking circuit is enabled.
@@ -495,15 +501,15 @@ void CyIMO_SetFreq(uint8 freq)
     uint8 nextFreq;
 
     /***************************************************************************
-    * When changing the IMO frequency the Trim values must also be set
+    * If the IMO frequency is changed,the Trim values must also be set
     * accordingly.This requires reading the current frequency. If the new
-    * frequency is faster, then set the new trim and then change the frequency,
-    * otherwise change the frequency and then set the new trim values.
+    * frequency is faster, then set a new trim and then change the frequency,
+    * otherwise change the frequency and then set new trim values.
     ***************************************************************************/
 
     currentFreq = CY_LIB_FASTCLK_IMO_CR_REG & ((uint8)(~CY_LIB_FASTCLK_IMO_CR_RANGE_MASK));
 
-    /* Check if the requested frequency is USB. */
+    /* Check if requested frequency is USB. */
     nextFreq = (freq == CY_IMO_FREQ_USB) ? CY_IMO_FREQ_24MHZ : freq;
 
     switch (currentFreq)
@@ -545,11 +551,11 @@ void CyIMO_SetFreq(uint8 freq)
 
     if (nextFreq >= currentFreq)
     {
-        /* Set the new trim first */
+        /* Set new trim first */
         CyIMO_SetTrimValue(freq);
     }
 
-    /* Set the usbclk_on bit when using CY_IMO_FREQ_USB, if not clear it */
+    /* Set usbclk_on bit when using CY_IMO_FREQ_USB, if not clear it */
     switch(freq)
     {
     case CY_IMO_FREQ_3MHZ:
@@ -599,7 +605,7 @@ void CyIMO_SetFreq(uint8 freq)
         break;
     }
 
-    /* Turn on the IMO Doubler, if switching to CY_IMO_FREQ_USB */
+    /* Tu rn onIMO Doubler, if switching to CY_IMO_FREQ_USB */
     if (freq == CY_IMO_FREQ_USB)
     {
         CyIMO_EnableDoubler();
@@ -611,7 +617,7 @@ void CyIMO_SetFreq(uint8 freq)
 
     if (nextFreq < currentFreq)
     {
-        /* Set the new trim after setting the frequency */
+        /* Set the trim after setting frequency */
         CyIMO_SetTrimValue(freq);
     }
 }
@@ -625,7 +631,7 @@ void CyIMO_SetFreq(uint8 freq)
 *  Sets the source of the clock output from the IMO block.
 *
 *  The output from the IMO is by default the IMO itself. Optionally the MHz
-*  Crystal or a DSI input can be the source of the IMO output instead.
+*  Crystal or DSI input can be the source of the IMO output instead.
 *
 * Parameters:
 *   source: CY_IMO_SOURCE_DSI to set the DSI as source.
@@ -636,11 +642,11 @@ void CyIMO_SetFreq(uint8 freq)
 *  None
 *
 * Side Effects:
-*  If as result of this function execution the CPU clock frequency is increased
+*  If this function execution resulted in the CPU clock frequency increasing,
 *  then the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-*  with appropriate parameter. It can be optionally called if CPU clock
-*  frequency is lowered in order to improve CPU performance.
+*  coming back from the Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
 *  See CyFlash_SetWaitCycles() description for more information.
 *
 *******************************************************************************/
@@ -687,7 +693,7 @@ void CyIMO_SetSource(uint8 source)
 *******************************************************************************/
 void CyIMO_EnableDoubler(void) 
 {
-    /* Set the FASTCLK_IMO_CR_PTR regigster's 4th bit */
+    /* Set FASTCLK_IMO_CR_PTR regigster's 4th bit */
     CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_DOUBLER;
 }
 
@@ -733,11 +739,11 @@ void CyIMO_DisableDoubler(void)
 *  The current source and the new source must both be running and stable before
 *  calling this function.
 *
-*  If as result of this function execution the CPU clock frequency is increased
+*  If this function execution resulted in the CPU clock frequency increasing,
 *  then the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-*  with appropriate parameter. It can be optionally called if CPU clock
-*  frequency is lowered in order to improve CPU performance.
+*  coming back from the Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
 *  See CyFlash_SetWaitCycles() description for more information.
 *
 *******************************************************************************/
@@ -757,18 +763,18 @@ void CyMasterClk_SetSource(uint8 source)
 *
 * Parameters:
 *  uint8 divider:
-*   Valid range [0-255]. The clock will be divided by this value + 1.
-*   For example to divide by 2 this parameter should be set to 1.
+*   The valid range is [0-255]. The clock will be divided by this value + 1.
+*   For example to divide this parameter by two should be set to 1.
 *
 * Return:
 *  None
 *
 * Side Effects:
-*  If as result of this function execution the CPU clock frequency is increased
+*  If this function execution resulted in the CPU clock frequency increasing,
 *  then the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-*  with appropriate parameter. It can be optionally called if CPU clock
-*  frequency is lowered in order to improve CPU performance.
+*  coming back from the Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
 *  See CyFlash_SetWaitCycles() description for more information.
 *
 *  When changing the Master or Bus clock divider value from div-by-n to div-by-1
@@ -787,12 +793,12 @@ void CyMasterClk_SetDivider(uint8 divider)
 ********************************************************************************
 *
 * Summary:
-*  Function used by CyBusClk_SetDivider(). For internal use only.
+*  The function used by CyBusClk_SetDivider(). For internal use only.
 *
 * Parameters:
 *   divider: Valid range [0-65535].
 *   The clock will be divided by this value + 1.
-*   For example to divide by 2 this parameter should be set to 1.
+*   For example, to divide this parameter by two should be set to 1.
 *
 * Return:
 *  None
@@ -807,7 +813,7 @@ static void CyBusClk_Internal_SetDivider(uint16 divider)
     /* Enable mask bits to enable shadow loads */
     CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_MASK;
 
-    /* Update Shadow Divider Value Register with the new divider */
+    /* Update Shadow Divider Value Register with new divider */
     CY_LIB_CLKDIST_WRK_LSB_REG = LO8(divider);
     CY_LIB_CLKDIST_WRK_MSB_REG = HI8(divider);
 
@@ -827,21 +833,21 @@ static void CyBusClk_Internal_SetDivider(uint16 divider)
 ********************************************************************************
 *
 * Summary:
-*  Sets the divider value used to generate Bus Clock.
+*  Sets the divider value used to generate the Bus Clock.
 *
 * Parameters:
 *  divider: Valid range [0-65535]. The clock will be divided by this value + 1.
-*  For example to divide by 2 this parameter should be set to 1.
+*  For example, to divide this parameter by two should be set to 1.
 *
 * Return:
 *  None
 *
 * Side Effects:
-*  If as result of this function execution the CPU clock frequency is increased
+*  If this function execution resulted in the CPU clock frequency increasing,
 *  then the number of clock cycles the cache will wait before it samples data
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-*  with appropriate parameter. It can be optionally called if CPU clock
-*  frequency is lowered in order to improve CPU performance.
+*  coming back from the Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
 *  See CyFlash_SetWaitCycles() description for more information.
 *
 *******************************************************************************/
@@ -853,13 +859,13 @@ void CyBusClk_SetDivider(uint16 divider)
 
     interruptState = CyEnterCriticalSection();
 
-    /* Work around to set the bus clock divider value */
+    /* Work around to set bus clock divider value */
     busClkDiv = (uint16)((uint16)CY_LIB_CLKDIST_BCFG_MSB_REG << 8u);
     busClkDiv |= CY_LIB_CLKDIST_BCFG_LSB_REG;
 
     if ((divider == 0u) || (busClkDiv == 0u))
     {
-        /* Save away the master clock divider value */
+        /* Save away master clock divider value */
         masterClkDiv = CY_LIB_CLKDIST_MSTR0_REG;
 
         if (masterClkDiv < CY_LIB_CLKDIST_MASTERCLK_DIV)
@@ -870,7 +876,7 @@ void CyBusClk_SetDivider(uint16 divider)
 
         if (divider == 0u)
         {
-            /* Set the SSS bit and the divider register desired value */
+            /* Set SSS bit and divider register desired value */
             CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_SSS;
             CyBusClk_Internal_SetDivider(divider);
         }
@@ -880,7 +886,7 @@ void CyBusClk_SetDivider(uint16 divider)
             CY_LIB_CLKDIST_BCFG2_REG &= ((uint8)(~CY_LIB_CLKDIST_BCFG2_SSS));
         }
 
-        /* Restore the master clock */
+        /* Restore master clock */
         CyMasterClk_SetDivider(masterClkDiv);
     }
     else
@@ -904,17 +910,17 @@ void CyBusClk_SetDivider(uint16 divider)
     *
     * Parameters:
     *  divider: Valid range [0-15]. The clock will be divided by this value + 1.
-    *  For example to divide by 2 this parameter should be set to 1.
+    *  For example, to divide this parameter by two should be set to 1.
     *
     * Return:
     *  None
     *
     * Side Effects:
-    *  If as result of this function execution the CPU clock frequency is increased
-    *  then the number of clock cycles the cache will wait before it samples data
-    *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()
-    *  with appropriate parameter. It can be optionally called if CPU clock
-    *  frequency is lowered in order to improve CPU performance.
+    *  If this function execution resulted in the CPU clock frequency increasing,
+*  then the number of clock cycles the cache will wait before it samples data
+*  coming back from the Flash must be adjusted by calling CyFlash_SetWaitCycles()
+*  with an appropriate parameter. It can be optionally called if the CPU clock
+*  frequency is lowered in order to improve the CPU performance.
     *  See CyFlash_SetWaitCycles() description for more information.
     *
     *******************************************************************************/
@@ -972,7 +978,7 @@ void CyUsbClk_SetSource(uint8 source)
 *******************************************************************************/
 void CyILO_Start1K(void) 
 {
-    /* Set the bit 1 of ILO RS */
+    /* Set bit 1 of ILO RS */
     CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_1KHZ;
 }
 
@@ -984,7 +990,7 @@ void CyILO_Start1K(void)
 * Summary:
 *  Disables the ILO 1 KHz oscillator.
 *
-*  Note The ILO 1 KHz oscillator must be enabled if Sleep or Hibernate low power
+*  Note The ILO 1 KHz oscillator must be enabled if the Sleep or Hibernate low power
 *  mode APIs are expected to be used. For more information, refer to the Power
 *  Management section of this document.
 *
@@ -1000,7 +1006,7 @@ void CyILO_Start1K(void)
 *******************************************************************************/
 void CyILO_Stop1K(void) 
 {
-    /* Clear the bit 1 of ILO RS */
+    /* Clear bit 1 of ILO RS */
     CY_LIB_SLOWCLK_ILO_CR0_REG &= ((uint8)(~CY_LIB_SLOWCLK_ILO_CR0_EN_1KHZ));
 }
 
@@ -1064,7 +1070,7 @@ void CyILO_Stop100K(void)
 *******************************************************************************/
 void CyILO_Enable33K(void) 
 {
-    /* Set the bit 5 of ILO RS */
+    /* Set bit 5 of ILO RS */
     CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_33KHZ;
 }
 
@@ -1141,7 +1147,7 @@ uint8 CyILO_SetPowerMode(uint8 mode)
     /* Get current state. */
     state = CY_LIB_SLOWCLK_ILO_CR0_REG;
 
-    /* Set the the oscillator power mode. */
+    /* Set the oscillator power mode. */
     if(mode != CY_ILO_FAST_START)
     {
         CY_LIB_SLOWCLK_ILO_CR0_REG = (state | CY_ILO_CONTROL_PD_MODE);
@@ -1151,7 +1157,7 @@ uint8 CyILO_SetPowerMode(uint8 mode)
         CY_LIB_SLOWCLK_ILO_CR0_REG = (state & ((uint8)(~CY_ILO_CONTROL_PD_MODE)));
     }
 
-    /* Return the old mode. */
+    /* Return old mode. */
     return ((state & CY_ILO_CONTROL_PD_MODE) >> CY_ILO_CONTROL_PD_POSITION);
 }
 
@@ -1183,14 +1189,14 @@ void CyXTAL_32KHZ_Start(void)
         CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_PDBEN;
     #endif  /* (CY_PSOC3) */
 
-    /* Enable operation of the 32K Crystal Oscillator */
+    /* Enable operation of 32K Crystal Oscillator */
     CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_EN;
 
     for (i = 1000u; i > 0u; i--)
     {
         if(0u != (CyXTAL_32KHZ_ReadStatus() & CY_XTAL32K_ANA_STAT))
         {
-            /* Ready - switch to the hign power mode */
+            /* Ready - switch to high power mode */
             (void) CyXTAL_32KHZ_SetPowerMode(0u);
 
             break;
@@ -1256,9 +1262,9 @@ uint8 CyXTAL_32KHZ_ReadStatus(void)
 ********************************************************************************
 *
 * Summary:
-*  Sets the power mode for the 32 KHz oscillator used during sleep mode.
+*  Sets the power mode for the 32 KHz oscillator used during the sleep mode.
 *  Allows for lower power during sleep when there are fewer sources of noise.
-*  During active mode the oscillator is always run in high power mode.
+*  During the active mode the oscillator is always run in the high power mode.
 *
 * Parameters:
 *  uint8 mode
@@ -1345,7 +1351,7 @@ cystatus CyXTAL_Start(uint8 wait)
     uint8 pmTwCfg2Tmp;
 
 
-    /* Enables the MHz crystal oscillator circuit  */
+    /* Enables MHz crystal oscillator circuit  */
     CY_CLK_XMHZ_CSR_REG |= CY_CLK_XMHZ_CSR_ENABLE;
 
 
@@ -1366,19 +1372,19 @@ cystatus CyXTAL_Start(uint8 wait)
             /* Read XERR bit to clear it */
             (void) CY_CLK_XMHZ_CSR_REG;
 
-            /* Wait for a millisecond - 4 x 250 us */
+            /* Wait for 1 millisecond - 4 x 250 us */
             for(count = 4u; count > 0u; count--)
             {
                 while(0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))
                 {
-                    /* Wait for the FTW interrupt event */
+                    /* Wait for FTW interrupt event */
                 }
             }
 
 
             /*******************************************************************
-            * High output indicates oscillator failure.
-            * Only can be used after start-up interval (1 ms) is completed.
+            * High output indicates an oscillator failure.
+            * Only can be used after a start-up interval (1 ms) is completed.
             *******************************************************************/
             if(0u == (CY_CLK_XMHZ_CSR_REG & CY_CLK_XMHZ_CSR_XERR))
             {
@@ -1417,7 +1423,7 @@ cystatus CyXTAL_Start(uint8 wait)
 *******************************************************************************/
 void CyXTAL_Stop(void) 
 {
-    /* Disable the the oscillator. */
+    /* Disable oscillator. */
     FASTCLK_XMHZ_CSR &= ((uint8)(~XMHZ_CONTROL_ENABLE));
 }
 
@@ -1472,7 +1478,7 @@ void CyXTAL_DisableErrStatus(void)
 *
 * Summary:
 *  Reads the XERR status bit for the megahertz crystal. This status bit is a
-*  sticky clear on read value. This function is not available for PSoC5.
+*  sticky, clear on read. This function is not available for PSoC5.
 *
 * Parameters:
 *  None
@@ -1486,8 +1492,8 @@ void CyXTAL_DisableErrStatus(void)
 uint8 CyXTAL_ReadStatus(void) 
 {
     /***************************************************************************
-    * High output indicates oscillator failure. Only use this after start-up
-    * interval is completed. This can be used for status and failure recovery.
+    * High output indicates an oscillator failure. Only use this after a start-up
+    * interval is completed. This can be used for the status and failure recovery.
     ***************************************************************************/
     return((0u != (CY_CLK_XMHZ_CSR_REG & CY_CLK_XMHZ_CSR_XERR)) ? 1u : 0u);
 }
@@ -1501,7 +1507,7 @@ uint8 CyXTAL_ReadStatus(void)
 *  Enables the fault recovery circuit which will switch to the IMO in the case
 *  of a fault in the megahertz crystal circuit. The crystal must be up and
 *  running with the XERR bit at 0, before calling this function to prevent
-*  immediate fault switchover. This function is not available for PSoC5.
+*  an immediate fault switchover. This function is not available for PSoC5.
 *
 * Parameters:
 *  None
@@ -1543,7 +1549,7 @@ void CyXTAL_DisableFaultRecovery(void)
 ********************************************************************************
 *
 * Summary:
-*  Sets the startup settings for the crystal. Logic model outputs a frequency
+*  Sets the startup settings for the crystal. The logic model outputs a frequency
 *  (setting + 4) MHz when enabled.
 *
 *  This is artificial as the actual frequency is determined by an attached
@@ -1551,7 +1557,7 @@ void CyXTAL_DisableFaultRecovery(void)
 *
 * Parameters:
 *  setting: Valid range [0-31].
-*   Value is dependent on the frequency and quality of the crystal being used.
+*   The value is dependent on the frequency and quality of the crystal being used.
 *   Refer to the device TRM and datasheet for more information.
 *
 * Return:
@@ -1648,7 +1654,7 @@ void CyHalt(uint8 reason) CYREENTRANT
 ********************************************************************************
 *
 * Summary:
-*  Forces a software reset of the device.
+*  Forces a device software reset.
 *
 * Parameters:
 *  None
@@ -1672,9 +1678,9 @@ void CySoftwareReset(void)
 *
 *  Note:
 *  CyDelay has been implemented with the instruction cache assumed enabled. When
-*  instruction cache is disabled on PSoC5, CyDelay will be two times larger. For
-*  example, with instruction cache disabled CyDelay(100) would result in about
-*  200 ms delay instead of 100 ms.
+*  the instruction cache is disabled on PSoC5, CyDelay will be two times larger.
+*  For example, with instruction cache disabled CyDelay(100) would result in
+*  about 200 ms delay instead of 100 ms.
 *
 * Parameters:
 *  milliseconds: number of milliseconds to delay.
@@ -1724,8 +1730,8 @@ void CyDelay(uint32 milliseconds) CYREENTRANT
     *
     * Side Effects:
     *  CyDelayUS has been implemented with the instruction cache assumed enabled.
-    *  When instruction cache is disabled on PSoC 5, CyDelayUs will be two times
-    *  larger. For example, with instruction cache disabled CyDelayUs(100) would
+    *  When the instruction cache is disabled on PSoC 5, CyDelayUs will be two times
+    *  larger. For example, with the instruction cache disabled CyDelayUs(100) would
     *  result in about 200 us delay instead of 100 us.
     *
     *  If the bus clock frequency is a small non-integer number, the actual delay
@@ -1745,10 +1751,10 @@ void CyDelay(uint32 milliseconds) CYREENTRANT
 ********************************************************************************
 *
 * Summary:
-*  Sets clock frequency for CyDelay.
+*  Sets the clock frequency for CyDelay.
 *
 * Parameters:
-*  freq: Frequency of bus clock in Hertz.
+*  freq: The frequency of the bus clock in Hertz.
 *
 * Return:
 *  None
@@ -1779,7 +1785,7 @@ void CyDelayFreq(uint32 freq) CYREENTRANT
 *  Enables the watchdog timer.
 *
 *  The timer is configured for the specified count interval, the central
-*  timewheel is cleared, the setting for low power mode is configured and the
+*  timewheel is cleared, the setting for the low power mode is configured and the
 *  watchdog timer is enabled.
 *
 *  Once enabled the watchdog cannot be disabled. The watchdog counts each time
@@ -1826,11 +1832,11 @@ void CyWdtStart(uint8 ticks, uint8 lpMode)
     CY_WDT_CFG_REG |= CY_WDT_CFG_CTW_RESET;
     CY_WDT_CFG_REG &= ((uint8)(~CY_WDT_CFG_CTW_RESET));
 
-    /* Setting the low power mode */
+    /* Setting low power mode */
     CY_WDT_CFG_REG = (((uint8)(lpMode << CY_WDT_CFG_LPMODE_SHIFT)) & CY_WDT_CFG_LPMODE_MASK) |
                        (CY_WDT_CFG_REG & ((uint8)(~CY_WDT_CFG_LPMODE_MASK)));
 
-    /* Enables the watchdog reset */
+    /* Enables watchdog reset */
     CY_WDT_CFG_REG |= CY_WDT_CFG_WDR_EN;
 }
 
@@ -1862,16 +1868,16 @@ void CyWdtClear(void)
 *
 * Summary:
 *  Enables the digital low voltage monitors to generate interrupt on Vddd
-*   archives specified threshold and optionally resets device.
+*   archives specified threshold and optionally resets the device.
 *
 * Parameters:
-*  reset: Option to reset device at a specified Vddd threshold:
+*  reset: The option to reset the device at a specified Vddd threshold:
 *           0 - Device is not reset.
 *           1 - Device is reset.
 *
 *  threshold: Sets the trip level for the voltage monitor.
-*  Values from 1.70 V to 5.45 V are accepted with the approximately 250 mV
-*  interval.
+*  Values from 1.70 V to 5.45 V are accepted with an interval  of approximately
+*  250 mV.
 *
 * Return:
 *  None
@@ -1887,7 +1893,7 @@ void CyVdLvDigitEnable(uint8 reset, uint8 threshold)
                             (CY_VD_LVI_TRIP_REG & ((uint8)(~CY_VD_LVI_TRIP_LVID_MASK)));
     CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_LVID_EN;
 
-    /* Timeout to eliminate glitches on the LVI/HVI when enabling */
+    /* Timeout to eliminate glitches on LVI/HVI when enabling */
     CyDelayUs(1u);
 
     (void)CY_VD_PERSISTENT_STATUS_REG;
@@ -1912,10 +1918,10 @@ void CyVdLvDigitEnable(uint8 reset, uint8 threshold)
 *
 * Summary:
 *  Enables the analog low voltage monitors to generate interrupt on Vdda
-*   archives specified threshold and optionally resets device.
+*   archives specified threshold and optionally resets the device.
 *
 * Parameters:
-*  reset: Option to reset device at a specified Vdda threshold:
+*  reset: The option to reset the device at a specified Vdda threshold:
 *           0 - Device is not reset.
 *           1 - Device is reset.
 *
@@ -1936,7 +1942,7 @@ void CyVdLvAnalogEnable(uint8 reset, uint8 threshold)
     CY_VD_LVI_TRIP_REG = ((uint8)(threshold << 4u)) | (CY_VD_LVI_TRIP_REG & 0x0Fu);
     CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_LVIA_EN;
 
-    /* Timeout to eliminate glitches on the LVI/HVI when enabling */
+    /* Timeout to eliminate glitches on LVI/HVI when enabling */
     CyDelayUs(1u);
 
     (void)CY_VD_PERSISTENT_STATUS_REG;
@@ -2258,31 +2264,14 @@ void CyEnableInts(uint32 mask)
         CY_NOP;
         CY_NOP;
 
-        /* All entries in the cache are invalidated on the next clock cycle. */
+        /* All entries in cache are invalidated on next clock cycle. */
         CY_CACHE_CONTROL_REG |= CY_CACHE_CONTROL_FLUSH;
 
+        /* Once this is executed it's guaranteed the cache has been flushed */
+        (void) CY_CACHE_CONTROL_REG;
 
-        /***********************************************************************
-        * The prefetch unit could/would be filled with the instructions that
-        * succeed the flush. Since a flush is desired then theoretically those
-        * instructions might be considered stale/invalid.
-        ***********************************************************************/
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
-        CY_NOP;
+        /* Flush the pipeline */
+        CY_SYS_ISB;
 
         /* Restore global interrupt enable state */
         CyExitCriticalSection(interruptState);
@@ -2298,8 +2287,18 @@ void CyEnableInts(uint32 mask)
     *  SysTick, PendSV and others.
     *
     * Parameters:
-    *  number: Interrupt number, valid range [0-15].
-       address: Pointer to an interrupt service routine.
+    *  number: System interrupt number:
+    *    CY_INT_NMI_IRQN                - Non Maskable Interrupt
+    *    CY_INT_HARD_FAULT_IRQN         - Hard Fault Interrupt
+    *    CY_INT_MEM_MANAGE_IRQN         - Memory Management Interrupt
+    *    CY_INT_BUS_FAULT_IRQN          - Bus Fault Interrupt
+    *    CY_INT_USAGE_FAULT_IRQN        - Usage Fault Interrupt
+    *    CY_INT_SVCALL_IRQN             - SV Call Interrupt
+    *    CY_INT_DEBUG_MONITOR_IRQN      - Debug Monitor Interrupt
+    *    CY_INT_PEND_SV_IRQN            - Pend SV Interrupt
+    *    CY_INT_SYSTICK_IRQN            - System Tick Interrupt
+    *
+    *  address: Pointer to an interrupt service routine.
     *
     * Return:
     *   The old ISR vector at this location.
@@ -2332,7 +2331,16 @@ void CyEnableInts(uint32 mask)
     *  SysTick, PendSV and others.
     *
     * Parameters:
-    *   number: The interrupt number, valid range [0-15].
+    *  number: System interrupt number:
+    *    CY_INT_NMI_IRQN                - Non Maskable Interrupt
+    *    CY_INT_HARD_FAULT_IRQN         - Hard Fault Interrupt
+    *    CY_INT_MEMORY_MANAGEMENT_IRQN  - Memory Management Interrupt
+    *    CY_INT_BUS_FAULT_IRQN          - Bus Fault Interrupt
+    *    CY_INT_USAGE_FAULT_IRQN        - Usage Fault Interrupt
+    *    CY_INT_SVCALL_IRQN             - SV Call Interrupt
+    *    CY_INT_DEBUG_MONITOR_IRQN      - Debug Monitor Interrupt
+    *    CY_INT_PEND_SV_IRQN            - Pend SV Interrupt
+    *    CY_INT_SYSTICK_IRQN            - System Tick Interrupt
     *
     * Return:
     *   Address of the ISR in the interrupt vector table.
@@ -2390,7 +2398,7 @@ void CyEnableInts(uint32 mask)
     *  number: Valid range [0-31].  Interrupt number
     *
     * Return:
-    *  Address of the ISR in the interrupt vector table.
+    *  The address of the ISR in the interrupt vector table.
     *
     *******************************************************************************/
     cyisraddress CyIntGetVector(uint8 number)
@@ -2471,10 +2479,10 @@ void CyEnableInts(uint32 mask)
 
         CYASSERT(number <= CY_INT_NUMBER_MAX);
 
-        /* Get a pointer to the Interrupt enable register. */
+        /* Get pointer to Interrupt enable register. */
         stateReg = CY_INT_ENABLE_PTR;
 
-        /* Get the state of the interrupt. */
+        /* Get state of interrupt. */
         return (0u != (*stateReg & (((uint32) 1u) << (0x1Fu & number)))) ? ((uint8)(1u)) : ((uint8)(0u));
     }
 
@@ -2609,10 +2617,10 @@ void CyEnableInts(uint32 mask)
 
         CYASSERT(number <= CY_INT_NUMBER_MAX);
 
-        /* Get a pointer to the Interrupt enable register. */
+        /* Get pointer to Interrupt enable register. */
         stateReg = CY_INT_ENABLE_PTR + ((number & CY_INT_NUMBER_MASK) >> 3u);
 
-        /* Get the state of the interrupt. */
+        /* Get state of interrupt. */
         return ((0u != (*stateReg & ((uint8)(1u << (0x07u & number))))) ? ((uint8)(1u)) : ((uint8)(0u)));
     }
 
@@ -2630,20 +2638,20 @@ void CyEnableInts(uint32 mask)
     *  If 1 is passed as a parameter:
     *   - if any of the SC blocks are used - enable pumps for the SC blocks and
     *     start boost clock.
-    *   - For the each enabled SC block set boost clock index and enable boost
+    *   - For each enabled SC block set a boost clock index and enable the boost
     *     clock.
     *
     *  If non-1 value is passed as a parameter:
     *   - If all SC blocks are not used - disable pumps for the SC blocks and
-    *     stop boost clock.
-    *   - For the each enabled SC block clear boost clock index and disable boost
+    *     stop the boost clock.
+    *   - For each enabled SC block clear the boost clock index and disable the  boost
     *     clock.
     *
-    *  The global variable CyScPumpEnabled is updated to be equal to passed
+    *  The global variable CyScPumpEnabled is updated to be equal to passed the
     *  parameter.
     *
     * Parameters:
-    *   uint8 enable: Enable/disable SC pumps and boost clock for enabled SC block.
+    *   uint8 enable: Enable/disable SC pumps and the boost clock for the enabled SC block.
     *                 1 - Enable
     *                 0 - Disable
     *
@@ -2707,4 +2715,391 @@ void CyEnableInts(uint32 mask)
 #endif  /* (CYDEV_VARIABLE_VDDA == 1) */
 
 
+#if(CY_PSOC5)
+    /*******************************************************************************
+    * Function Name: CySysTickStart
+    ********************************************************************************
+    *
+    * Summary:
+    *  Configures the SysTick timer to generate interrupt every 1 ms by call to the
+    *  CySysTickInit() function and starts it by calling CySysTickEnable() function.
+    *  Refer to the corresponding function description for the details.
+
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    * Side Effects:
+    *  Clears SysTick count flag if it was set
+    *
+    *******************************************************************************/
+    void CySysTickStart(void)
+    {
+        if (0u == CySysTickInitVar)
+        {
+            CySysTickInit();
+            CySysTickInitVar = 1u;
+        }
+
+        CySysTickEnable();
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickInit
+    ********************************************************************************
+    *
+    * Summary:
+    *  Initializes the callback addresses with pointers to NULL, associates the
+    *  SysTick system vector with the function that is responsible for calling
+    *  registered callback functions, configures SysTick timer to generate interrupt
+    * every 1 ms.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    * Side Effects:
+    *  Clears SysTick count flag if it was set.
+    *
+    *  The 1 ms interrupt interval is configured based on the frequency determined
+    *  by PSoC Creator at build time. If System clock frequency is changed in
+    *  runtime, the CyDelayFreq() with the appropriate parameter should be called.
+    *
+    *******************************************************************************/
+    void CySysTickInit(void)
+    {
+        uint32 i;
+
+        for (i = 0u; i<CY_SYS_SYST_NUM_OF_CALLBACKS; i++)
+        {
+            CySysTickCallbacks[i] = (void *) 0;
+        }
+
+    	(void) CyIntSetSysVector(CY_INT_SYSTICK_IRQN, &CySysTickServiceCallbacks);
+        CySysTickSetClockSource(CY_SYS_SYST_CSR_CLK_SRC_SYSCLK);
+        CySysTickSetReload(cydelay_freq_hz/1000u);
+        CySysTickClear();
+        CyIntEnable(CY_INT_SYSTICK_IRQN);
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickEnable
+    ********************************************************************************
+    *
+    * Summary:
+    *  Enables the SysTick timer and its interrupt.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    * Side Effects:
+    *  Clears SysTick count flag if it was set
+    *
+    *******************************************************************************/
+    void CySysTickEnable(void)
+    {
+        CySysTickEnableInterrupt();
+        CY_SYS_SYST_CSR_REG |= CY_SYS_SYST_CSR_ENABLE;
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickStop
+    ********************************************************************************
+    *
+    * Summary:
+    *  Stops the system timer (SysTick).
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    * Side Effects:
+    *  Clears SysTick count flag if it was set
+    *
+    *******************************************************************************/
+    void CySysTickStop(void)
+    {
+        CY_SYS_SYST_CSR_REG &= ((uint32) ~(CY_SYS_SYST_CSR_ENABLE));
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickEnableInterrupt
+    ********************************************************************************
+    *
+    * Summary:
+    *  Enables the SysTick interrupt.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    * Side Effects:
+    *  Clears SysTick count flag if it was set
+    *
+    *******************************************************************************/
+    void CySysTickEnableInterrupt(void)
+    {
+        CY_SYS_SYST_CSR_REG |= CY_SYS_SYST_CSR_ENABLE_INT;
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickDisableInterrupt
+    ********************************************************************************
+    *
+    * Summary:
+    *  Disables the SysTick interrupt.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    * Side Effects:
+    *  Clears SysTick count flag if it was set
+    *
+    *******************************************************************************/
+    void CySysTickDisableInterrupt(void)
+    {
+        CY_SYS_SYST_CSR_REG &= ((uint32) ~(CY_SYS_SYST_CSR_ENABLE_INT));
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickSetReload
+    ********************************************************************************
+    *
+    * Summary:
+    *  Sets value the counter is set to on startup and after it reaches zero. This
+    *  function do not change or reset current sysTick counter value, so it should
+    *  be cleared using CySysTickClear() API.
+    *
+    * Parameters:
+    *  value: Valid range [0x0-0x00FFFFFF]. Counter reset value.
+    *
+    * Return:
+    *  None
+    *
+    *******************************************************************************/
+    void CySysTickSetReload(uint32 value)
+    {
+        CY_SYS_SYST_RVR_REG = (value & CY_SYS_SYST_RVR_CNT_MASK);
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickGetReload
+    ********************************************************************************
+    *
+    * Summary:
+    *  Sets value the counter is set to on startup and after it reaches zero.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  Counter reset value
+    *
+    *******************************************************************************/
+    uint32 CySysTickGetReload(void)
+    {
+        return(CY_SYS_SYST_RVR_REG & CY_SYS_SYST_RVR_CNT_MASK);
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickGetValue
+    ********************************************************************************
+    *
+    * Summary:
+    *  Gets current SysTick counter value.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  Current SysTick counter value
+    *
+    *******************************************************************************/
+    uint32 CySysTickGetValue(void)
+    {
+        return(CY_SYS_SYST_RVR_REG & CY_SYS_SYST_CVR_REG);
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickSetClockSource
+    ********************************************************************************
+    *
+    * Summary:
+    *  Sets the clock source for the SysTick counter.
+    *
+    * Parameters:
+    *  clockSource: Clock source for SysTick counter
+    *         Define                     Clock Source
+    *   CY_SYS_SYST_CSR_CLK_SRC_SYSCLK     SysTick is clocked by CPU clock.
+    *   CY_SYS_SYST_CSR_CLK_SRC_LFCLK      SysTick is clocked by the low frequency
+    *                              clock (ILO 100 KHz for PSoC 5LP, LFCLK for PSoC 4).
+    *
+    * Return:
+    *  None
+    *
+    * Side Effects:
+    *  Clears SysTick count flag if it was set. If clock source is not ready this
+    *  function call will have no effect. After changing clock source to the low frequency
+    *  clock the counter and reload register values will remain unchanged so time to
+    *  the interrupt will be significantly bigger and vice versa.
+    *
+    *******************************************************************************/
+    void CySysTickSetClockSource(uint32 clockSource)
+    {
+        if (clockSource == CY_SYS_SYST_CSR_CLK_SRC_SYSCLK)
+        {
+            CY_SYS_SYST_CSR_REG |= (uint32)(CY_SYS_SYST_CSR_CLK_SRC_SYSCLK << CY_SYS_SYST_CSR_CLK_SOURCE_SHIFT);
+        }
+        else
+        {
+            CY_SYS_SYST_CSR_REG &= ((uint32) ~(CY_SYS_SYST_CSR_CLK_SRC_SYSCLK << CY_SYS_SYST_CSR_CLK_SOURCE_SHIFT));
+        }
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickGetCountFlag
+    ********************************************************************************
+    *
+    * Summary:
+    *  The count flag is set once SysTick counter reaches zero.
+    *   The flag cleared on read.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  Returns non-zero value if counter is set, otherwise zero is returned.
+    *
+    *******************************************************************************/
+    uint32 CySysTickGetCountFlag(void)
+    {
+        return ((CY_SYS_SYST_CSR_REG>>CY_SYS_SYST_CSR_COUNTFLAG_SHIFT) & 0x01u);
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickClear
+    ********************************************************************************
+    *
+    * Summary:
+    *  Clears the SysTick counter for well-defined startup.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    *******************************************************************************/
+    void CySysTickClear(void)
+    {
+        CY_SYS_SYST_CVR_REG = 0u;
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickSetCallback
+    ********************************************************************************
+    *
+    * Summary:
+    *  The function set the pointers to the functions that will be called on
+    *  SysTick interrupt.
+    *
+    * Parameters:
+    *  number:  The number of callback function address to be set.
+    *           The valid range is from 0 to 4.
+    *  CallbackFunction: Function address.
+    *
+    * Return:
+    *  Returns the address of the previous callback function.
+    *  The NULL is returned if the specified address in not set.
+    *
+    *******************************************************************************/
+    cySysTickCallback CySysTickSetCallback(uint32 number, cySysTickCallback function)
+    {
+        cySysTickCallback retVal;
+
+        retVal = CySysTickCallbacks[number];
+        CySysTickCallbacks[number] = function;
+        return (retVal);
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickGetCallback
+    ********************************************************************************
+    *
+    * Summary:
+    *  The function get the specified callback pointer.
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    *******************************************************************************/
+    cySysTickCallback CySysTickGetCallback(uint32 number)
+    {
+        return ((cySysTickCallback) CySysTickCallbacks[number]);
+    }
+
+
+    /*******************************************************************************
+    * Function Name: CySysTickServiceCallbacks
+    ********************************************************************************
+    *
+    * Summary:
+    *  System Tick timer interrupt routine
+    *
+    * Parameters:
+    *  None
+    *
+    * Return:
+    *  None
+    *
+    *******************************************************************************/
+    static void CySysTickServiceCallbacks(void)
+    {
+        uint32 i;
+
+        /* Verify that tick timer flag was set */
+        if (1u == CySysTickGetCountFlag())
+        {
+            for (i=0u; i < CY_SYS_SYST_NUM_OF_CALLBACKS; i++)
+            {
+                if (CySysTickCallbacks[i] != (void *) 0)
+                {
+                    (void)(CySysTickCallbacks[i])();
+                }
+            }
+        }
+    }
+#endif /* (CY_PSOC5) */
+
+
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CyLib.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: CyLib.h
-* Version 4.0
+* Version 4.20
 *
 * Description:
 *  Provides the function definitions for the system, clocking, interrupts and
@@ -11,7 +11,7 @@
 *  Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -163,6 +163,30 @@ uint8 CyVdRealTimeStatus(void) ;
 
 void CySetScPumps(uint8 enable) ;
 
+#if(CY_PSOC5)
+    /* Default interrupt handler */
+    CY_ISR_PROTO(IntDefaultHandler);
+#endif  /* (CY_PSOC5) */
+
+#if(CY_PSOC5)
+    /* System tick timer APIs */
+    typedef void (*cySysTickCallback)(void);
+
+    void CySysTickStart(void);
+    void CySysTickInit(void);
+    void CySysTickEnable(void);
+    void CySysTickStop(void);
+    void CySysTickEnableInterrupt(void);
+    void CySysTickDisableInterrupt(void);
+    void CySysTickSetReload(uint32 value);
+    uint32 CySysTickGetReload(void);
+    uint32 CySysTickGetValue(void);
+    cySysTickCallback CySysTickSetCallback(uint32 number, cySysTickCallback function);
+    cySysTickCallback CySysTickGetCallback(uint32 number);
+    void CySysTickSetClockSource(uint32 clockSource);
+    uint32 CySysTickGetCountFlag(void);
+    void CySysTickClear(void);
+#endif  /* (CY_PSOC5) */
 
 /***************************************
 * API Constants
@@ -400,6 +424,23 @@ void CySetScPumps(uint8 enable) ;
 #define CY_ALT_ACT_USB_ENABLED          (0x01u)
 
 
+#if(CY_PSOC5)
+
+    /***************************************************************************
+    * Instruction Synchronization Barrier flushes the pipeline in the processor,
+    * so that all instructions following the ISB are fetched from cache or
+    * memory, after the instruction has been completed.
+    ***************************************************************************/
+
+    #if defined(__ARMCC_VERSION)
+        #define CY_SYS_ISB       __isb(0x0f)
+    #else   /* ASM for GCC & IAR */
+        #define CY_SYS_ISB       asm volatile ("isb \n")
+    #endif /* (__ARMCC_VERSION) */
+
+#endif /* (CY_PSOC5) */
+
+
 /***************************************
 * Registers
 ***************************************/
@@ -689,16 +730,29 @@ void CySetScPumps(uint8 enable) ;
     #define CY_CACHE_CONTROL_REG        (* (reg16 *) CYREG_CACHE_CC_CTL )
     #define CY_CACHE_CONTROL_PTR        (  (reg16 *) CYREG_CACHE_CC_CTL )
 
+    /* System tick registers */
+    #define CY_SYS_SYST_CSR_REG         (*(reg32 *) CYREG_NVIC_SYSTICK_CTL)
+    #define CY_SYS_SYST_CSR_PTR         ( (reg32 *) CYREG_NVIC_SYSTICK_CTL)
+
+    #define CY_SYS_SYST_RVR_REG         (*(reg32 *) CYREG_NVIC_SYSTICK_RELOAD)
+    #define CY_SYS_SYST_RVR_PTR         ( (reg32 *) CYREG_NVIC_SYSTICK_RELOAD)
+
+    #define CY_SYS_SYST_CVR_REG         (*(reg32 *) CYREG_NVIC_SYSTICK_CURRENT)
+    #define CY_SYS_SYST_CVR_PTR         ( (reg32 *) CYREG_NVIC_SYSTICK_CURRENT)
+
+    #define CY_SYS_SYST_CALIB_REG       (*(reg32 *) CYREG_NVIC_SYSTICK_CAL)
+    #define CY_SYS_SYST_CALIB_PTR       ( (reg32 *) CYREG_NVIC_SYSTICK_CAL)
+
 #elif (CY_PSOC3)
 
     /* Interrupt Address Vector registers */
     #define CY_INT_VECT_TABLE           ((cyisraddress CYXDATA *) CYREG_INTC_VECT_MBASE)
 
-    /* Interrrupt Controller Priority Registers */
+    /* Interrupt Controller Priority Registers */
     #define CY_INT_PRIORITY_REG         (* (reg8 *) CYREG_INTC_PRIOR0)
     #define CY_INT_PRIORITY_PTR         (  (reg8 *) CYREG_INTC_PRIOR0)
 
-    /* Interrrupt Controller Set Enable Registers */
+    /* Interrupt Controller Set Enable Registers */
     #define CY_INT_ENABLE_REG           (* (reg8 *) CYREG_INTC_SET_EN0)
     #define CY_INT_ENABLE_PTR           (  (reg8 *) CYREG_INTC_SET_EN0)
 
@@ -714,7 +768,7 @@ void CySetScPumps(uint8 enable) ;
     #define CY_INT_SET_EN3_REG          (* (reg8 *) CYREG_INTC_SET_EN3)
     #define CY_INT_SET_EN3_PTR          (  (reg8 *) CYREG_INTC_SET_EN3)
 
-    /* Interrrupt Controller Clear Enable Registers */
+    /* Interrupt Controller Clear Enable Registers */
     #define CY_INT_CLEAR_REG            (* (reg8 *) CYREG_INTC_CLR_EN0)
     #define CY_INT_CLEAR_PTR            (  (reg8 *) CYREG_INTC_CLR_EN0)
 
@@ -731,11 +785,11 @@ void CySetScPumps(uint8 enable) ;
     #define CY_INT_CLR_EN3_PTR          (  (reg8 *) CYREG_INTC_CLR_EN3)
 
 
-    /* Interrrupt Controller Set Pend Registers */
+    /* Interrupt Controller Set Pend Registers */
     #define CY_INT_SET_PEND_REG         (* (reg8 *) CYREG_INTC_SET_PD0)
     #define CY_INT_SET_PEND_PTR         (  (reg8 *) CYREG_INTC_SET_PD0)
 
-    /* Interrrupt Controller Clear Pend Registers */
+    /* Interrupt Controller Clear Pend Registers */
     #define CY_INT_CLR_PEND_REG         (* (reg8 *) CYREG_INTC_CLR_PD0)
     #define CY_INT_CLR_PEND_PTR         (  (reg8 *) CYREG_INTC_CLR_PD0)
 
@@ -753,8 +807,8 @@ void CySetScPumps(uint8 enable) ;
 * Macro Name: CyAssert
 ********************************************************************************
 * Summary:
-*  Macro that evaluates the expression and if it is false (evaluates to 0) then
-*  the processor is halted.
+*  The macro that evaluates the expression and if it is false (evaluates to 0)
+*  then the processor is halted.
 *
 *  This macro is evaluated unless NDEBUG is defined.
 *
@@ -791,7 +845,7 @@ void CySetScPumps(uint8 enable) ;
 #define CY_RESET_GPIO1              (0x80u)
 
 
-/* Interrrupt Controller Configuration and Status Register */
+/* Interrupt Controller Configuration and Status Register */
 #if(CY_PSOC3)
     #define INTERRUPT_CSR               ((reg8 *) CYREG_INTC_CSR_EN)
     #define DISABLE_IRQ_SET             ((uint8)(0x01u << 1u))    /* INTC_CSR_EN */
@@ -844,6 +898,19 @@ void CySetScPumps(uint8 enable) ;
 #define CY_CACHE_CONTROL_FLUSH          (0x0004u)
 #define CY_LIB_RESET_CR2_RESET          (0x01u)
 
+#if(CY_PSOC5)
+    /* System tick API constants */
+    #define CY_SYS_SYST_CSR_ENABLE              ((uint32) (0x01u))
+    #define CY_SYS_SYST_CSR_ENABLE_INT          ((uint32) (0x02u))
+    #define CY_SYS_SYST_CSR_CLK_SOURCE_SHIFT    ((uint32) (0x02u))
+    #define CY_SYS_SYST_CSR_COUNTFLAG_SHIFT     ((uint32) (16u))
+    #define CY_SYS_SYST_CSR_CLK_SRC_SYSCLK      ((uint32) (1u))
+    #define CY_SYS_SYST_CSR_CLK_SRC_LFCLK       ((uint32) (0u))
+    #define CY_SYS_SYST_RVR_CNT_MASK            ((uint32) (0x00FFFFFFu))
+    #define CY_SYS_SYST_NUM_OF_CALLBACKS        ((uint32) (5u))
+#endif /* (CY_PSOC5) */
+
+
 
 /*******************************************************************************
 * Interrupt API constants
@@ -876,6 +943,20 @@ void CySetScPumps(uint8 enable) ;
 /* Mask to get valid range of system interrupt 0-15 */
 #define CY_INT_SYS_NUMBER_MASK          (0xFu)
 
+#if(CY_PSOC5)
+
+    /* CyIntSetSysVector()/CyIntGetSysVector() - parameter definitions */
+    #define CY_INT_NMI_IRQN                  ( 2u)      /* Non Maskable Interrupt      */
+    #define CY_INT_HARD_FAULT_IRQN           ( 3u)      /* Hard Fault Interrupt        */
+    #define CY_INT_MEM_MANAGE_IRQN           ( 4u)      /* Memory Management Interrupt */
+    #define CY_INT_BUS_FAULT_IRQN            ( 5u)      /* Bus Fault Interrupt         */
+    #define CY_INT_USAGE_FAULT_IRQN          ( 6u)      /* Usage Fault Interrupt       */
+    #define CY_INT_SVCALL_IRQN               (11u)      /* SV Call Interrupt           */
+    #define CY_INT_DEBUG_MONITOR_IRQN        (12u)      /* Debug Monitor Interrupt     */
+    #define CY_INT_PEND_SV_IRQN              (14u)      /* Pend SV Interrupt           */
+    #define CY_INT_SYSTICK_IRQN              (15u)      /* System Tick Interrupt       */
+
+#endif  /* (CY_PSOC5) */
 
 /*******************************************************************************
 * Interrupt Macros
@@ -1027,18 +1108,26 @@ void CySetScPumps(uint8 enable) ;
 
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used.
+* The following code is OBSOLETE and must not be used.
+*
+* If the obsoleted macro definitions intended for use in the application use the
+* following scheme, redefine your own versions of these definitions:
+*    #ifdef <OBSOLETED_DEFINE>
+*        #undef  <OBSOLETED_DEFINE>
+*        #define <OBSOLETED_DEFINE>      (<New Value>)
+*    #endif
+*
+* Note: Redefine obsoleted macro definitions with caution. They might still be
+*       used in the application and their modification might lead to unexpected
+*       consequences.
 *******************************************************************************/
+
 #define CYGlobalIntEnable       CyGlobalIntEnable
 #define CYGlobalIntDisable      CyGlobalIntDisable
 
 #define cymemset(s,c,n)         memset((s),(c),(n))
 #define cymemcpy(d,s,n)         memcpy((d),(s),(n))
 
-
-/*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0
-*******************************************************************************/
 #define MFGCFG_X32_TR_PTR               (CY_CLK_XTAL32_TR_PTR)
 #define MFGCFG_X32_TR                   (CY_CLK_XTAL32_TR_REG)
 #define SLOWCLK_X32_TST_PTR             (CY_CLK_XTAL32_TST_PTR)
@@ -1123,10 +1212,6 @@ void CySetScPumps(uint8 enable) ;
 #define CY_VD_PRESISTENT_STATUS_PTR    (CY_VD_PERSISTENT_STATUS_PTR)
 
 
-/*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.20
-*******************************************************************************/
-
 #if(CY_PSOC5)
 
     #define CYINT_IRQ_BASE      (CY_INT_IRQ_BASE)
@@ -1153,9 +1238,7 @@ void CySetScPumps(uint8 enable) ;
 #endif  /* (CY_PSOC5) */
 
 
-/*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.30
-*******************************************************************************/
+
 #define BUS_AMASK_CLEAR                 (0xF0u)
 #define BUS_DMASK_CLEAR                 (0x00u)
 #define CLKDIST_LD_LOAD_SET             (0x01u)
@@ -1190,9 +1273,6 @@ void CySetScPumps(uint8 enable) ;
 #define CLKDIST_CR                     (*(reg8 *) CYREG_CLKDIST_CR)
 
 
-/*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.50
-*******************************************************************************/
 #define IMO_PM_ENABLE                   (0x10u)
 #define PM_ACT_CFG0_PTR                ( (reg8 *) CYREG_PM_ACT_CFG0)
 #define PM_ACT_CFG0                    (*(reg8 *) CYREG_PM_ACT_CFG0)

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CySpc.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: CySpc.c
-* Version 4.0
+* Version 4.20
 *
 *  Description:
 *   Provides an API for the System Performance Component.
@@ -8,7 +8,7 @@
 *   application.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -231,6 +231,11 @@ cystatus CySpcLoadMultiByte(uint8 array, uint16 address, const uint8 buffer[], u
 * Summary:
 *  Loads a row of data into the row latch of a Flash/EEPROM array.
 *
+*  The buffer pointer should point to the data that should be written to the
+*  flash row directly (no data in ECC/flash will be preserved). It is Flash API
+*  responsibility to prepare data: the preserved data are copied from flash into
+*  array with the modified data.
+*
 * Parameters:
 *  uint8 array:
 *   Id of the array.
@@ -286,6 +291,149 @@ cystatus CySpcLoadRow(uint8 array, const uint8 buffer[], uint16 size)
 }
 
 
+/*******************************************************************************
+* Function Name: CySpcLoadRowFull
+********************************************************************************
+* Summary:
+*  Loads a row of data into the row latch of a Flash/EEPROM array.
+*
+*  The only data that are going to be changed should be passed. The function
+*  will handle unmodified data preservation based on DWR settings and input
+*  parameters.
+*
+* Parameters:
+*  uint8 array:
+*   Id of the array.
+*
+*  uint16 row:
+*   Flash row number to be loaded.
+*
+*  uint8* buffer:
+*   Data to be loaded to the row latch
+*
+*  uint8 size:
+*   The number of data bytes that the SPC expects to be written. Depends on the
+*   type of the array and, if the array is Flash, whether ECC is being enabled
+*   or not. There are following values: flash row latch size with ECC enabled,
+*   flash row latch size with ECC disabled and EEPROM row latch size.
+*
+* Return:
+*  CYRET_STARTED
+*  CYRET_CANCELED
+*  CYRET_LOCKED
+*
+*******************************************************************************/
+cystatus CySpcLoadRowFull(uint8 array, uint16 row, const uint8 buffer[], uint16 size)\
+
+{
+    cystatus status = CYRET_STARTED;
+    uint16 i;
+
+    #if (CYDEV_ECC_ENABLE == 0)
+        uint32 offset;
+    #endif /* (CYDEV_ECC_ENABLE == 0) */
+
+    /* Make sure the SPC is ready to accept command */
+    if(CY_SPC_IDLE)
+    {
+        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
+        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_ROW);
+        CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_ROW;
+
+        /* Make sure the command was accepted */
+        if(CY_SPC_BUSY)
+        {
+            CY_SPC_CPU_DATA_REG = array;
+
+            /*******************************************************************
+            * If "Enable Error Correcting Code (ECC)" and "Store Configuration
+            * Data in ECC" DWR options are disabled, ECC section is available
+            * for user data.
+            *******************************************************************/
+            #if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))
+
+                /*******************************************************************
+                * If size parameter equals size of the ECC row and selected array
+                * identification corresponds to the flash array (but not to EEPROM
+                * array) then data are going to be written to the ECC section.
+                * In this case flash data must be preserved. The flash data copied
+                * from flash data section to the SPC data register.
+                *******************************************************************/
+                if ((size == CYDEV_ECC_ROW_SIZE) && (array <= CY_SPC_LAST_FLASH_ARRAYID))
+                {
+                    offset = CYDEV_FLS_BASE +
+                             ((uint32) array * CYDEV_FLS_SECTOR_SIZE) +
+                             ((uint32)   row * CYDEV_FLS_ROW_SIZE   );
+
+                    for (i = 0u; i < CYDEV_FLS_ROW_SIZE; i++)
+                    {
+                        CY_SPC_CPU_DATA_REG = CY_GET_XTND_REG8((void CYFAR *)(offset + i));
+                    }
+                }
+
+            #endif /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */
+
+
+            for(i = 0u; i < size; i++)
+            {
+                CY_SPC_CPU_DATA_REG = buffer[i];
+            }
+
+
+            /*******************************************************************
+            * If "Enable Error Correcting Code (ECC)" DWR option is disabled,
+            * ECC section can be used for storing device configuration data
+            * ("Store Configuration Data in ECC" DWR option is enabled) or for
+            * storing user data in the ECC section ("Store Configuration Data in
+            * ECC" DWR option is enabled). In both cases, the data in the ECC
+            * section must be preserved if flash data is written.
+            *******************************************************************/
+            #if (CYDEV_ECC_ENABLE == 0)
+
+
+                /*******************************************************************
+                * If size parameter equals size of the flash row and selected array
+                * identification corresponds to the flash array (but not to EEPROM
+                * array) then data are going to be written to the flash data
+                * section. In this case, ECC section data must be preserved.
+                * The ECC section data copied from ECC section to the SPC data
+                * register.
+                *******************************************************************/
+                if ((size == CYDEV_FLS_ROW_SIZE) && (array <= CY_SPC_LAST_FLASH_ARRAYID))
+                {
+                    offset = CYDEV_ECC_BASE +
+                            ((uint32) array * CYDEV_ECC_SECTOR_SIZE) +
+                            ((uint32) row   * CYDEV_ECC_ROW_SIZE   );
+
+                    for (i = 0u; i < CYDEV_ECC_ROW_SIZE; i++)
+                    {
+                        CY_SPC_CPU_DATA_REG = CY_GET_XTND_REG8((void CYFAR *)(offset + i));
+                    }
+                }
+
+            #else
+
+                if(0u != row)
+                {
+                    /* To remove unreferenced local variable warning */
+                }
+
+            #endif /* (CYDEV_ECC_ENABLE == 0) */
+        }
+        else
+        {
+            status = CYRET_CANCELED;
+        }
+    }
+    else
+    {
+        status = CYRET_LOCKED;
+    }
+
+    return(status);
+}
+
+
 /*******************************************************************************
 * Function Name: CySpcWriteRow
 ********************************************************************************
@@ -551,4 +699,38 @@ void CySpcUnlock(void)
 }
 
 
+/*******************************************************************************
+* Function Name: CySpcGetAlgorithm
+********************************************************************************
+* Summary:
+*  Downloads SPC algorithm from SPC SROM into SRAM.
+*
+* Parameters:
+*  None
+*
+* Return:
+*  CYRET_STARTED
+*  CYRET_LOCKED
+*
+*******************************************************************************/
+cystatus CySpcGetAlgorithm(void)
+{
+    cystatus status = CYRET_STARTED;
+
+    /* Make sure the SPC is ready to accept command */
+    if(CY_SPC_IDLE)
+    {
+        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;
+        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_DWNLD_ALGORITHM);
+        CY_SPC_CPU_DATA_REG = CY_SPC_CMD_DWNLD_ALGORITHM;
+    }
+    else
+    {
+        status = CYRET_LOCKED;
+    }
+
+    return(status);
+}
+
 /* [] END OF FILE */
+

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/CySpc.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: CySpc.c
-* Version 4.0
+* Version 4.20
 *
 * Description:
 *  Provides definitions for the System Performance Component API.
@@ -8,7 +8,7 @@
 *  application.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -37,10 +37,13 @@ uint8    CySpcReadData(uint8 buffer[], uint8 size);
 cystatus CySpcLoadMultiByte(uint8 array, uint16 address, const uint8 buffer[], uint8 size)\
 ;
 cystatus CySpcLoadRow(uint8 array, const uint8 buffer[], uint16 size);
+cystatus CySpcLoadRowFull(uint8 array, uint16 row, const uint8 buffer[], uint16 size)\
+;
 cystatus CySpcWriteRow(uint8 array, uint16 address, uint8 tempPolarity, uint8 tempMagnitude)\
 ;
 cystatus CySpcEraseSector(uint8 array, uint8 sectorNumber);
 cystatus CySpcGetTemp(uint8 numSamples);
+cystatus CySpcGetAlgorithm(void);
 cystatus CySpcLock(void);
 void     CySpcUnlock(void);
 
@@ -69,7 +72,7 @@ void     CySpcUnlock(void);
 #define CY_SPC_STATUS_CODE_MASK             (0xFCu)
 #define CY_SPC_STATUS_CODE_SHIFT            (0x02u)
 
-/* Status codes for the SPC. */
+/* Status codes for SPC. */
 #define CY_SPC_STATUS_SUCCESS               (0x00u)   /* Operation Successful */
 #define CY_SPC_STATUS_INVALID_ARRAY_ID      (0x01u)   /* Invalid Array ID for given command */
 #define CY_SPC_STATUS_INVALID_2BYTEKEY      (0x02u)   /* Invalid 2-byte key */
@@ -137,7 +140,18 @@ void     CySpcUnlock(void);
 
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0
+* The following code is OBSOLETE and must not be used.
+*
+* If the obsoleted macro definitions intended for use in the application use the
+* following scheme, redefine your own versions of these definitions:
+*    #ifdef <OBSOLETED_DEFINE>
+*        #undef  <OBSOLETED_DEFINE>
+*        #define <OBSOLETED_DEFINE>      (<New Value>)
+*    #endif
+*
+* Note: Redefine obsoleted macro definitions with caution. They might still be
+*       used in the application and their modification might lead to unexpected
+*       consequences.
 *******************************************************************************/
 #define FIRST_FLASH_ARRAYID         (CY_SPC_FIRST_FLASH_ARRAYID)
 #define LAST_FLASH_ARRAYID          (CY_SPC_LAST_FLASH_ARRAYID)

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: Debug_Timer.c
-* Version 2.50
+* Version 2.70
 *
 * Description:
 *  The Timer component consists of a 8, 16, 24 or 32-bit timer with
@@ -15,7 +15,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -129,10 +129,12 @@ void Debug_Timer_Init(void)
         #endif /* Set Capture Mode for UDB implementation if capture mode is software controlled */
 
         #if (Debug_Timer_SoftwareTriggerMode)
-            if (0u == (Debug_Timer_CONTROL & Debug_Timer__B_TIMER__TM_SOFTWARE))
-            {
-                Debug_Timer_SetTriggerMode(Debug_Timer_INIT_TRIGGER_MODE);
-            }
+            #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED)
+                if (0u == (Debug_Timer_CONTROL & Debug_Timer__B_TIMER__TM_SOFTWARE))
+                {
+                    Debug_Timer_SetTriggerMode(Debug_Timer_INIT_TRIGGER_MODE);
+                }
+            #endif /* (!Debug_Timer_UDB_CONTROL_REG_REMOVED) */
         #endif /* Set trigger mode for UDB Implementation if trigger mode is software controlled */
 
         /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/
@@ -148,12 +150,11 @@ void Debug_Timer_Init(void)
         #if (Debug_Timer_EnableTriggerMode)
             Debug_Timer_EnableTrigger();
         #endif /* Set Trigger enable bit for UDB implementation in the control register*/
-
-        #if (Debug_Timer_InterruptOnCaptureCount)
-             #if (!Debug_Timer_ControlRegRemoved)
-                Debug_Timer_SetInterruptCount(Debug_Timer_INIT_INT_CAPTURE_COUNT);
-            #endif /* Set interrupt count in control register if control register is not removed */
-        #endif /*Set interrupt count in UDB implementation if interrupt count feature is checked.*/
+		
+		
+        #if (Debug_Timer_InterruptOnCaptureCount && !Debug_Timer_UDB_CONTROL_REG_REMOVED)
+            Debug_Timer_SetInterruptCount(Debug_Timer_INIT_INT_CAPTURE_COUNT);
+        #endif /* Set interrupt count in UDB implementation if interrupt count feature is checked.*/
 
         Debug_Timer_ClearFIFO();
     #endif /* Configure additional features of UDB implementation */
@@ -185,7 +186,7 @@ void Debug_Timer_Enable(void)
     #endif /* Set Enable bit for enabling Fixed function timer*/
 
     /* Remove assignment if control register is removed */
-    #if (!Debug_Timer_ControlRegRemoved || Debug_Timer_UsingFixedFunction)
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED || Debug_Timer_UsingFixedFunction)
         Debug_Timer_CONTROL |= Debug_Timer_CTRL_ENABLE;
     #endif /* Remove assignment if control register is removed */
 }
@@ -246,7 +247,7 @@ void Debug_Timer_Start(void)
 void Debug_Timer_Stop(void) 
 {
     /* Disable Timer */
-    #if(!Debug_Timer_ControlRegRemoved || Debug_Timer_UsingFixedFunction)
+    #if(!Debug_Timer_UDB_CONTROL_REG_REMOVED || Debug_Timer_UsingFixedFunction)
         Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_ENABLE));
     #endif /* Remove assignment if control register is removed */
 
@@ -301,7 +302,11 @@ void Debug_Timer_SetInterruptMode(uint8 interruptMode)
 void Debug_Timer_SoftwareCapture(void) 
 {
     /* Generate a software capture by reading the counter register */
-    (void)Debug_Timer_COUNTER_LSB;
+    #if(Debug_Timer_UsingFixedFunction)
+        (void)CY_GET_REG16(Debug_Timer_COUNTER_LSB_PTR);
+    #else
+        (void)CY_GET_REG8(Debug_Timer_COUNTER_LSB_PTR_8BIT);
+    #endif/* (Debug_Timer_UsingFixedFunction) */
     /* Capture Data is now in the FIFO */
 }
 
@@ -331,7 +336,7 @@ uint8   Debug_Timer_ReadStatusRegister(void)
 }
 
 
-#if (!Debug_Timer_ControlRegRemoved) /* Remove API if control register is removed */
+#if (!Debug_Timer_UDB_CONTROL_REG_REMOVED) /* Remove API if control register is unused */
 
 
 /*******************************************************************************
@@ -350,7 +355,11 @@ uint8   Debug_Timer_ReadStatusRegister(void)
 *******************************************************************************/
 uint8 Debug_Timer_ReadControlRegister(void) 
 {
-    return ((uint8)Debug_Timer_CONTROL);
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED) 
+        return ((uint8)Debug_Timer_CONTROL);
+    #else
+        return (0);
+    #endif /* (!Debug_Timer_UDB_CONTROL_REG_REMOVED) */
 }
 
 
@@ -369,9 +378,14 @@ uint8 Debug_Timer_ReadControlRegister(void)
 *******************************************************************************/
 void Debug_Timer_WriteControlRegister(uint8 control) 
 {
-    Debug_Timer_CONTROL = control;
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED) 
+        Debug_Timer_CONTROL = control;
+    #else
+        control = 0u;
+    #endif /* (!Debug_Timer_UDB_CONTROL_REG_REMOVED) */
 }
-#endif /* Remove API if control register is removed */
+
+#endif /* Remove API if control register is unused */
 
 
 /*******************************************************************************
@@ -463,8 +477,7 @@ uint16 Debug_Timer_ReadCapture(void)
 *  void
 *
 *******************************************************************************/
-void Debug_Timer_WriteCounter(uint16 counter) \
-                                   
+void Debug_Timer_WriteCounter(uint16 counter) 
 {
    #if(Debug_Timer_UsingFixedFunction)
         /* This functionality is removed until a FixedFunction HW update to
@@ -494,11 +507,14 @@ void Debug_Timer_WriteCounter(uint16 counter) \
 *******************************************************************************/
 uint16 Debug_Timer_ReadCounter(void) 
 {
-
     /* Force capture by reading Accumulator */
     /* Must first do a software capture to be able to read the counter */
     /* It is up to the user code to make sure there isn't already captured data in the FIFO */
-    (void)Debug_Timer_COUNTER_LSB;
+    #if(Debug_Timer_UsingFixedFunction)
+        (void)CY_GET_REG16(Debug_Timer_COUNTER_LSB_PTR);
+    #else
+        (void)CY_GET_REG8(Debug_Timer_COUNTER_LSB_PTR_8BIT);
+    #endif/* (Debug_Timer_UsingFixedFunction) */
 
     /* Read the data from the FIFO (or capture register for Fixed Function)*/
     #if(Debug_Timer_UsingFixedFunction)
@@ -511,6 +527,7 @@ uint16 Debug_Timer_ReadCounter(void)
 
 #if(!Debug_Timer_UsingFixedFunction) /* UDB Specific Functions */
 
+    
 /*******************************************************************************
  * The functions below this point are only available using the UDB
  * implementation.  If a feature is selected, then the API is enabled.
@@ -552,11 +569,13 @@ void Debug_Timer_SetCaptureMode(uint8 captureMode)
     captureMode = ((uint8)((uint8)captureMode << Debug_Timer_CTRL_CAP_MODE_SHIFT));
     captureMode &= (Debug_Timer_CTRL_CAP_MODE_MASK);
 
-    /* Clear the Current Setting */
-    Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_CAP_MODE_MASK));
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED)
+        /* Clear the Current Setting */
+        Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_CAP_MODE_MASK));
 
-    /* Write The New Setting */
-    Debug_Timer_CONTROL |= captureMode;
+        /* Write The New Setting */
+        Debug_Timer_CONTROL |= captureMode;
+    #endif /* (!Debug_Timer_UDB_CONTROL_REG_REMOVED) */
 }
 #endif /* Remove API if Capture Mode is not Software Controlled */
 
@@ -588,12 +607,14 @@ void Debug_Timer_SetTriggerMode(uint8 triggerMode)
     /* This must only set to two bits of the control register associated */
     triggerMode &= Debug_Timer_CTRL_TRIG_MODE_MASK;
 
-    /* Clear the Current Setting */
-    Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_TRIG_MODE_MASK));
-
-    /* Write The New Setting */
-    Debug_Timer_CONTROL |= (triggerMode | Debug_Timer__B_TIMER__TM_SOFTWARE);
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED)   /* Remove assignment if control register is removed */
+    
+        /* Clear the Current Setting */
+        Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_TRIG_MODE_MASK));
 
+        /* Write The New Setting */
+        Debug_Timer_CONTROL |= (triggerMode | Debug_Timer__B_TIMER__TM_SOFTWARE);
+    #endif /* Remove code section if control register is not used */
 }
 #endif /* Remove API if Trigger Mode is not Software Controlled */
 
@@ -616,7 +637,7 @@ void Debug_Timer_SetTriggerMode(uint8 triggerMode)
 *******************************************************************************/
 void Debug_Timer_EnableTrigger(void) 
 {
-    #if (!Debug_Timer_ControlRegRemoved)   /* Remove assignment if control register is removed */
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED)   /* Remove assignment if control register is removed */
         Debug_Timer_CONTROL |= Debug_Timer_CTRL_TRIG_EN;
     #endif /* Remove code section if control register is not used */
 }
@@ -638,15 +659,13 @@ void Debug_Timer_EnableTrigger(void)
 *******************************************************************************/
 void Debug_Timer_DisableTrigger(void) 
 {
-    #if (!Debug_Timer_ControlRegRemoved)   /* Remove assignment if control register is removed */
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED )   /* Remove assignment if control register is removed */
         Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_TRIG_EN));
     #endif /* Remove code section if control register is not used */
 }
 #endif /* Remove API is Trigger Mode is set to None */
 
-
 #if(Debug_Timer_InterruptOnCaptureCount)
-#if (!Debug_Timer_ControlRegRemoved)   /* Remove API if control register is removed */
 
 
 /*******************************************************************************
@@ -671,12 +690,13 @@ void Debug_Timer_SetInterruptCount(uint8 interruptCount)
     /* This must only set to two bits of the control register associated */
     interruptCount &= Debug_Timer_CTRL_INTCNT_MASK;
 
-    /* Clear the Current Setting */
-    Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_INTCNT_MASK));
-    /* Write The New Setting */
-    Debug_Timer_CONTROL |= interruptCount;
+    #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED)
+        /* Clear the Current Setting */
+        Debug_Timer_CONTROL &= ((uint8)(~Debug_Timer_CTRL_INTCNT_MASK));
+        /* Write The New Setting */
+        Debug_Timer_CONTROL |= interruptCount;
+    #endif /* (!Debug_Timer_UDB_CONTROL_REG_REMOVED) */
 }
-#endif /* Remove API if control register is removed */
 #endif /* Debug_Timer_InterruptOnCaptureCount */
 
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: Debug_Timer.h
-* Version 2.50
+* Version 2.70
 *
 *  Description:
 *     Contains the function prototypes and constants available to the timer
@@ -10,14 +10,14 @@
 *     None
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
 ********************************************************************************/
 
-#if !defined(CY_Timer_v2_30_Debug_Timer_H)
-#define CY_Timer_v2_30_Debug_Timer_H
+#if !defined(CY_Timer_v2_60_Debug_Timer_H)
+#define CY_Timer_v2_60_Debug_Timer_H
 
 #include "cytypes.h"
 #include "cyfitter.h"
@@ -28,7 +28,7 @@ extern uint8 Debug_Timer_initVar;
 /* Check to see if required defines such as CY_PSOC5LP are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5LP)
-    #error Component Timer_v2_50 requires cy_boot v3.0 or later
+    #error Component Timer_v2_70 requires cy_boot v3.0 or later
 #endif /* (CY_ PSOC5LP) */
 
 
@@ -47,6 +47,14 @@ extern uint8 Debug_Timer_initVar;
 #define Debug_Timer_RunModeUsed                0u
 #define Debug_Timer_ControlRegRemoved          0u
 
+#if defined(Debug_Timer_TimerUDB_sCTRLReg_SyncCtl_ctrlreg__CONTROL_REG)
+    #define Debug_Timer_UDB_CONTROL_REG_REMOVED            (0u)
+#elif  (Debug_Timer_UsingFixedFunction)
+    #define Debug_Timer_UDB_CONTROL_REG_REMOVED            (0u)
+#else 
+    #define Debug_Timer_UDB_CONTROL_REG_REMOVED            (1u)
+#endif /* End Debug_Timer_TimerUDB_sCTRLReg_SyncCtl_ctrlreg__CONTROL_REG */
+
 
 /***************************************
 *       Type defines
@@ -60,27 +68,18 @@ typedef struct
 {
     uint8 TimerEnableState;
     #if(!Debug_Timer_UsingFixedFunction)
-        #if (CY_UDB_V0)
-            uint16 TimerUdb;                 /* Timer internal counter value */
-            uint16 TimerPeriod;              /* Timer Period value       */
-            uint8 InterruptMaskValue;       /* Timer Compare Value */
-            #if (Debug_Timer_UsingHWCaptureCounter)
-                uint8 TimerCaptureCounter;  /* Timer Capture Counter Value */
-            #endif /* variable declaration for backing up Capture Counter value*/
-        #endif /* variables for non retention registers in CY_UDB_V0 */
-
-        #if (CY_UDB_V1)
-            uint16 TimerUdb;
-            uint8 InterruptMaskValue;
-            #if (Debug_Timer_UsingHWCaptureCounter)
-                uint8 TimerCaptureCounter;
-            #endif /* variable declarations for backing up non retention registers in CY_UDB_V1 */
-        #endif /* (CY_UDB_V1) */
-
-        #if (!Debug_Timer_ControlRegRemoved)
+
+        uint16 TimerUdb;
+        uint8 InterruptMaskValue;
+        #if (Debug_Timer_UsingHWCaptureCounter)
+            uint8 TimerCaptureCounter;
+        #endif /* variable declarations for backing up non retention registers in CY_UDB_V1 */
+
+        #if (!Debug_Timer_UDB_CONTROL_REG_REMOVED)
             uint8 TimerControlRegister;
         #endif /* variable declaration for backing up enable state of the Timer */
     #endif /* define backup variables only for UDB implementation. Fixed function registers are all retention */
+
 }Debug_Timer_backupStruct;
 
 
@@ -96,22 +95,18 @@ uint8   Debug_Timer_ReadStatusRegister(void) ;
 /* Deprecated function. Do not use this in future. Retained for backward compatibility */
 #define Debug_Timer_GetInterruptSource() Debug_Timer_ReadStatusRegister()
 
-#if(!Debug_Timer_ControlRegRemoved)
+#if(!Debug_Timer_UDB_CONTROL_REG_REMOVED)
     uint8   Debug_Timer_ReadControlRegister(void) ;
-    void    Debug_Timer_WriteControlRegister(uint8 control) \
-        ;
-#endif /* (!Debug_Timer_ControlRegRemoved) */
+    void    Debug_Timer_WriteControlRegister(uint8 control) ;
+#endif /* (!Debug_Timer_UDB_CONTROL_REG_REMOVED) */
 
 uint16  Debug_Timer_ReadPeriod(void) ;
-void    Debug_Timer_WritePeriod(uint16 period) \
-    ;
+void    Debug_Timer_WritePeriod(uint16 period) ;
 uint16  Debug_Timer_ReadCounter(void) ;
-void    Debug_Timer_WriteCounter(uint16 counter) \
-    ;
+void    Debug_Timer_WriteCounter(uint16 counter) ;
 uint16  Debug_Timer_ReadCapture(void) ;
 void    Debug_Timer_SoftwareCapture(void) ;
 
-
 #if(!Debug_Timer_UsingFixedFunction) /* UDB Prototypes */
     #if (Debug_Timer_SoftwareCaptureMode)
         void    Debug_Timer_SetCaptureMode(uint8 captureMode) ;
@@ -120,21 +115,19 @@ void    Debug_Timer_SoftwareCapture(void) ;
     #if (Debug_Timer_SoftwareTriggerMode)
         void    Debug_Timer_SetTriggerMode(uint8 triggerMode) ;
     #endif /* (Debug_Timer_SoftwareTriggerMode) */
+
     #if (Debug_Timer_EnableTriggerMode)
         void    Debug_Timer_EnableTrigger(void) ;
         void    Debug_Timer_DisableTrigger(void) ;
     #endif /* (Debug_Timer_EnableTriggerMode) */
 
+
     #if(Debug_Timer_InterruptOnCaptureCount)
-        #if(!Debug_Timer_ControlRegRemoved)
-            void    Debug_Timer_SetInterruptCount(uint8 interruptCount) \
-                ;
-        #endif /* (!Debug_Timer_ControlRegRemoved) */
+        void    Debug_Timer_SetInterruptCount(uint8 interruptCount) ;
     #endif /* (Debug_Timer_InterruptOnCaptureCount) */
 
     #if (Debug_Timer_UsingHWCaptureCounter)
-        void    Debug_Timer_SetCaptureCount(uint8 captureCount) \
-            ;
+        void    Debug_Timer_SetCaptureCount(uint8 captureCount) ;
         uint8   Debug_Timer_ReadCaptureCount(void) ;
     #endif /* (Debug_Timer_UsingHWCaptureCounter) */
 
@@ -256,8 +249,8 @@ void Debug_Timer_Wakeup(void)        ;
     #if (CY_PSOC5A)
         /* Use CFG1 Mode bits to set run mode */
         /* As defined by Verilog Implementation */
-        #define Debug_Timer_CTRL_MODE_SHIFT                     0x01u
-        #define Debug_Timer_CTRL_MODE_MASK                     ((uint8)((uint8)0x07u << Debug_Timer_CTRL_MODE_SHIFT))
+        #define Debug_Timer_CTRL_MODE_SHIFT                 0x01u
+        #define Debug_Timer_CTRL_MODE_MASK                 ((uint8)((uint8)0x07u << Debug_Timer_CTRL_MODE_SHIFT))
     #endif /* (CY_PSOC5A) */
     #if (CY_PSOC3 || CY_PSOC5LP)
         /* Control3 Register Bit Locations */
@@ -367,6 +360,8 @@ void Debug_Timer_Wakeup(void)        ;
         #endif /* CY_PSOC3 || CY_PSOC5 */ 
     #endif
 
+    #define Debug_Timer_COUNTER_LSB_PTR_8BIT       ((reg8 *) Debug_Timer_TimerUDB_sT16_timerdp_u0__A0_REG )
+    
     #if (Debug_Timer_UsingHWCaptureCounter)
         #define Debug_Timer_CAP_COUNT              (*(reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__PERIOD_REG )
         #define Debug_Timer_CAP_COUNT_PTR          ( (reg8 *) Debug_Timer_TimerUDB_sCapCount_counter__PERIOD_REG )

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/Debug_Timer_PM.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: Debug_Timer_PM.c
-* Version 2.50
+* Version 2.70
 *
 *  Description:
 *     This file provides the power management source code to API for the
@@ -10,13 +10,14 @@
 *     None
 *
 *******************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
 ********************************************************************************/
 
 #include "Debug_Timer.h"
+
 static Debug_Timer_backupStruct Debug_Timer_backup;
 
 
@@ -42,25 +43,13 @@ static Debug_Timer_backupStruct Debug_Timer_backup;
 void Debug_Timer_SaveConfig(void) 
 {
     #if (!Debug_Timer_UsingFixedFunction)
-        /* Backup the UDB non-rentention registers for CY_UDB_V0 */
-        #if (CY_UDB_V0)
-            Debug_Timer_backup.TimerUdb = Debug_Timer_ReadCounter();
-            Debug_Timer_backup.TimerPeriod = Debug_Timer_ReadPeriod();
-            Debug_Timer_backup.InterruptMaskValue = Debug_Timer_STATUS_MASK;
-            #if (Debug_Timer_UsingHWCaptureCounter)
-                Debug_Timer_backup.TimerCaptureCounter = Debug_Timer_ReadCaptureCount();
-            #endif /* Backup the UDB non-rentention register capture counter for CY_UDB_V0 */
-        #endif /* Backup the UDB non-rentention registers for CY_UDB_V0 */
-
-        #if (CY_UDB_V1)
-            Debug_Timer_backup.TimerUdb = Debug_Timer_ReadCounter();
-            Debug_Timer_backup.InterruptMaskValue = Debug_Timer_STATUS_MASK;
-            #if (Debug_Timer_UsingHWCaptureCounter)
-                Debug_Timer_backup.TimerCaptureCounter = Debug_Timer_ReadCaptureCount();
-            #endif /* Back Up capture counter register  */
-        #endif /* Backup non retention registers, interrupt mask and capture counter for CY_UDB_V1 */
+        Debug_Timer_backup.TimerUdb = Debug_Timer_ReadCounter();
+        Debug_Timer_backup.InterruptMaskValue = Debug_Timer_STATUS_MASK;
+        #if (Debug_Timer_UsingHWCaptureCounter)
+            Debug_Timer_backup.TimerCaptureCounter = Debug_Timer_ReadCaptureCount();
+        #endif /* Back Up capture counter register  */
 
-        #if(!Debug_Timer_ControlRegRemoved)
+        #if(!Debug_Timer_UDB_CONTROL_REG_REMOVED)
             Debug_Timer_backup.TimerControlRegister = Debug_Timer_ReadControlRegister();
         #endif /* Backup the enable state of the Timer component */
     #endif /* Backup non retention registers in UDB implementation. All fixed function registers are retention */
@@ -88,35 +77,14 @@ void Debug_Timer_SaveConfig(void)
 void Debug_Timer_RestoreConfig(void) 
 {   
     #if (!Debug_Timer_UsingFixedFunction)
-        /* Restore the UDB non-rentention registers for CY_UDB_V0 */
-        #if (CY_UDB_V0)
-            /* Interrupt State Backup for Critical Region*/
-            uint8 Debug_Timer_interruptState;
-
-            Debug_Timer_WriteCounter(Debug_Timer_backup.TimerUdb);
-            Debug_Timer_WritePeriod(Debug_Timer_backup.TimerPeriod);
-            /* CyEnterCriticalRegion and CyExitCriticalRegion are used to mark following region critical*/
-            /* Enter Critical Region*/
-            Debug_Timer_interruptState = CyEnterCriticalSection();
-            /* Use the interrupt output of the status register for IRQ output */
-            Debug_Timer_STATUS_AUX_CTRL |= Debug_Timer_STATUS_ACTL_INT_EN_MASK;
-            /* Exit Critical Region*/
-            CyExitCriticalSection(Debug_Timer_interruptState);
-            Debug_Timer_STATUS_MASK =Debug_Timer_backup.InterruptMaskValue;
-            #if (Debug_Timer_UsingHWCaptureCounter)
-                Debug_Timer_SetCaptureCount(Debug_Timer_backup.TimerCaptureCounter);
-            #endif /* Restore the UDB non-rentention register capture counter for CY_UDB_V0 */
-        #endif /* Restore the UDB non-rentention registers for CY_UDB_V0 */
 
-        #if (CY_UDB_V1)
-            Debug_Timer_WriteCounter(Debug_Timer_backup.TimerUdb);
-            Debug_Timer_STATUS_MASK =Debug_Timer_backup.InterruptMaskValue;
-            #if (Debug_Timer_UsingHWCaptureCounter)
-                Debug_Timer_SetCaptureCount(Debug_Timer_backup.TimerCaptureCounter);
-            #endif /* Restore Capture counter register*/
-        #endif /* Restore up non retention registers, interrupt mask and capture counter for CY_UDB_V1 */
+        Debug_Timer_WriteCounter(Debug_Timer_backup.TimerUdb);
+        Debug_Timer_STATUS_MASK =Debug_Timer_backup.InterruptMaskValue;
+        #if (Debug_Timer_UsingHWCaptureCounter)
+            Debug_Timer_SetCaptureCount(Debug_Timer_backup.TimerCaptureCounter);
+        #endif /* Restore Capture counter register*/
 
-        #if(!Debug_Timer_ControlRegRemoved)
+        #if(!Debug_Timer_UDB_CONTROL_REG_REMOVED)
             Debug_Timer_WriteControlRegister(Debug_Timer_backup.TimerControlRegister);
         #endif /* Restore the enable state of the Timer component */
     #endif /* Restore non retention registers in the UDB implementation only */
@@ -143,7 +111,7 @@ void Debug_Timer_RestoreConfig(void)
 *******************************************************************************/
 void Debug_Timer_Sleep(void) 
 {
-    #if(!Debug_Timer_ControlRegRemoved)
+    #if(!Debug_Timer_UDB_CONTROL_REG_REMOVED)
         /* Save Counter's enable state */
         if(Debug_Timer_CTRL_ENABLE == (Debug_Timer_CONTROL & Debug_Timer_CTRL_ENABLE))
         {
@@ -182,7 +150,7 @@ void Debug_Timer_Sleep(void)
 void Debug_Timer_Wakeup(void) 
 {
     Debug_Timer_RestoreConfig();
-    #if(!Debug_Timer_ControlRegRemoved)
+    #if(!Debug_Timer_UDB_CONTROL_REG_REMOVED)
         if(Debug_Timer_backup.TimerEnableState == 1u)
         {     /* Enable Timer's operation */
                 Debug_Timer_Enable();

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: LED1.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void LED1_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  LED1_DM_STRONG     Strong Drive 
+*  LED1_DM_OD_HI      Open Drain, Drives High 
+*  LED1_DM_OD_LO      Open Drain, Drives Low 
+*  LED1_DM_RES_UP     Resistive Pull Up 
+*  LED1_DM_RES_DWN    Resistive Pull Down 
+*  LED1_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  LED1_DM_DIG_HIZ    High Impedance Digital 
+*  LED1_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: LED1.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/LED1_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: LED1.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define LED1_0		LED1__0__PC
+#define LED1_0		(LED1__0__PC)
 
 #endif /* End Pins LED1_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CLK.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SCSI_CLK.c
-* Version 2.10
+* Version 2.20
 *
 *  Description:
 *   This file provides the source code to the API for the clock component.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_CLK.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SCSI_CLK.h
-* Version 2.10
+* Version 2.20
 *
 *  Description:
 *   Provides the function and constant definitions for the clock component.
@@ -28,7 +28,7 @@
 /* Check to see if required defines such as CY_PSOC5LP are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5LP)
-    #error Component cy_clock_v2_10 requires cy_boot v3.0 or later
+    #error Component cy_clock_v2_20 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5LP) */
 
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_DBx_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SCSI_In_DBx.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,23 +25,23 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SCSI_In_DBx_0		SCSI_In_DBx__0__PC
-#define SCSI_In_DBx_1		SCSI_In_DBx__1__PC
-#define SCSI_In_DBx_2		SCSI_In_DBx__2__PC
-#define SCSI_In_DBx_3		SCSI_In_DBx__3__PC
-#define SCSI_In_DBx_4		SCSI_In_DBx__4__PC
-#define SCSI_In_DBx_5		SCSI_In_DBx__5__PC
-#define SCSI_In_DBx_6		SCSI_In_DBx__6__PC
-#define SCSI_In_DBx_7		SCSI_In_DBx__7__PC
-
-#define SCSI_In_DBx_DB0		SCSI_In_DBx__DB0__PC
-#define SCSI_In_DBx_DB1		SCSI_In_DBx__DB1__PC
-#define SCSI_In_DBx_DB2		SCSI_In_DBx__DB2__PC
-#define SCSI_In_DBx_DB3		SCSI_In_DBx__DB3__PC
-#define SCSI_In_DBx_DB4		SCSI_In_DBx__DB4__PC
-#define SCSI_In_DBx_DB5		SCSI_In_DBx__DB5__PC
-#define SCSI_In_DBx_DB6		SCSI_In_DBx__DB6__PC
-#define SCSI_In_DBx_DB7		SCSI_In_DBx__DB7__PC
+#define SCSI_In_DBx_0		(SCSI_In_DBx__0__PC)
+#define SCSI_In_DBx_1		(SCSI_In_DBx__1__PC)
+#define SCSI_In_DBx_2		(SCSI_In_DBx__2__PC)
+#define SCSI_In_DBx_3		(SCSI_In_DBx__3__PC)
+#define SCSI_In_DBx_4		(SCSI_In_DBx__4__PC)
+#define SCSI_In_DBx_5		(SCSI_In_DBx__5__PC)
+#define SCSI_In_DBx_6		(SCSI_In_DBx__6__PC)
+#define SCSI_In_DBx_7		(SCSI_In_DBx__7__PC)
+
+#define SCSI_In_DBx_DB0		(SCSI_In_DBx__DB0__PC)
+#define SCSI_In_DBx_DB1		(SCSI_In_DBx__DB1__PC)
+#define SCSI_In_DBx_DB2		(SCSI_In_DBx__DB2__PC)
+#define SCSI_In_DBx_DB3		(SCSI_In_DBx__DB3__PC)
+#define SCSI_In_DBx_DB4		(SCSI_In_DBx__DB4__PC)
+#define SCSI_In_DBx_DB5		(SCSI_In_DBx__DB5__PC)
+#define SCSI_In_DBx_DB6		(SCSI_In_DBx__DB6__PC)
+#define SCSI_In_DBx_DB7		(SCSI_In_DBx__DB7__PC)
 
 #endif /* End Pins SCSI_In_DBx_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_In_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SCSI_In.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,17 +25,17 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SCSI_In_0		SCSI_In__0__PC
-#define SCSI_In_1		SCSI_In__1__PC
-#define SCSI_In_2		SCSI_In__2__PC
-#define SCSI_In_3		SCSI_In__3__PC
-#define SCSI_In_4		SCSI_In__4__PC
-
-#define SCSI_In_DBP		SCSI_In__DBP__PC
-#define SCSI_In_MSG		SCSI_In__MSG__PC
-#define SCSI_In_CD		SCSI_In__CD__PC
-#define SCSI_In_REQ		SCSI_In__REQ__PC
-#define SCSI_In_IO		SCSI_In__IO__PC
+#define SCSI_In_0		(SCSI_In__0__PC)
+#define SCSI_In_1		(SCSI_In__1__PC)
+#define SCSI_In_2		(SCSI_In__2__PC)
+#define SCSI_In_3		(SCSI_In__3__PC)
+#define SCSI_In_4		(SCSI_In__4__PC)
+
+#define SCSI_In_DBP		(SCSI_In__DBP__PC)
+#define SCSI_In_MSG		(SCSI_In__MSG__PC)
+#define SCSI_In_CD		(SCSI_In__CD__PC)
+#define SCSI_In_REQ		(SCSI_In__REQ__PC)
+#define SCSI_In_IO		(SCSI_In__IO__PC)
 
 #endif /* End Pins SCSI_In_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Noise_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SCSI_Noise.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,17 +25,17 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SCSI_Noise_0		SCSI_Noise__0__PC
-#define SCSI_Noise_1		SCSI_Noise__1__PC
-#define SCSI_Noise_2		SCSI_Noise__2__PC
-#define SCSI_Noise_3		SCSI_Noise__3__PC
-#define SCSI_Noise_4		SCSI_Noise__4__PC
-
-#define SCSI_Noise_ATN		SCSI_Noise__ATN__PC
-#define SCSI_Noise_BSY		SCSI_Noise__BSY__PC
-#define SCSI_Noise_SEL		SCSI_Noise__SEL__PC
-#define SCSI_Noise_RST		SCSI_Noise__RST__PC
-#define SCSI_Noise_ACK		SCSI_Noise__ACK__PC
+#define SCSI_Noise_0		(SCSI_Noise__0__PC)
+#define SCSI_Noise_1		(SCSI_Noise__1__PC)
+#define SCSI_Noise_2		(SCSI_Noise__2__PC)
+#define SCSI_Noise_3		(SCSI_Noise__3__PC)
+#define SCSI_Noise_4		(SCSI_Noise__4__PC)
+
+#define SCSI_Noise_ATN		(SCSI_Noise__ATN__PC)
+#define SCSI_Noise_BSY		(SCSI_Noise__BSY__PC)
+#define SCSI_Noise_SEL		(SCSI_Noise__SEL__PC)
+#define SCSI_Noise_RST		(SCSI_Noise__RST__PC)
+#define SCSI_Noise_ACK		(SCSI_Noise__ACK__PC)
 
 #endif /* End Pins SCSI_Noise_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SCSI_Out_DBx.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,23 +25,23 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SCSI_Out_DBx_0		SCSI_Out_DBx__0__PC
-#define SCSI_Out_DBx_1		SCSI_Out_DBx__1__PC
-#define SCSI_Out_DBx_2		SCSI_Out_DBx__2__PC
-#define SCSI_Out_DBx_3		SCSI_Out_DBx__3__PC
-#define SCSI_Out_DBx_4		SCSI_Out_DBx__4__PC
-#define SCSI_Out_DBx_5		SCSI_Out_DBx__5__PC
-#define SCSI_Out_DBx_6		SCSI_Out_DBx__6__PC
-#define SCSI_Out_DBx_7		SCSI_Out_DBx__7__PC
-
-#define SCSI_Out_DBx_DB0		SCSI_Out_DBx__DB0__PC
-#define SCSI_Out_DBx_DB1		SCSI_Out_DBx__DB1__PC
-#define SCSI_Out_DBx_DB2		SCSI_Out_DBx__DB2__PC
-#define SCSI_Out_DBx_DB3		SCSI_Out_DBx__DB3__PC
-#define SCSI_Out_DBx_DB4		SCSI_Out_DBx__DB4__PC
-#define SCSI_Out_DBx_DB5		SCSI_Out_DBx__DB5__PC
-#define SCSI_Out_DBx_DB6		SCSI_Out_DBx__DB6__PC
-#define SCSI_Out_DBx_DB7		SCSI_Out_DBx__DB7__PC
+#define SCSI_Out_DBx_0		(SCSI_Out_DBx__0__PC)
+#define SCSI_Out_DBx_1		(SCSI_Out_DBx__1__PC)
+#define SCSI_Out_DBx_2		(SCSI_Out_DBx__2__PC)
+#define SCSI_Out_DBx_3		(SCSI_Out_DBx__3__PC)
+#define SCSI_Out_DBx_4		(SCSI_Out_DBx__4__PC)
+#define SCSI_Out_DBx_5		(SCSI_Out_DBx__5__PC)
+#define SCSI_Out_DBx_6		(SCSI_Out_DBx__6__PC)
+#define SCSI_Out_DBx_7		(SCSI_Out_DBx__7__PC)
+
+#define SCSI_Out_DBx_DB0		(SCSI_Out_DBx__DB0__PC)
+#define SCSI_Out_DBx_DB1		(SCSI_Out_DBx__DB1__PC)
+#define SCSI_Out_DBx_DB2		(SCSI_Out_DBx__DB2__PC)
+#define SCSI_Out_DBx_DB3		(SCSI_Out_DBx__DB3__PC)
+#define SCSI_Out_DBx_DB4		(SCSI_Out_DBx__DB4__PC)
+#define SCSI_Out_DBx_DB5		(SCSI_Out_DBx__DB5__PC)
+#define SCSI_Out_DBx_DB6		(SCSI_Out_DBx__DB6__PC)
+#define SCSI_Out_DBx_DB7		(SCSI_Out_DBx__DB7__PC)
 
 #endif /* End Pins SCSI_Out_DBx_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SCSI_Out_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SCSI_Out.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,27 +25,27 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SCSI_Out_0		SCSI_Out__0__PC
-#define SCSI_Out_1		SCSI_Out__1__PC
-#define SCSI_Out_2		SCSI_Out__2__PC
-#define SCSI_Out_3		SCSI_Out__3__PC
-#define SCSI_Out_4		SCSI_Out__4__PC
-#define SCSI_Out_5		SCSI_Out__5__PC
-#define SCSI_Out_6		SCSI_Out__6__PC
-#define SCSI_Out_7		SCSI_Out__7__PC
-#define SCSI_Out_8		SCSI_Out__8__PC
-#define SCSI_Out_9		SCSI_Out__9__PC
-
-#define SCSI_Out_DBP_raw		SCSI_Out__DBP_raw__PC
-#define SCSI_Out_ATN		SCSI_Out__ATN__PC
-#define SCSI_Out_BSY		SCSI_Out__BSY__PC
-#define SCSI_Out_ACK		SCSI_Out__ACK__PC
-#define SCSI_Out_RST		SCSI_Out__RST__PC
-#define SCSI_Out_MSG_raw		SCSI_Out__MSG_raw__PC
-#define SCSI_Out_SEL		SCSI_Out__SEL__PC
-#define SCSI_Out_CD_raw		SCSI_Out__CD_raw__PC
-#define SCSI_Out_REQ		SCSI_Out__REQ__PC
-#define SCSI_Out_IO_raw		SCSI_Out__IO_raw__PC
+#define SCSI_Out_0		(SCSI_Out__0__PC)
+#define SCSI_Out_1		(SCSI_Out__1__PC)
+#define SCSI_Out_2		(SCSI_Out__2__PC)
+#define SCSI_Out_3		(SCSI_Out__3__PC)
+#define SCSI_Out_4		(SCSI_Out__4__PC)
+#define SCSI_Out_5		(SCSI_Out__5__PC)
+#define SCSI_Out_6		(SCSI_Out__6__PC)
+#define SCSI_Out_7		(SCSI_Out__7__PC)
+#define SCSI_Out_8		(SCSI_Out__8__PC)
+#define SCSI_Out_9		(SCSI_Out__9__PC)
+
+#define SCSI_Out_DBP_raw		(SCSI_Out__DBP_raw__PC)
+#define SCSI_Out_ATN		(SCSI_Out__ATN__PC)
+#define SCSI_Out_BSY		(SCSI_Out__BSY__PC)
+#define SCSI_Out_ACK		(SCSI_Out__ACK__PC)
+#define SCSI_Out_RST		(SCSI_Out__RST__PC)
+#define SCSI_Out_MSG_raw		(SCSI_Out__MSG_raw__PC)
+#define SCSI_Out_SEL		(SCSI_Out__SEL__PC)
+#define SCSI_Out_CD_raw		(SCSI_Out__CD_raw__PC)
+#define SCSI_Out_REQ		(SCSI_Out__REQ__PC)
+#define SCSI_Out_IO_raw		(SCSI_Out__IO_raw__PC)
 
 #endif /* End Pins SCSI_Out_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_CD.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void SD_CD_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  SD_CD_DM_STRONG     Strong Drive 
+*  SD_CD_DM_OD_HI      Open Drain, Drives High 
+*  SD_CD_DM_OD_LO      Open Drain, Drives Low 
+*  SD_CD_DM_RES_UP     Resistive Pull Up 
+*  SD_CD_DM_RES_DWN    Resistive Pull Down 
+*  SD_CD_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  SD_CD_DM_DIG_HIZ    High Impedance Digital 
+*  SD_CD_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_CD.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CD_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_CD.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SD_CD_0		SD_CD__0__PC
+#define SD_CD_0		(SD_CD__0__PC)
 
 #endif /* End Pins SD_CD_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_CS.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void SD_CS_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  SD_CS_DM_STRONG     Strong Drive 
+*  SD_CS_DM_OD_HI      Open Drain, Drives High 
+*  SD_CS_DM_OD_LO      Open Drain, Drives Low 
+*  SD_CS_DM_RES_UP     Resistive Pull Up 
+*  SD_CS_DM_RES_DWN    Resistive Pull Down 
+*  SD_CS_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  SD_CS_DM_DIG_HIZ    High Impedance Digital 
+*  SD_CS_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_CS.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_CS_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_CS.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SD_CS_0		SD_CS__0__PC
+#define SD_CS_0		(SD_CS__0__PC)
 
 #endif /* End Pins SD_CS_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_DAT1.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void SD_DAT1_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  SD_DAT1_DM_STRONG     Strong Drive 
+*  SD_DAT1_DM_OD_HI      Open Drain, Drives High 
+*  SD_DAT1_DM_OD_LO      Open Drain, Drives Low 
+*  SD_DAT1_DM_RES_UP     Resistive Pull Up 
+*  SD_DAT1_DM_RES_DWN    Resistive Pull Down 
+*  SD_DAT1_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  SD_DAT1_DM_DIG_HIZ    High Impedance Digital 
+*  SD_DAT1_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_DAT1.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT1_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_DAT1.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SD_DAT1_0		SD_DAT1__0__PC
+#define SD_DAT1_0		(SD_DAT1__0__PC)
 
 #endif /* End Pins SD_DAT1_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_DAT2.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void SD_DAT2_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  SD_DAT2_DM_STRONG     Strong Drive 
+*  SD_DAT2_DM_OD_HI      Open Drain, Drives High 
+*  SD_DAT2_DM_OD_LO      Open Drain, Drives Low 
+*  SD_DAT2_DM_RES_UP     Resistive Pull Up 
+*  SD_DAT2_DM_RES_DWN    Resistive Pull Down 
+*  SD_DAT2_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  SD_DAT2_DM_DIG_HIZ    High Impedance Digital 
+*  SD_DAT2_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_DAT2.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_DAT2_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_DAT2.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SD_DAT2_0		SD_DAT2__0__PC
+#define SD_DAT2_0		(SD_DAT2__0__PC)
 
 #endif /* End Pins SD_DAT2_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Data_Clk.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_Data_Clk.c
-* Version 2.10
+* Version 2.20
 *
 *  Description:
 *   This file provides the source code to the API for the clock component.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_Data_Clk.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_Data_Clk.h
-* Version 2.10
+* Version 2.20
 *
 *  Description:
 *   Provides the function and constant definitions for the clock component.
@@ -28,7 +28,7 @@
 /* Check to see if required defines such as CY_PSOC5LP are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5LP)
-    #error Component cy_clock_v2_10 requires cy_boot v3.0 or later
+    #error Component cy_clock_v2_20 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5LP) */
 
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_MISO.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void SD_MISO_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  SD_MISO_DM_STRONG     Strong Drive 
+*  SD_MISO_DM_OD_HI      Open Drain, Drives High 
+*  SD_MISO_DM_OD_LO      Open Drain, Drives Low 
+*  SD_MISO_DM_RES_UP     Resistive Pull Up 
+*  SD_MISO_DM_RES_DWN    Resistive Pull Down 
+*  SD_MISO_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  SD_MISO_DM_DIG_HIZ    High Impedance Digital 
+*  SD_MISO_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_MISO.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MISO_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_MISO.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SD_MISO_0		SD_MISO__0__PC
+#define SD_MISO_0		(SD_MISO__0__PC)
 
 #endif /* End Pins SD_MISO_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_MOSI.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void SD_MOSI_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  SD_MOSI_DM_STRONG     Strong Drive 
+*  SD_MOSI_DM_OD_HI      Open Drain, Drives High 
+*  SD_MOSI_DM_OD_LO      Open Drain, Drives Low 
+*  SD_MOSI_DM_RES_UP     Resistive Pull Up 
+*  SD_MOSI_DM_RES_DWN    Resistive Pull Down 
+*  SD_MOSI_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  SD_MOSI_DM_DIG_HIZ    High Impedance Digital 
+*  SD_MOSI_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_MOSI.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_MOSI_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_MOSI.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SD_MOSI_0		SD_MOSI__0__PC
+#define SD_MOSI_0		(SD_MOSI__0__PC)
 
 #endif /* End Pins SD_MOSI_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_SCK.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void SD_SCK_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  SD_SCK_DM_STRONG     Strong Drive 
+*  SD_SCK_DM_OD_HI      Open Drain, Drives High 
+*  SD_SCK_DM_OD_LO      Open Drain, Drives Low 
+*  SD_SCK_DM_RES_UP     Resistive Pull Up 
+*  SD_SCK_DM_RES_DWN    Resistive Pull Down 
+*  SD_SCK_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  SD_SCK_DM_DIG_HIZ    High Impedance Digital 
+*  SD_SCK_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_SCK.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/SD_SCK_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: SD_SCK.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define SD_SCK_0		SD_SCK__0__PC
+#define SD_SCK_0		(SD_SCK__0__PC)
 
 #endif /* End Pins SD_SCK_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  API for USBFS Component.
@@ -11,7 +11,7 @@
 *  registers are indexed by variations of epNumber - 1.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -23,28 +23,33 @@
 #include "USBFS_hid.h"
 #if(USBFS_DMA1_REMOVE == 0u)
     #include "USBFS_ep1_dma.h"
-#endif   /* End USBFS_DMA1_REMOVE */
+#endif   /*  USBFS_DMA1_REMOVE */
 #if(USBFS_DMA2_REMOVE == 0u)
     #include "USBFS_ep2_dma.h"
-#endif   /* End USBFS_DMA2_REMOVE */
+#endif   /*  USBFS_DMA2_REMOVE */
 #if(USBFS_DMA3_REMOVE == 0u)
     #include "USBFS_ep3_dma.h"
-#endif   /* End USBFS_DMA3_REMOVE */
+#endif   /*  USBFS_DMA3_REMOVE */
 #if(USBFS_DMA4_REMOVE == 0u)
     #include "USBFS_ep4_dma.h"
-#endif   /* End USBFS_DMA4_REMOVE */
+#endif   /*  USBFS_DMA4_REMOVE */
 #if(USBFS_DMA5_REMOVE == 0u)
     #include "USBFS_ep5_dma.h"
-#endif   /* End USBFS_DMA5_REMOVE */
+#endif   /*  USBFS_DMA5_REMOVE */
 #if(USBFS_DMA6_REMOVE == 0u)
     #include "USBFS_ep6_dma.h"
-#endif   /* End USBFS_DMA6_REMOVE */
+#endif   /*  USBFS_DMA6_REMOVE */
 #if(USBFS_DMA7_REMOVE == 0u)
     #include "USBFS_ep7_dma.h"
-#endif   /* End USBFS_DMA7_REMOVE */
+#endif   /*  USBFS_DMA7_REMOVE */
 #if(USBFS_DMA8_REMOVE == 0u)
     #include "USBFS_ep8_dma.h"
-#endif   /* End USBFS_DMA8_REMOVE */
+#endif   /*  USBFS_DMA8_REMOVE */
+#if((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+    #include "USBFS_EP_DMA_Done_isr.h"
+    #include "USBFS_EP8_DMA_Done_SR.h"
+    #include "USBFS_EP17_DMA_Done_SR.h"
+#endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
 
 
 /***************************************
@@ -55,7 +60,25 @@ uint8 USBFS_initVar = 0u;
 #if(USBFS_EP_MM != USBFS__EP_MANUAL)
     uint8 USBFS_DmaChan[USBFS_MAX_EP];
     uint8 USBFS_DmaTd[USBFS_MAX_EP];
-#endif /* End USBFS_EP_MM */
+#endif /*  USBFS_EP_MM */
+#if((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+    static uint8 clearInDataRdyStatus = USBFS_ARB_EPX_CFG_DEFAULT;
+    uint8 USBFS_DmaNextTd[USBFS_MAX_EP];
+    const uint8 USBFS_epX_TD_TERMOUT_EN[USBFS_MAX_EP] =
+    {   0u,
+        USBFS_ep1_TD_TERMOUT_EN,
+        USBFS_ep2_TD_TERMOUT_EN,
+        USBFS_ep3_TD_TERMOUT_EN,
+        USBFS_ep4_TD_TERMOUT_EN,
+        USBFS_ep5_TD_TERMOUT_EN,
+        USBFS_ep6_TD_TERMOUT_EN,
+        USBFS_ep7_TD_TERMOUT_EN,
+        USBFS_ep8_TD_TERMOUT_EN
+    };
+    volatile uint16 USBFS_inLength[USBFS_MAX_EP];
+    const uint8 *USBFS_inDataPointer[USBFS_MAX_EP];
+    volatile uint8 USBFS_inBufFull[USBFS_MAX_EP];
+#endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
 
 
 /*******************************************************************************
@@ -137,7 +160,7 @@ void USBFS_Init(void)
     uint8 enableInterrupts;
     #if(USBFS_EP_MM != USBFS__EP_MANUAL)
         uint16 i;
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+    #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
     enableInterrupts = CyEnterCriticalSection();
 
@@ -190,8 +213,11 @@ void USBFS_Init(void)
         for (i = 0u; i < USBFS_MAX_EP; i++)
         {
             USBFS_DmaTd[i] = DMA_INVALID_TD;
+            #if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+                USBFS_DmaNextTd[i] = DMA_INVALID_TD;
+            #endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
         }
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+    #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
     CyExitCriticalSection(enableInterrupts);
 
@@ -204,7 +230,7 @@ void USBFS_Init(void)
     #if(USBFS_SOF_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_SOF_VECT_NUM,   &USBFS_SOF_ISR);
         CyIntSetPriority(USBFS_SOF_VECT_NUM, USBFS_SOF_PRIOR);
-    #endif   /* End USBFS_SOF_ISR_REMOVE */
+    #endif   /*  USBFS_SOF_ISR_REMOVE */
 
     /* Set the Control Endpoint Interrupt. */
     (void) CyIntSetVector(USBFS_EP_0_VECT_NUM,   &USBFS_EP_0_ISR);
@@ -214,55 +240,55 @@ void USBFS_Init(void)
     #if(USBFS_EP1_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_1_VECT_NUM,   &USBFS_EP_1_ISR);
         CyIntSetPriority(USBFS_EP_1_VECT_NUM, USBFS_EP_1_PRIOR);
-    #endif   /* End USBFS_EP1_ISR_REMOVE */
+    #endif   /*  USBFS_EP1_ISR_REMOVE */
 
     /* Set the Data Endpoint 2 Interrupt. */
     #if(USBFS_EP2_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_2_VECT_NUM,   &USBFS_EP_2_ISR);
         CyIntSetPriority(USBFS_EP_2_VECT_NUM, USBFS_EP_2_PRIOR);
-    #endif   /* End USBFS_EP2_ISR_REMOVE */
+    #endif   /*  USBFS_EP2_ISR_REMOVE */
 
     /* Set the Data Endpoint 3 Interrupt. */
     #if(USBFS_EP3_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_3_VECT_NUM,   &USBFS_EP_3_ISR);
         CyIntSetPriority(USBFS_EP_3_VECT_NUM, USBFS_EP_3_PRIOR);
-    #endif   /* End USBFS_EP3_ISR_REMOVE */
+    #endif   /*  USBFS_EP3_ISR_REMOVE */
 
     /* Set the Data Endpoint 4 Interrupt. */
     #if(USBFS_EP4_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_4_VECT_NUM,   &USBFS_EP_4_ISR);
         CyIntSetPriority(USBFS_EP_4_VECT_NUM, USBFS_EP_4_PRIOR);
-    #endif   /* End USBFS_EP4_ISR_REMOVE */
+    #endif   /*  USBFS_EP4_ISR_REMOVE */
 
     /* Set the Data Endpoint 5 Interrupt. */
     #if(USBFS_EP5_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_5_VECT_NUM,   &USBFS_EP_5_ISR);
         CyIntSetPriority(USBFS_EP_5_VECT_NUM, USBFS_EP_5_PRIOR);
-    #endif   /* End USBFS_EP5_ISR_REMOVE */
+    #endif   /*  USBFS_EP5_ISR_REMOVE */
 
     /* Set the Data Endpoint 6 Interrupt. */
     #if(USBFS_EP6_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_6_VECT_NUM,   &USBFS_EP_6_ISR);
         CyIntSetPriority(USBFS_EP_6_VECT_NUM, USBFS_EP_6_PRIOR);
-    #endif   /* End USBFS_EP6_ISR_REMOVE */
+    #endif   /*  USBFS_EP6_ISR_REMOVE */
 
      /* Set the Data Endpoint 7 Interrupt. */
     #if(USBFS_EP7_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_7_VECT_NUM,   &USBFS_EP_7_ISR);
         CyIntSetPriority(USBFS_EP_7_VECT_NUM, USBFS_EP_7_PRIOR);
-    #endif   /* End USBFS_EP7_ISR_REMOVE */
+    #endif   /*  USBFS_EP7_ISR_REMOVE */
 
     /* Set the Data Endpoint 8 Interrupt. */
     #if(USBFS_EP8_ISR_REMOVE == 0u)
         (void) CyIntSetVector(USBFS_EP_8_VECT_NUM,   &USBFS_EP_8_ISR);
         CyIntSetPriority(USBFS_EP_8_VECT_NUM, USBFS_EP_8_PRIOR);
-    #endif   /* End USBFS_EP8_ISR_REMOVE */
+    #endif   /*  USBFS_EP8_ISR_REMOVE */
 
     #if((USBFS_EP_MM != USBFS__EP_MANUAL) && (USBFS_ARB_ISR_REMOVE == 0u))
         /* Set the ARB Interrupt. */
         (void) CyIntSetVector(USBFS_ARB_VECT_NUM,   &USBFS_ARB_ISR);
         CyIntSetPriority(USBFS_ARB_VECT_NUM, USBFS_ARB_PRIOR);
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+    #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
 }
 
@@ -339,45 +365,50 @@ void USBFS_InitComponent(uint8 device, uint8 mode)
     CyIntEnable(USBFS_EP_0_VECT_NUM);
     #if(USBFS_EP1_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_1_VECT_NUM);
-    #endif   /* End USBFS_EP1_ISR_REMOVE */
+    #endif   /*  USBFS_EP1_ISR_REMOVE */
     #if(USBFS_EP2_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_2_VECT_NUM);
-    #endif   /* End USBFS_EP2_ISR_REMOVE */
+    #endif   /*  USBFS_EP2_ISR_REMOVE */
     #if(USBFS_EP3_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_3_VECT_NUM);
-    #endif   /* End USBFS_EP3_ISR_REMOVE */
+    #endif   /*  USBFS_EP3_ISR_REMOVE */
     #if(USBFS_EP4_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_4_VECT_NUM);
-    #endif   /* End USBFS_EP4_ISR_REMOVE */
+    #endif   /*  USBFS_EP4_ISR_REMOVE */
     #if(USBFS_EP5_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_5_VECT_NUM);
-    #endif   /* End USBFS_EP5_ISR_REMOVE */
+    #endif   /*  USBFS_EP5_ISR_REMOVE */
     #if(USBFS_EP6_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_6_VECT_NUM);
-    #endif   /* End USBFS_EP6_ISR_REMOVE */
+    #endif   /*  USBFS_EP6_ISR_REMOVE */
     #if(USBFS_EP7_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_7_VECT_NUM);
-    #endif   /* End USBFS_EP7_ISR_REMOVE */
+    #endif   /*  USBFS_EP7_ISR_REMOVE */
     #if(USBFS_EP8_ISR_REMOVE == 0u)
         CyIntEnable(USBFS_EP_8_VECT_NUM);
-    #endif   /* End USBFS_EP8_ISR_REMOVE */
+    #endif   /*  USBFS_EP8_ISR_REMOVE */
     #if((USBFS_EP_MM != USBFS__EP_MANUAL) && (USBFS_ARB_ISR_REMOVE == 0u))
         /* usb arb interrupt enable */
         USBFS_ARB_INT_EN_REG = USBFS_ARB_INT_MASK;
         CyIntEnable(USBFS_ARB_VECT_NUM);
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+    #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
     /* Arbiter configuration for DMA transfers */
     #if(USBFS_EP_MM != USBFS__EP_MANUAL)
-
         #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)
             USBFS_ARB_CFG_REG = USBFS_ARB_CFG_MANUAL_DMA;
-        #endif   /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */
+        #endif   /*  USBFS_EP_MM == USBFS__EP_DMAMANUAL */
         #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
             /*Set cfg cmplt this rises DMA request when the full configuration is done */
             USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;
-        #endif   /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+            #if(USBFS_EP_DMA_AUTO_OPT == 0u)
+                /* Init interrupt which handles verification of the successful DMA transaction */
+                USBFS_EP_DMA_Done_isr_StartEx(&USBFS_EP_DMA_DONE_ISR);
+                USBFS_EP17_DMA_Done_SR_InterruptEnable();
+                USBFS_EP8_DMA_Done_SR_InterruptEnable();
+            #endif /* USBFS_EP_DMA_AUTO_OPT == 0u */
+        #endif   /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
+    #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
     USBFS_transferState = USBFS_TRANS_STATE_IDLE;
 
@@ -395,7 +426,7 @@ void USBFS_InitComponent(uint8 device, uint8 mode)
                 USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;
             #else
                 USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK | USBFS_CR1_REG_ENABLE;
-            #endif /* End USBFS_VDDD_MV < USBFS_3500MV */
+            #endif /*  USBFS_VDDD_MV < USBFS_3500MV */
             break;
     }
 
@@ -535,7 +566,7 @@ void USBFS_Stop(void)
 
     #if(USBFS_EP_MM != USBFS__EP_MANUAL)
         USBFS_Stop_DMA(USBFS_MAX_EP);     /* Stop all DMAs */
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+    #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
     /* Disable the SIE */
     USBFS_CR0_REG &= (uint8)(~USBFS_CR0_ENABLE);
@@ -551,28 +582,28 @@ void USBFS_Stop(void)
     CyIntDisable(USBFS_EP_0_VECT_NUM);
     #if(USBFS_EP1_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_1_VECT_NUM);
-    #endif   /* End USBFS_EP1_ISR_REMOVE */
+    #endif   /*  USBFS_EP1_ISR_REMOVE */
     #if(USBFS_EP2_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_2_VECT_NUM);
-    #endif   /* End USBFS_EP2_ISR_REMOVE */
+    #endif   /*  USBFS_EP2_ISR_REMOVE */
     #if(USBFS_EP3_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_3_VECT_NUM);
-    #endif   /* End USBFS_EP3_ISR_REMOVE */
+    #endif   /*  USBFS_EP3_ISR_REMOVE */
     #if(USBFS_EP4_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_4_VECT_NUM);
-    #endif   /* End USBFS_EP4_ISR_REMOVE */
+    #endif   /*  USBFS_EP4_ISR_REMOVE */
     #if(USBFS_EP5_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_5_VECT_NUM);
-    #endif   /* End USBFS_EP5_ISR_REMOVE */
+    #endif   /*  USBFS_EP5_ISR_REMOVE */
     #if(USBFS_EP6_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_6_VECT_NUM);
-    #endif   /* End USBFS_EP6_ISR_REMOVE */
+    #endif   /*  USBFS_EP6_ISR_REMOVE */
     #if(USBFS_EP7_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_7_VECT_NUM);
-    #endif   /* End USBFS_EP7_ISR_REMOVE */
+    #endif   /*  USBFS_EP7_ISR_REMOVE */
     #if(USBFS_EP8_ISR_REMOVE == 0u)
         CyIntDisable(USBFS_EP_8_VECT_NUM);
-    #endif   /* End USBFS_EP8_ISR_REMOVE */
+    #endif   /*  USBFS_EP8_ISR_REMOVE */
 
     /* Clear all of the component data */
     USBFS_configuration = 0u;
@@ -768,7 +799,7 @@ uint16 USBFS_GetEPCount(uint8 epNumber)
     *  No.
     *
     *******************************************************************************/
-    void USBFS_InitEP_DMA(uint8 epNumber, const uint8 *pData)
+    void USBFS_InitEP_DMA(uint8 epNumber, const uint8* pData)
                                                                     
     {
         uint16 src;
@@ -788,56 +819,56 @@ uint16 USBFS_GetEPCount(uint8 epNumber)
                 src = HI16(CYDEV_PERIPH_BASE);
                 dst = HI16(pData);
             }
-        #endif  /* End C51 */
+        #endif  /*  C51 */
         switch(epNumber)
         {
             case USBFS_EP1:
                 #if(USBFS_DMA1_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep1_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA1_REMOVE */
+                #endif   /*  USBFS_DMA1_REMOVE */
                 break;
             case USBFS_EP2:
                 #if(USBFS_DMA2_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep2_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA2_REMOVE */
+                #endif   /*  USBFS_DMA2_REMOVE */
                 break;
             case USBFS_EP3:
                 #if(USBFS_DMA3_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep3_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA3_REMOVE */
+                #endif   /*  USBFS_DMA3_REMOVE */
                 break;
             case USBFS_EP4:
                 #if(USBFS_DMA4_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep4_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA4_REMOVE */
+                #endif   /*  USBFS_DMA4_REMOVE */
                 break;
             case USBFS_EP5:
                 #if(USBFS_DMA5_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep5_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA5_REMOVE */
+                #endif   /*  USBFS_DMA5_REMOVE */
                 break;
             case USBFS_EP6:
                 #if(USBFS_DMA6_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep6_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA6_REMOVE */
+                #endif   /*  USBFS_DMA6_REMOVE */
                 break;
             case USBFS_EP7:
                 #if(USBFS_DMA7_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep7_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA7_REMOVE */
+                #endif   /*  USBFS_DMA7_REMOVE */
                 break;
             case USBFS_EP8:
                 #if(USBFS_DMA8_REMOVE == 0u)
                     USBFS_DmaChan[epNumber] = USBFS_ep8_DmaInitialize(
                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);
-                #endif   /* End USBFS_DMA8_REMOVE */
+                #endif   /*  USBFS_DMA8_REMOVE */
                 break;
             default:
                 /* Do not support EP0 DMA transfers */
@@ -846,6 +877,10 @@ uint16 USBFS_GetEPCount(uint8 epNumber)
         if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))
         {
             USBFS_DmaTd[epNumber] = CyDmaTdAllocate();
+            #if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+                USBFS_DmaNextTd[epNumber] = CyDmaTdAllocate();
+            #endif /*  ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
+
         }
     }
 
@@ -879,11 +914,74 @@ uint16 USBFS_GetEPCount(uint8 epNumber)
                 CyDmaTdFree(USBFS_DmaTd[i]);
                 USBFS_DmaTd[i] = DMA_INVALID_TD;
             }
+            #if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+                if(USBFS_DmaNextTd[i] != DMA_INVALID_TD)
+                {
+                    CyDmaTdFree(USBFS_DmaNextTd[i]);
+                    USBFS_DmaNextTd[i] = DMA_INVALID_TD;
+                }
+            #endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
             i++;
         }while((i < USBFS_MAX_EP) && (epNumber == USBFS_MAX_EP));
     }
 
-#endif /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+#endif /*  USBFS_EP_MM != USBFS__EP_MANUAL */
+
+
+#if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+
+
+    /*******************************************************************************
+    * Function Name: USBFS_LoadNextInEP
+    ********************************************************************************
+    *
+    * Summary:
+    *  This internal function is used for IN endpoint DMA reconfiguration in
+    *  Auto DMA mode.
+    *
+    * Parameters:
+    *  epNumber: Contains the data endpoint number.
+    *  mode:   0 - Configure DMA to send the the rest of data.
+    *          1 - Configure DMA to repeat 2 last bytes of the first burst.
+    *
+    * Return:
+    *  None.
+    *
+    *******************************************************************************/
+    void USBFS_LoadNextInEP(uint8 epNumber, uint8 mode) 
+    {
+        reg16 *convert;
+
+        if(mode == 0u)
+        {
+            /* Configure DMA to send the the rest of data */
+            /* CyDmaTdSetConfiguration API is optimised to change only transfer length and configure TD */
+            convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[USBFS_DmaTd[epNumber]].TD0[0u];
+            /* Set transfer length */
+            CY_SET_REG16(convert, USBFS_inLength[epNumber] - USBFS_DMA_BYTES_PER_BURST);
+            /* CyDmaTdSetAddress API is optimized to change only source address */
+            convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[USBFS_DmaTd[epNumber]].TD1[0u];
+            CY_SET_REG16(convert, LO16((uint32)USBFS_inDataPointer[epNumber] +
+                                            USBFS_DMA_BYTES_PER_BURST));
+            USBFS_inBufFull[epNumber] = 1u;
+        }
+        else
+        {
+            /* Configure DMA to repeat 2 last bytes of the first burst. */
+            /* CyDmaTdSetConfiguration API is optimised to change only transfer length and configure TD */
+            convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[USBFS_DmaTd[epNumber]].TD0[0u];
+            /* Set transfer length */
+            CY_SET_REG16(convert, USBFS_DMA_BYTES_REPEAT);
+            /* CyDmaTdSetAddress API is optimized to change only source address */
+            convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[USBFS_DmaTd[epNumber]].TD1[0u];
+            CY_SET_REG16(convert,  LO16((uint32)USBFS_inDataPointer[epNumber] +
+                                   USBFS_DMA_BYTES_PER_BURST - USBFS_DMA_BYTES_REPEAT));
+        }
+
+        /* CyDmaChSetInitialTd API is optimised to init TD */
+        CY_DMA_CH_STRUCT_PTR[USBFS_DmaChan[epNumber]].basic_status[1u] = USBFS_DmaTd[epNumber];
+    }
+#endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
 
 
 /*******************************************************************************
@@ -891,8 +989,7 @@ uint16 USBFS_GetEPCount(uint8 epNumber)
 ********************************************************************************
 *
 * Summary:
-*  Loads and enables the specified USB data endpoint for an IN interrupt or bulk
-*  transfer.
+*  Loads and enables the specified USB data endpoint for an IN transfer.
 *
 * Parameters:
 *  epNumber: Contains the data endpoint number.
@@ -916,7 +1013,7 @@ void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)
     reg8 *p;
     #if(USBFS_EP_MM == USBFS__EP_MANUAL)
         uint16 i;
-    #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */
+    #endif /*  USBFS_EP_MM == USBFS__EP_MANUAL */
 
     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))
     {
@@ -929,7 +1026,7 @@ void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)
             {
                 length = USBFS_EPX_DATA_BUF_MAX - USBFS_EP[epNumber].buffOffset;
             }
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */
+        #endif /*  USBFS_EP_MM != USBFS__EP_DMAAUTO */
 
         /* Set the count and data toggle */
         CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri),
@@ -950,15 +1047,15 @@ void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)
             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);
         #else
             /* Init DMA if it was not initialized */
-            if(USBFS_DmaTd[epNumber] == DMA_INVALID_TD)
+            if (USBFS_DmaTd[epNumber] == DMA_INVALID_TD)
             {
                 USBFS_InitEP_DMA(epNumber, pData);
             }
-        #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */
+        #endif /*  USBFS_EP_MM == USBFS__EP_MANUAL */
 
         #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)
             USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;
-            if((pData != NULL) && (length > 0u))
+            if ((pData != NULL) && (length > 0u))
             {
                 /* Enable DMA in mode2 for transferring data */
                 (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);
@@ -978,16 +1075,37 @@ void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)
                 /* When zero-length packet - write the Mode register directly */
                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);
             }
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */
+        #endif /*  USBFS_EP_MM == USBFS__EP_DMAMANUAL */
 
         #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
-            if(pData != NULL)
+            if (pData != NULL)
             {
                 /* Enable DMA in mode3 for transferring data */
                 (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);
+            #if (USBFS_EP_DMA_AUTO_OPT == 0u)
+                USBFS_inLength[epNumber] = length;
+                USBFS_inDataPointer[epNumber] = pData;
+                /* Configure DMA to send the data only for the first burst */
+                (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber],
+                    (length > USBFS_DMA_BYTES_PER_BURST) ? USBFS_DMA_BYTES_PER_BURST : length,
+                    USBFS_DmaNextTd[epNumber], TD_TERMIN_EN | TD_INC_SRC_ADR);
+                (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)pData), LO16((uint32)p));
+                /* The second TD will be executed only when the first one fails.
+                *  The intention of this TD is to generate NRQ interrupt
+                *  and repeat 2 last bytes of the first burst.
+                */
+                (void) CyDmaTdSetConfiguration(USBFS_DmaNextTd[epNumber], 1u,
+                                               USBFS_DmaNextTd[epNumber],
+                                               USBFS_epX_TD_TERMOUT_EN[epNumber]);
+                /* Configure DmaNextTd to clear Data ready status */
+                (void) CyDmaTdSetAddress(USBFS_DmaNextTd[epNumber],  LO16((uint32)&clearInDataRdyStatus),
+                                                                LO16((uint32)(USBFS_ARB_EP1_CFG_IND + ri)));
+            #else /* Configure DMA to send all data*/
                 (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length,
                                                USBFS_DmaTd[epNumber], TD_TERMIN_EN | TD_INC_SRC_ADR);
                 (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)pData), LO16((uint32)p));
+            #endif /* USBFS_EP_DMA_AUTO_OPT == 0u */
+
                 /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */
                 (void) CyDmaClearPendingDrq(USBFS_DmaChan[epNumber]);
                 /* Enable the DMA */
@@ -999,8 +1117,28 @@ void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)
                 USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;
                 if(length > 0u)
                 {
+                #if (USBFS_EP_DMA_AUTO_OPT == 0u)
+                    USBFS_inLength[epNumber] = length;
+                    USBFS_inBufFull[epNumber] = 0u;
+                    (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);
+                    /* Configure DMA to send the data only for the first burst */
+                    (void) CyDmaTdSetConfiguration(
+                        USBFS_DmaTd[epNumber], (length > USBFS_DMA_BYTES_PER_BURST) ?
+                        USBFS_DMA_BYTES_PER_BURST : length,
+                        USBFS_DmaNextTd[epNumber], TD_TERMIN_EN | TD_INC_SRC_ADR );
+                    (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],
+                                             LO16((uint32)USBFS_inDataPointer[epNumber]), LO16((uint32)p));
+                    /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */
+                    (void) CyDmaClearPendingDrq(USBFS_DmaChan[epNumber]);
+                    /* Enable the DMA */
+                    (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);
+                    (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);
+                #endif /* (USBFS_EP_DMA_AUTO_OPT == 0u) */
+
                     /* Set Data ready status, This will generate DMA request */
-                    * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_IN_DATA_RDY;
+                    #ifndef USBFS_MANUAL_IN_EP_ARM
+                        * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_IN_DATA_RDY;
+                    #endif  /* USBFS_MANUAL_IN_EP_ARM */
                     /* Mode register will be written in arb ISR(In Buffer Full) after first DMA transfer complete */
                 }
                 else
@@ -1009,8 +1147,7 @@ void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)
                     CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);
                 }
             }
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
-
+        #endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
     }
 }
 
@@ -1047,10 +1184,10 @@ uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)
     reg8 *p;
     #if(USBFS_EP_MM == USBFS__EP_MANUAL)
         uint16 i;
-    #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */
+    #endif /*  USBFS_EP_MM == USBFS__EP_MANUAL */
     #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)
         uint16 xferCount;
-    #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */
+    #endif /*  USBFS_EP_MM != USBFS__EP_DMAAUTO */
 
     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP) && (pData != NULL))
     {
@@ -1064,7 +1201,7 @@ uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)
             {
                 length = xferCount;
             }
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */
+        #endif /*  USBFS_EP_MM != USBFS__EP_DMAAUTO */
 
         #if(USBFS_EP_MM == USBFS__EP_MANUAL)
             /* Copy the data using the arbiter data register */
@@ -1081,7 +1218,8 @@ uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)
             {
                 USBFS_InitEP_DMA(epNumber, pData);
             }
-        #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */
+
+        #endif /*  USBFS_EP_MM == USBFS__EP_MANUAL */
 
         #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)
             /* Enable DMA in mode2 for transferring data */
@@ -1097,7 +1235,7 @@ uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)
             * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_DMA_REQ;
             * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_ARB_EPX_CFG_DMA_REQ));
             /* Out EP will be (re)armed in arb ISR after transfer complete */
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */
+        #endif /*  USBFS_EP_MM == USBFS__EP_DMAMANUAL */
 
         #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
             /* Enable DMA in mode3 for transferring data */
@@ -1112,7 +1250,7 @@ uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)
             (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);
             (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);
             /* Out EP will be (re)armed in arb ISR after transfer complete */
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+        #endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
 
     }
     else

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS.h

@@ -1,12 +1,12 @@
 /*******************************************************************************
 * File Name: USBFS.h
-* Version 2.60
+* Version 2.80
 *
 * Description:
-*  Header File for the USFS component. Contains prototypes and constant values.
+*  Header File for the USBFS component. Contains prototypes and constant values.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -20,6 +20,11 @@
 #include "cyfitter.h"
 #include "CyLib.h"
 
+/*  User supplied definitions. */
+/* `#START USER_DEFINITIONS` Place your declaration here */
+
+/* `#END` */
+
 
 /***************************************
 * Conditional Compilation Parameters
@@ -28,7 +33,7 @@
 /* Check to see if required defines such as CY_PSOC5LP are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5LP)
-    #error Component USBFS_v2_60 requires cy_boot v3.0 or later
+    #error Component USBFS_v2_80 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5LP) */
 
 
@@ -47,7 +52,7 @@
 #else
     #define USBFS_DATA
     #define USBFS_XDATA
-#endif /* End __C51__ */
+#endif /*  __C51__ */
 #define USBFS_NULL       NULL
 
 
@@ -105,6 +110,7 @@
 #define USBFS_EP8_ISR_REMOVE                 (1u)
 #define USBFS_EP_MM                          (0u)
 #define USBFS_EP_MA                          (0u)
+#define USBFS_EP_DMA_AUTO_OPT                (0u)
 #define USBFS_DMA1_REMOVE                    (1u)
 #define USBFS_DMA2_REMOVE                    (1u)
 #define USBFS_DMA3_REMOVE                    (1u)
@@ -226,7 +232,7 @@ void   USBFS_Resume(void) ;
 #endif  /* USBFS_ENABLE_FWSN_STRING */
 #if (USBFS_MON_VBUS == 1u)
     uint8  USBFS_VBusPresent(void) ;
-#endif /* End USBFS_MON_VBUS */
+#endif /*  USBFS_MON_VBUS */
 
 #if defined(CYDEV_BOOTLOADER_IO_COMP) && ((CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS) || \
                                           (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface))
@@ -234,19 +240,24 @@ void   USBFS_Resume(void) ;
     void USBFS_CyBtldrCommStart(void) ;
     void USBFS_CyBtldrCommStop(void) ;
     void USBFS_CyBtldrCommReset(void) ;
-    cystatus USBFS_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL
+    cystatus USBFS_CyBtldrCommWrite(const uint8 pData[], uint16 size, uint16 *count, uint8 timeOut) CYSMALL
                                                         ;
-    cystatus USBFS_CyBtldrCommRead( uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL
+    cystatus USBFS_CyBtldrCommRead       (uint8 pData[], uint16 size, uint16 *count, uint8 timeOut) CYSMALL
                                                         ;
 
-    #define USBFS_BTLDR_SIZEOF_WRITE_BUFFER      (64u)    /* EP 1 OUT */
-    #define USBFS_BTLDR_SIZEOF_READ_BUFFER       (64u)    /* EP 2 IN */
-    #define USBFS_BTLDR_MAX_PACKET_SIZE          USBFS_BTLDR_SIZEOF_WRITE_BUFFER
+    #define USBFS_BTLDR_OUT_EP      (0x01u)
+    #define USBFS_BTLDR_IN_EP       (0x02u)
+
+    #define USBFS_BTLDR_SIZEOF_WRITE_BUFFER  (64u)   /* EP 1 OUT */
+    #define USBFS_BTLDR_SIZEOF_READ_BUFFER   (64u)   /* EP 2 IN  */
+    #define USBFS_BTLDR_MAX_PACKET_SIZE      USBFS_BTLDR_SIZEOF_WRITE_BUFFER
+
+    #define USBFS_BTLDR_WAIT_1_MS            (1u)    /* Time Out quantity equal 1mS */
 
     /* These defines active if used USBFS interface as an
     *  IO Component for bootloading. When Custom_Interface selected
     *  in Bootloder configuration as the IO Component, user must
-    *  provide these functions
+    *  provide these functions.
     */
     #if (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS)
         #define CyBtldrCommStart        USBFS_CyBtldrCommStart
@@ -256,13 +267,13 @@ void   USBFS_Resume(void) ;
         #define CyBtldrCommRead         USBFS_CyBtldrCommRead
     #endif  /*End   CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS */
 
-#endif /* End CYDEV_BOOTLOADER_IO_COMP  */
+#endif /*  CYDEV_BOOTLOADER_IO_COMP  */
 
 #if(USBFS_EP_MM != USBFS__EP_MANUAL)
-    void USBFS_InitEP_DMA(uint8 epNumber, const uint8 *pData)
+    void USBFS_InitEP_DMA(uint8 epNumber, const uint8* pData)
                                                     ;
     void USBFS_Stop_DMA(uint8 epNumber) ;
-#endif /* End USBFS_EP_MM != USBFS__EP_MANUAL) */
+#endif /*  USBFS_EP_MM != USBFS__EP_MANUAL) */
 
 #if defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u)
     void USBFS_MIDI_EP_Init(void) ;
@@ -277,7 +288,7 @@ void   USBFS_Resume(void) ;
         void USBFS_MIDI_OUT_EP_Service(void) ;
     #endif /* USBFS_MIDI_OUT_BUFF_SIZE > 0 */
 
-#endif /* End USBFS_ENABLE_MIDI_API != 0u */
+#endif /*  USBFS_ENABLE_MIDI_API != 0u */
 
 /* Renamed Functions for backward compatibility.
 *  Should not be used in new designs.
@@ -490,10 +501,10 @@ void   USBFS_Resume(void) ;
 #define USBFS_EP_USAGE_TYPE_RESERVED         (0x30u)
 #define USBFS_EP_USAGE_TYPE_MASK             (0x30u)
 
-/* Endpoint Status defines */
+/* point Status defines */
 #define USBFS_EP_STATUS_LENGTH               (0x02u)
 
-/* Endpoint Device defines */
+/* point Device defines */
 #define USBFS_DEVICE_STATUS_LENGTH           (0x02u)
 
 #define USBFS_STATUS_LENGTH_MAX \
@@ -520,14 +531,60 @@ void   USBFS_Resume(void) ;
     /* DMA manual mode defines */
     #define USBFS_DMA_BYTES_PER_BURST        (0u)
     #define USBFS_DMA_REQUEST_PER_BURST      (0u)
-#endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */
+#endif /*  USBFS_EP_MM == USBFS__EP_DMAMANUAL */
 #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
     /* DMA automatic mode defines */
     #define USBFS_DMA_BYTES_PER_BURST        (32u)
+    #define USBFS_DMA_BYTES_REPEAT           (2u)
     /* BUF_SIZE-BYTES_PER_BURST examples: 55-32 bytes  44-16 bytes 33-8 bytes 22-4 bytes 11-2 bytes */
     #define USBFS_DMA_BUF_SIZE               (0x55u)
     #define USBFS_DMA_REQUEST_PER_BURST      (1u)
-#endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+
+    #if(USBFS_DMA1_REMOVE == 0u)
+        #define USBFS_ep1_TD_TERMOUT_EN      USBFS_ep1__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep1_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA1_REMOVE == 0u */
+    #if(USBFS_DMA2_REMOVE == 0u)
+        #define USBFS_ep2_TD_TERMOUT_EN      USBFS_ep2__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep2_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA2_REMOVE == 0u */
+    #if(USBFS_DMA3_REMOVE == 0u)
+        #define USBFS_ep3_TD_TERMOUT_EN      USBFS_ep3__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep3_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA3_REMOVE == 0u */
+    #if(USBFS_DMA4_REMOVE == 0u)
+        #define USBFS_ep4_TD_TERMOUT_EN      USBFS_ep4__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep4_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA4_REMOVE == 0u */
+    #if(USBFS_DMA5_REMOVE == 0u)
+        #define USBFS_ep5_TD_TERMOUT_EN      USBFS_ep5__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep5_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA5_REMOVE == 0u */
+    #if(USBFS_DMA6_REMOVE == 0u)
+        #define USBFS_ep6_TD_TERMOUT_EN      USBFS_ep6__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep6_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA6_REMOVE == 0u */
+    #if(USBFS_DMA7_REMOVE == 0u)
+        #define USBFS_ep7_TD_TERMOUT_EN      USBFS_ep7__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep7_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA7_REMOVE == 0u */
+    #if(USBFS_DMA8_REMOVE == 0u)
+        #define USBFS_ep8_TD_TERMOUT_EN      USBFS_ep8__TD_TERMOUT_EN
+    #else
+        #define USBFS_ep8_TD_TERMOUT_EN      (0u)
+    #endif /* USBFS_DMA8_REMOVE == 0u */
+
+    #define     USBFS_EP17_SR_MASK           (0x7fu)
+    #define     USBFS_EP8_SR_MASK            (0x03u)
+
+#endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
 
 /* DIE ID string descriptor defines */
 #if defined(USBFS_ENABLE_IDSN_STRING)
@@ -812,7 +869,7 @@ extern volatile uint8 USBFS_deviceStatus;
 #if(!CY_PSOC5LP)
     #define USBFS_USBIO_CR2_PTR      (  (reg8 *) USBFS_USB__USBIO_CR2)
     #define USBFS_USBIO_CR2_REG      (* (reg8 *) USBFS_USB__USBIO_CR2)
-#endif /* End CY_PSOC5LP */
+#endif /*  CY_PSOC5LP */
 
 #define USBFS_DIE_ID             CYDEV_FLSHID_CUST_TABLES_BASE
 
@@ -838,8 +895,8 @@ extern volatile uint8 USBFS_deviceStatus;
     #else
         #define USBFS_VBUS_PS_PTR        (  (reg8 *) USBFS_Vbus_ps_sts_sts_reg__STATUS_REG )
         #define USBFS_VBUS_MASK          (0x01u)
-    #endif /* End USBFS_EXTERN_VBUS == 0u */
-#endif /* End USBFS_MON_VBUS */
+    #endif /*  USBFS_EXTERN_VBUS == 0u */
+#endif /*  USBFS_MON_VBUS */
 
 /* Renamed Registers for backward compatibility.
 *  Should not be used in new designs.
@@ -1017,7 +1074,7 @@ extern volatile uint8 USBFS_deviceStatus;
     #define USBFS_USB_ISR_SET_EN ((reg8 *) CYDEV_NVIC_SETENA0)
     #define USBFS_USB_ISR_CLR_EN ((reg8 *) CYDEV_NVIC_CLRENA0)
     #define USBFS_USB_ISR_VECT   ((cyisraddress *) CYDEV_NVIC_VECT_OFFSET)
-#endif /* End CYDEV_CHIP_DIE_EXPECT */
+#endif /*  CYDEV_CHIP_DIE_EXPECT */
 
 
 /***************************************
@@ -1138,6 +1195,8 @@ extern volatile uint8 USBFS_deviceStatus;
 #define USBFS_ARB_EPX_CFG_CRC_BYPASS     (0x04u)
 #define USBFS_ARB_EPX_CFG_DMA_REQ        (0x02u)
 #define USBFS_ARB_EPX_CFG_IN_DATA_RDY    (0x01u)
+#define USBFS_ARB_EPX_CFG_DEFAULT        (USBFS_ARB_EPX_CFG_RESET | \
+                                                     USBFS_ARB_EPX_CFG_CRC_BYPASS)
 
 #define USBFS_ARB_EPX_SR_IN_BUF_FULL     (0x01u)
 #define USBFS_ARB_EPX_SR_DMA_GNT         (0x02u)
@@ -1153,7 +1212,7 @@ extern volatile uint8 USBFS_deviceStatus;
     #define USBFS_ARB_EPX_INT_MASK           (0x1Du)
 #else
     #define USBFS_ARB_EPX_INT_MASK           (0x1Fu)
-#endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+#endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
 #define USBFS_ARB_INT_MASK       (uint8)((USBFS_DMA1_REMOVE ^ 1u) | \
                                             (uint8)((USBFS_DMA2_REMOVE ^ 1u) << 1u) | \
                                             (uint8)((USBFS_DMA3_REMOVE ^ 1u) << 2u) | \
@@ -1190,7 +1249,7 @@ extern volatile uint8 USBFS_deviceStatus;
 #define USBFS_DYN_RECONFIG_RDY_STS       (0x10u)
 
 
-#endif /* End CY_USBFS_USBFS_H */
+#endif /*  CY_USBFS_USBFS_H */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_Dm.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_Dm.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void USBFS_Dm_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  USBFS_Dm_DM_STRONG     Strong Drive 
+*  USBFS_Dm_DM_OD_HI      Open Drain, Drives High 
+*  USBFS_Dm_DM_OD_LO      Open Drain, Drives Low 
+*  USBFS_Dm_DM_RES_UP     Resistive Pull Up 
+*  USBFS_Dm_DM_RES_DWN    Resistive Pull Down 
+*  USBFS_Dm_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  USBFS_Dm_DM_DIG_HIZ    High Impedance Digital 
+*  USBFS_Dm_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_Dm.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_Dm.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_Dm_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_Dm.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define USBFS_Dm_0		USBFS_Dm__0__PC
+#define USBFS_Dm_0		(USBFS_Dm__0__PC)
 
 #endif /* End Pins USBFS_Dm_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_Dp.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_Dp.c  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file contains API to enable firmware control of a Pins component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -51,7 +51,16 @@ void USBFS_Dp_Write(uint8 value)
 *  Change the drive mode on the pins of the port.
 * 
 * Parameters:  
-*  mode:  Change the pins to this drive mode.
+*  mode:  Change the pins to one of the following drive modes.
+*
+*  USBFS_Dp_DM_STRONG     Strong Drive 
+*  USBFS_Dp_DM_OD_HI      Open Drain, Drives High 
+*  USBFS_Dp_DM_OD_LO      Open Drain, Drives Low 
+*  USBFS_Dp_DM_RES_UP     Resistive Pull Up 
+*  USBFS_Dp_DM_RES_DWN    Resistive Pull Down 
+*  USBFS_Dp_DM_RES_UPDWN  Resistive Pull Up/Down 
+*  USBFS_Dp_DM_DIG_HIZ    High Impedance Digital 
+*  USBFS_Dp_DM_ALG_HIZ    High Impedance Analog 
 *
 * Return: 
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_Dp.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_Dp.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /* Check to see if required defines such as CY_PSOC5A are available */
 /* They are defined starting with cy_boot v3.0 */
 #if !defined (CY_PSOC5A)
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later
+    #error Component cy_pins_v2_10 requires cy_boot v3.0 or later
 #endif /* (CY_PSOC5A) */
 
 /* APIs are not generated for P15[7:6] */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_Dp_aliases.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_Dp.h  
-* Version 1.90
+* Version 2.10
 *
 * Description:
 *  This file containts Control Register function prototypes and register defines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -25,7 +25,7 @@
 /***************************************
 *              Constants        
 ***************************************/
-#define USBFS_Dp_0		USBFS_Dp__0__PC
+#define USBFS_Dp_0		(USBFS_Dp__0__PC)
 
 #endif /* End Pins USBFS_Dp_ALIASES_H */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_audio.c

@@ -1,14 +1,15 @@
 /*******************************************************************************
 * File Name: USBFS_audio.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  USB AUDIO Class request handler.
 *
-* Note:
+* Related Document:
+*  Universal Serial Bus Device Class Definition for Audio Devices Release 1.0
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -20,9 +21,9 @@
 
 #include "USBFS_audio.h"
 #include "USBFS_pvt.h"
-#if defined(USBFS_ENABLE_MIDI_STREAMING) 
+#if defined(USBFS_ENABLE_MIDI_STREAMING)
     #include "USBFS_midi.h"
-#endif /* End USBFS_ENABLE_MIDI_STREAMING*/
+#endif /*  USBFS_ENABLE_MIDI_STREAMING*/
 
 
 /***************************************
@@ -52,7 +53,7 @@
                                                                                   USBFS_VOL_MAX_MSB};
     volatile uint8 USBFS_resolutionVolume[USBFS_VOLUME_LEN] = {USBFS_VOL_RES_LSB,
                                                                                      USBFS_VOL_RES_MSB};
-#endif /* End USBFS_ENABLE_AUDIO_STREAMING */
+#endif /*  USBFS_ENABLE_AUDIO_STREAMING */
 
 
 /*******************************************************************************
@@ -93,17 +94,18 @@
 uint8 USBFS_DispatchAUDIOClassRqst(void) 
 {
     uint8 requestHandled = USBFS_FALSE;
+    uint8 bmRequestType  = CY_GET_REG8(USBFS_bmRequestType);
 
     #if defined(USBFS_ENABLE_AUDIO_STREAMING)
         uint8 epNumber;
         epNumber = CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED;
-    #endif /* End USBFS_ENABLE_AUDIO_STREAMING */
+    #endif /*  USBFS_ENABLE_AUDIO_STREAMING */
 
-    if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)
+
+    if ((bmRequestType & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)
     {
         /* Control Read */
-        if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \
-                                                                                    USBFS_RQST_RCPT_EP)
+        if((bmRequestType & USBFS_RQST_RCPT_MASK) == USBFS_RQST_RCPT_EP)
         {
             /* Endpoint */
             switch (CY_GET_REG8(USBFS_bRequest))
@@ -112,12 +114,12 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
                 #if defined(USBFS_ENABLE_AUDIO_STREAMING)
                     if(CY_GET_REG8(USBFS_wValueHi) == USBFS_SAMPLING_FREQ_CONTROL)
                     {
-                         /* Endpoint Control Selector is Sampling Frequency */
+                         /* point Control Selector is Sampling Frequency */
                         USBFS_currentTD.wCount = USBFS_SAMPLE_FREQ_LEN;
                         USBFS_currentTD.pData  = USBFS_currentSampleFrequency[epNumber];
                         requestHandled   = USBFS_InitControlRead();
                     }
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */
+                #endif /*  USBFS_ENABLE_AUDIO_STREAMING */
 
                 /* `#START AUDIO_READ_REQUESTS` Place other request handler here */
 
@@ -127,8 +129,7 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
                     break;
             }
         }
-        else if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \
-                                                                                    USBFS_RQST_RCPT_IFC)
+        else if((bmRequestType & USBFS_RQST_RCPT_MASK) == USBFS_RQST_RCPT_IFC)
         {
             /* Interface or Entity ID */
             switch (CY_GET_REG8(USBFS_bRequest))
@@ -140,7 +141,7 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
                         /* `#START MUTE_CONTROL_GET_REQUEST` Place multi-channel handler here */
 
                         /* `#END` */
-                        
+
                          /* Entity ID Control Selector is MUTE */
                         USBFS_currentTD.wCount = 1u;
                         USBFS_currentTD.pData  = &USBFS_currentMute;
@@ -199,7 +200,7 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
                         USBFS_currentTD.wCount = 0u;
                         requestHandled   = USBFS_InitControlWrite();
 
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */
+                #endif /*  USBFS_ENABLE_AUDIO_STREAMING */
 
                 /* `#START AUDIO_WRITE_REQUESTS` Place other request handler here */
 
@@ -213,27 +214,25 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
         {   /* USBFS_RQST_RCPT_OTHER */
         }
     }
-    else if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == \
-                                                                                    USBFS_RQST_DIR_H2D)
+    else
     {
         /* Control Write */
-        if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \
-                                                                                    USBFS_RQST_RCPT_EP)
+        if((bmRequestType & USBFS_RQST_RCPT_MASK) == USBFS_RQST_RCPT_EP)
         {
-            /* Endpoint */
+            /* point */
             switch (CY_GET_REG8(USBFS_bRequest))
             {
                 case USBFS_SET_CUR:
                 #if defined(USBFS_ENABLE_AUDIO_STREAMING)
                     if(CY_GET_REG8(USBFS_wValueHi) == USBFS_SAMPLING_FREQ_CONTROL)
                     {
-                         /* Endpoint Control Selector is Sampling Frequency */
+                         /* point Control Selector is Sampling Frequency */
                         USBFS_currentTD.wCount = USBFS_SAMPLE_FREQ_LEN;
                         USBFS_currentTD.pData  = USBFS_currentSampleFrequency[epNumber];
                         requestHandled   = USBFS_InitControlWrite();
                         USBFS_frequencyChanged = epNumber;
                     }
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */
+                #endif /*  USBFS_ENABLE_AUDIO_STREAMING */
 
                 /* `#START AUDIO_SAMPLING_FREQ_REQUESTS` Place other request handler here */
 
@@ -243,8 +242,7 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
                     break;
             }
         }
-        else if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \
-                                                                                    USBFS_RQST_RCPT_IFC)
+        else if((bmRequestType & USBFS_RQST_RCPT_MASK) == USBFS_RQST_RCPT_IFC)
         {
             /* Interface or Entity ID */
             switch (CY_GET_REG8(USBFS_bRequest))
@@ -279,7 +277,7 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
 
                         /* `#END` */
                     }
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */
+                #endif /*  USBFS_ENABLE_AUDIO_STREAMING */
 
                 /* `#START AUDIO_CONTROL_SEL_REQUESTS` Place other request handler here */
 
@@ -290,17 +288,14 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
             }
         }
         else
-        {   /* USBFS_RQST_RCPT_OTHER */
+        {
+            /* USBFS_RQST_RCPT_OTHER */
         }
     }
-    else
-    {   /* requestHandled is initialized as FALSE by default */
-    }
 
     return(requestHandled);
 }
 
-
 #endif /* USER_SUPPLIED_AUDIO_HANDLER */
 
 
@@ -312,7 +307,7 @@ uint8 USBFS_DispatchAUDIOClassRqst(void)
 
 /* `#END` */
 
-#endif  /* End USBFS_ENABLE_AUDIO_CLASS*/
+#endif  /*  USBFS_ENABLE_AUDIO_CLASS */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_audio.h

@@ -1,12 +1,15 @@
 /*******************************************************************************
 * File Name: USBFS_audio.h
-* Version 2.60
+* Version 2.80
 *
 * Description:
-*  Header File for the USFS component. Contains prototypes and constant values.
+*  Header File for the USBFS component. Contains prototypes and constant values.
+*
+* Related Document:
+*  Universal Serial Bus Device Class Definition for Audio Devices Release 1.0
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -45,7 +48,7 @@
 #define USBFS_GET_MEM                    (0x85u)
 #define USBFS_GET_STAT                   (0xFFu)
 
-/* Endpoint Control Selectors (AUDIO Table A-19) */
+/* point Control Selectors (AUDIO Table A-19) */
 #define USBFS_EP_CONTROL_UNDEFINED       (0x00u)
 #define USBFS_SAMPLING_FREQ_CONTROL      (0x01u)
 #define USBFS_PITCH_CONTROL              (0x02u)
@@ -89,7 +92,7 @@ extern volatile uint8 USBFS_minimumVolume[USBFS_VOLUME_LEN];
 extern volatile uint8 USBFS_maximumVolume[USBFS_VOLUME_LEN];
 extern volatile uint8 USBFS_resolutionVolume[USBFS_VOLUME_LEN];
 
-#endif /* End CY_USBFS_USBFS_audio_H */
+#endif /*  CY_USBFS_USBFS_audio_H */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_boot.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_boot.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  Boot loader API for USBFS Component.
@@ -8,7 +8,7 @@
 *  Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -20,23 +20,11 @@
                                           (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface))
 
 
-/***************************************
-*    Bootloader defines
-***************************************/
-
-#define USBFS_CyBtLdrStarttimer(X, T)         {USBFS_universalTime = T * 10; X = 0u;}
-#define USBFS_CyBtLdrChecktimer(X)            ((X++ < USBFS_universalTime) ? 1u : 0u)
-
-#define USBFS_BTLDR_OUT_EP      (0x01u)
-#define USBFS_BTLDR_IN_EP       (0x02u)
-
-
 /***************************************
 *    Bootloader Variables
 ***************************************/
 
-static uint16 USBFS_universalTime;
-static uint8 USBFS_started = 0u;
+static uint8  USBFS_started = 0u;
 
 
 /*******************************************************************************
@@ -68,7 +56,6 @@ void USBFS_CyBtldrCommStart(void)
 
     /* USB component started, the correct enumeration will be checked in first Read operation */
     USBFS_started = 1u;
-
 }
 
 
@@ -100,13 +87,13 @@ void USBFS_CyBtldrCommStop(void)
 *  Resets the receive and transmit communication Buffers.
 *
 * Parameters:
-*  None.
+*  None
 *
 * Return:
-*  None.
+*  None
 *
 * Reentrant:
-*  No.
+*  No
 *
 *******************************************************************************/
 void USBFS_CyBtldrCommReset(void) 
@@ -135,39 +122,39 @@ void USBFS_CyBtldrCommReset(void)
 *  Returns the value that best describes the problem.
 *
 * Reentrant:
-*  No.
+*  No
 *
 *******************************************************************************/
-cystatus USBFS_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL
+cystatus USBFS_CyBtldrCommWrite(const uint8 pData[], uint16 size, uint16 *count, uint8 timeOut) CYSMALL
                                                             
 {
-    uint16 time;
-    cystatus status;
+    cystatus retCode;
+    uint16 timeoutMs;
+
+    timeoutMs = ((uint16) 10u * timeOut);  /* Convert from 10mS check to number 1mS checks */
 
     /* Enable IN transfer */
     USBFS_LoadInEP(USBFS_BTLDR_IN_EP, pData, USBFS_BTLDR_SIZEOF_READ_BUFFER);
 
-    /* Start a timer to wait on. */
-    USBFS_CyBtLdrStarttimer(time, timeOut);
-
     /* Wait for the master to read it. */
-    while((USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL) && \
-           USBFS_CyBtLdrChecktimer(time))
+    while ((USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL) &&
+           (0u != timeoutMs))
     {
-        CyDelay(1u); /* 1ms delay */
+        CyDelay(USBFS_BTLDR_WAIT_1_MS);
+        timeoutMs--;
     }
 
     if (USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL)
     {
-        status = CYRET_TIMEOUT;
+        retCode = CYRET_TIMEOUT;
     }
     else
     {
         *count = size;
-        status = CYRET_SUCCESS;
+        retCode = CYRET_SUCCESS;
     }
 
-    return(status);
+    return(retCode);
 }
 
 
@@ -193,70 +180,77 @@ cystatus USBFS_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8
 *  Returns the value that best describes the problem.
 *
 * Reentrant:
-*  No.
+*  No
 *
 *******************************************************************************/
-cystatus USBFS_CyBtldrCommRead(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL
+cystatus USBFS_CyBtldrCommRead(uint8 pData[], uint16 size, uint16 *count, uint8 timeOut) CYSMALL
                                                             
 {
-    cystatus status;
-    uint16 time;
+    cystatus retCode;
+    uint16 timeoutMs;
+
+    timeoutMs = ((uint16) 10u * timeOut);  /* Convert from 10mS check to number 1mS checks */
 
-    if(size > USBFS_BTLDR_SIZEOF_WRITE_BUFFER)
+    if (size > USBFS_BTLDR_SIZEOF_WRITE_BUFFER)
     {
         size = USBFS_BTLDR_SIZEOF_WRITE_BUFFER;
     }
-    /* Start a timer to wait on. */
-    USBFS_CyBtLdrStarttimer(time, timeOut);
 
     /* Wait on enumeration in first time */
-    if(USBFS_started)
+    if (0u != USBFS_started)
     {
         /* Wait for Device to enumerate */
-        while(!USBFS_GetConfiguration() && USBFS_CyBtLdrChecktimer(time))
+        while ((0u ==USBFS_GetConfiguration()) && (0u != timeoutMs))
         {
-            CyDelay(1u); /* 1ms delay */
+            CyDelay(USBFS_BTLDR_WAIT_1_MS);
+            timeoutMs--;
         }
+
         /* Enable first OUT, if enumeration complete */
-        if(USBFS_GetConfiguration())
+        if (0u != USBFS_GetConfiguration())
         {
-            USBFS_IsConfigurationChanged();  /* Clear configuration changes state status */
+            (void) USBFS_IsConfigurationChanged();  /* Clear configuration changes state status */
             USBFS_CyBtldrCommReset();
             USBFS_started = 0u;
         }
     }
     else /* Check for configuration changes, has been done by Host */
     {
-        if(USBFS_IsConfigurationChanged() != 0u) /* Host could send double SET_INTERFACE request or RESET */
+        if (0u != USBFS_IsConfigurationChanged()) /* Host could send double SET_INTERFACE request or RESET */
         {
-            if(USBFS_GetConfiguration() != 0u)   /* Init OUT endpoints when device reconfigured */
+            if (0u != USBFS_GetConfiguration())   /* Init OUT endpoints when device reconfigured */
             {
                 USBFS_CyBtldrCommReset();
             }
         }
     }
+
+    timeoutMs = ((uint16) 10u * timeOut); /* Re-arm timeout */
+
     /* Wait on next packet */
     while((USBFS_GetEPState(USBFS_BTLDR_OUT_EP) != USBFS_OUT_BUFFER_FULL) && \
-           USBFS_CyBtLdrChecktimer(time))
+          (0u != timeoutMs))
     {
-        CyDelay(1u); /* 1ms delay */
+        CyDelay(USBFS_BTLDR_WAIT_1_MS);
+        timeoutMs--;
     }
 
     /* OUT EP has completed */
     if (USBFS_GetEPState(USBFS_BTLDR_OUT_EP) == USBFS_OUT_BUFFER_FULL)
     {
         *count = USBFS_ReadOutEP(USBFS_BTLDR_OUT_EP, pData, size);
-        status = CYRET_SUCCESS;
+        retCode = CYRET_SUCCESS;
     }
     else
     {
         *count = 0u;
-        status = CYRET_TIMEOUT;
+        retCode = CYRET_TIMEOUT;
     }
-    return(status);
+
+    return(retCode);
 }
 
-#endif /* End CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS */
+#endif /*  CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_cdc.c

@@ -1,14 +1,15 @@
 /*******************************************************************************
 * File Name: USBFS_cdc.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
-*  USB HID Class request handler.
+*  USB CDC class request handler.
 *
-* Note:
+* Related Document:
+*  Universal Serial Bus Class Definitions for Communication Devices Version 1.1
 *
 ********************************************************************************
-* Copyright 2012-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2012-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -26,7 +27,13 @@
 *    CDC Variables
 ***************************************/
 
-volatile uint8 USBFS_lineCoding[USBFS_LINE_CODING_SIZE];
+volatile uint8 USBFS_lineCoding[USBFS_LINE_CODING_SIZE] =
+{
+    0x00u, 0xC2u, 0x01u, 0x00u,     /* Data terminal rate 115200 */
+    0x00u,                          /* 1 Stop bit */
+    0x00u,                          /* None parity */
+    0x08u                           /* 8 data bits */
+};
 volatile uint8 USBFS_lineChanged;
 volatile uint16 USBFS_lineControlBitmap;
 volatile uint8 USBFS_cdc_data_in_ep;
@@ -36,7 +43,9 @@ volatile uint8 USBFS_cdc_data_out_ep;
 /***************************************
 *     Static Function Prototypes
 ***************************************/
-static uint16 USBFS_StrLen(const char8 string[]) ;
+#if (USBFS_ENABLE_CDC_CLASS_API != 0u)
+    static uint16 USBFS_StrLen(const char8 string[]) ;
+#endif /* (USBFS_ENABLE_CDC_CLASS_API != 0u) */
 
 
 /***************************************
@@ -138,7 +147,6 @@ uint8 USBFS_DispatchCDCClassRqst(void)
 ***************************************/
 #if (USBFS_ENABLE_CDC_CLASS_API != 0u)
 
-
     /*******************************************************************************
     * Function Name: USBFS_CDC_Init
     ********************************************************************************
@@ -173,14 +181,23 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     ********************************************************************************
     *
     * Summary:
-    *  Sends a specified number of bytes from the location specified by a
-    *  pointer to the PC.
+    *  This function sends a specified number of bytes from the location specified
+    *  by a pointer to the PC. The USBFS_CDCIsReady() function should be
+    *  called before sending new data, to be sure that the previous data has
+    *  finished sending.
+    *  If the last sent packet is less than maximum packet size the USB transfer
+    *  of this short packet will identify the end of the segment. If the last sent
+    *  packet is exactly maximum packet size, it shall be followed by a zero-length
+    *  packet (which is a short packet) to assure the end of segment is properly
+    *  identified. To send zero-length packet, use USBFS_PutData() API
+    *  with length parameter set to zero.
     *
     * Parameters:
     *  pData: pointer to the buffer containing data to be sent.
     *  length: Specifies the number of bytes to send from the pData
     *  buffer. Maximum length will be limited by the maximum packet
-    *  size for the endpoint.
+    *  size for the endpoint. Data will be lost if length is greater than Max
+    *  Packet Size.
     *
     * Return:
     *  None.
@@ -239,10 +256,15 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     ********************************************************************************
     *
     * Summary:
-    *  Sends a null terminated string to the PC.
+    *  This function sends a null terminated string to the PC. This function will
+    *  block if there is not enough memory to place the whole string. It will block
+    *  until the entire string has been written to the transmit buffer.
+    *  The USBUART_CDCIsReady() function should be called before sending data with
+    *  a new call to USBFS_PutString(), to be sure that the previous data
+    *  has finished sending.
     *
     * Parameters:
-    *  string: pointer to the string to be sent to the PC
+    *  string: pointer to the string to be sent to the PC.
     *
     * Return:
     *  None.
@@ -254,41 +276,44 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     * Reentrant:
     *  No.
     *
-    * Theory:
-    *  This function will block if there is not enough memory to place the whole
-    *  string, it will block until the entire string has been written to the
-    *  transmit buffer.
-    *
     *******************************************************************************/
     void USBFS_PutString(const char8 string[]) 
     {
-        uint16 str_length;
-        uint16 send_length;
-        uint16 buf_index = 0u;
+        uint16 strLength;
+        uint16 sendLength;
+        uint16 bufIndex = 0u;
 
         /* Get length of the null terminated string */
-        str_length = USBFS_StrLen(string);
+        strLength = USBFS_StrLen(string);
         do
         {
             /* Limits length to maximum packet size for the EP */
-            send_length = (str_length > USBFS_EP[USBFS_cdc_data_in_ep].bufferSize) ?
-                          USBFS_EP[USBFS_cdc_data_in_ep].bufferSize : str_length;
+            sendLength = (strLength > USBFS_EP[USBFS_cdc_data_in_ep].bufferSize) ?
+                          USBFS_EP[USBFS_cdc_data_in_ep].bufferSize : strLength;
              /* Enable IN transfer */
-            USBFS_LoadInEP(USBFS_cdc_data_in_ep, (const uint8 *)&string[buf_index], send_length);
-            str_length -= send_length;
+            USBFS_LoadInEP(USBFS_cdc_data_in_ep, (const uint8 *)&string[bufIndex], sendLength);
+            strLength -= sendLength;
 
-            /* If more data are present to send */
-            if(str_length > 0u)
+            /* If more data are present to send or full packet was sent */
+            if((strLength > 0u) || (sendLength == USBFS_EP[USBFS_cdc_data_in_ep].bufferSize))
             {
-                buf_index += send_length;
+                bufIndex += sendLength;
                 /* Wait for the Host to read it. */
                 while(USBFS_EP[USBFS_cdc_data_in_ep].apiEpState ==
                                           USBFS_IN_BUFFER_FULL)
                 {
                     ;
                 }
+                /* If the last sent packet is exactly maximum packet size,
+                *  it shall be followed by a zero-length packet to assure the
+                *  end of segment is properly identified by the terminal.
+                */
+                if(strLength == 0u)
+                {
+                    USBFS_LoadInEP(USBFS_cdc_data_in_ep, NULL, 0u);
+                }
             }
-        }while(str_length > 0u);
+        }while(strLength > 0u);
     }
 
 
@@ -357,12 +382,17 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     *
     * Summary:
     *  This function returns the number of bytes that were received from the PC.
+    *  The returned length value should be passed to USBFS_GetData() as
+    *  a parameter to read all received data. If all of the received data is not
+    *  read at one time by the USBFS_GetData() API, the unread data will
+    *  be lost.
     *
     * Parameters:
     *  None.
     *
     * Return:
-    *  Returns the number of received bytes.
+    *  Returns the number of received bytes. The maximum amount of received data at
+    *  a time is limited by the maximum packet size for the endpoint.
     *
     * Global variables:
     *   USBFS_cdc_data_out_ep: CDC OUT endpoint number used.
@@ -370,12 +400,16 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     *******************************************************************************/
     uint16 USBFS_GetCount(void) 
     {
-        uint16 bytesCount = 0u;
+        uint16 bytesCount;
 
         if (USBFS_EP[USBFS_cdc_data_out_ep].apiEpState == USBFS_OUT_BUFFER_FULL)
         {
             bytesCount = USBFS_GetEPCount(USBFS_cdc_data_out_ep);
         }
+        else
+        {
+            bytesCount = 0u;
+        }
 
         return(bytesCount);
     }
@@ -387,9 +421,9 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     *
     * Summary:
     *  Returns a nonzero value if the component received data or received
-    *  zero-length packet. The GetAll() or GetData() API should be called to read
-    *  data from the buffer and re-init OUT endpoint even when zero-length packet
-    *  received.
+    *  zero-length packet. The USBFS_GetAll() or
+    *  USBFS_GetData() API should be called to read data from the buffer
+    *  and re-init OUT endpoint even when zero-length packet received.
     *
     * Parameters:
     *  None.
@@ -413,17 +447,19 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     ********************************************************************************
     *
     * Summary:
-    *  Returns a nonzero value if the component is ready to send more data to the
-    *  PC. Otherwise returns zero. Should be called before sending new data to
-    *  ensure the previous data has finished sending.This function returns the
-    *  number of bytes that were received from the PC.
+    *  This function returns a nonzero value if the component is ready to send more
+    *  data to the PC; otherwise, it returns zero. The function should be called
+    *  before sending new data when using any of the following APIs:
+    *  USBFS_PutData(),USBFS_PutString(),
+    *  USBFS_PutChar or USBFS_PutCRLF(),
+    *  to be sure that the previous data has finished sending.
     *
     * Parameters:
     *  None.
     *
     * Return:
-    *  If the buffer can accept new data then this function returns a nonzero value.
-    *  Otherwise zero is returned.
+    *  If the buffer can accept new data, this function returns a nonzero value.
+    *  Otherwise, it returns zero.
     *
     * Global variables:
     *   USBFS_cdc_data_in_ep: CDC IN endpoint number used.
@@ -440,10 +476,12 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     ********************************************************************************
     *
     * Summary:
-    *  Gets a specified number of bytes from the input buffer and places it in a
-    *  data array specified by the passed pointer.
-    *  USBFS_DataIsReady() API should be called before, to be sure
-    *  that data is received from the Host.
+    *  This function gets a specified number of bytes from the input buffer and
+    *  places them in a data array specified by the passed pointer.
+    *  The USBFS_DataIsReady() API should be called first, to be sure
+    *  that data is received from the host. If all received data will not be read at
+    *  once, the unread data will be lost. The USBFS_GetData() API should
+    *  be called to get the number of bytes that were received.
     *
     * Parameters:
     *  pData: Pointer to the data array where data will be placed.
@@ -502,7 +540,8 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     ********************************************************************************
     *
     * Summary:
-    *  Reads one byte of received data from the buffer.
+    *  This function reads one byte of received data from the buffer. If more than
+    *  one byte has been received from the host, the rest of the data will be lost.
     *
     * Parameters:
     *  None.
@@ -531,17 +570,23 @@ uint8 USBFS_DispatchCDCClassRqst(void)
     ********************************************************************************
     *
     * Summary:
-    *  This function returns clear on read status of the line.
+    *  This function returns clear on read status of the line. It returns not zero
+    *  value when the host sends updated coding or control information to the
+    *  device. The USBFS_GetDTERate(), USBFS_GetCharFormat()
+    *  or USBFS_GetParityType() or USBFS_GetDataBits() API
+    *  should be called to read data coding information.
+    *  The USBFS_GetLineControl() API should be called to read line
+    *  control information.
     *
     * Parameters:
     *  None.
     *
     * Return:
-    *  If SET_LINE_CODING or CDC_SET_CONTROL_LINE_STATE request received then not
-    *  zero value returned. Otherwise zero is returned.
+    *  If SET_LINE_CODING or CDC_SET_CONTROL_LINE_STATE requests are received, it
+    *  returns a nonzero value. Otherwise, it returns zero.
     *
     * Global variables:
-    *  USBFS_transferState - it is checked to be sure then OUT data
+    *  USBFS_transferState: it is checked to be sure then OUT data
     *    phase has been complete, and data written to the lineCoding or Control
     *    Bitmap buffer.
     *  USBFS_lineChanged: used as a flag to be aware that Host has been
@@ -689,7 +734,7 @@ uint8 USBFS_DispatchCDCClassRqst(void)
         return(USBFS_lineControlBitmap);
     }
 
-#endif  /* End USBFS_ENABLE_CDC_CLASS_API*/
+#endif  /*  USBFS_ENABLE_CDC_CLASS_API*/
 
 
 /*******************************************************************************
@@ -700,7 +745,7 @@ uint8 USBFS_DispatchCDCClassRqst(void)
 
 /* `#END` */
 
-#endif  /* End USBFS_ENABLE_CDC_CLASS*/
+#endif  /*  USBFS_ENABLE_CDC_CLASS*/
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_cdc.h

@@ -1,13 +1,16 @@
 /*******************************************************************************
 * File Name: USBFS_cdc.h
-* Version 2.60
+* Version 2.80
 *
 * Description:
-*  Header File for the USFS component.
+*  Header File for the USBFS component.
 *  Contains CDC class prototypes and constant values.
 *
+* Related Document:
+*  Universal Serial Bus Class Definitions for Communication Devices Version 1.1
+*
 ********************************************************************************
-* Copyright 2012-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2012-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -41,7 +44,7 @@
     uint8 USBFS_GetParityType(void) ;
     uint8 USBFS_GetDataBits(void) ;
     uint16 USBFS_GetLineControl(void) ;
-#endif  /* End USBFS_ENABLE_CDC_CLASS_API*/
+#endif  /*  USBFS_ENABLE_CDC_CLASS_API */
 
 
 /***************************************
@@ -86,7 +89,7 @@ extern volatile uint16 USBFS_lineControlBitmap;
 extern volatile uint8 USBFS_cdc_data_in_ep;
 extern volatile uint8 USBFS_cdc_data_out_ep;
 
-#endif /* End CY_USBFS_USBFS_cdc_H */
+#endif /*  CY_USBFS_USBFS_cdc_H */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_cdc.inf

@@ -1,12 +1,12 @@
 ;******************************************************************************
 ; File Name: USBFS_cdc.inf
-; Version 2.60
+; Version 2.80
 ;
 ; Description:
 ;  Windows USB CDC setup file for USBUART Device.
 ;
 ;******************************************************************************
-; Copyright 2007-2013, Cypress Semiconductor Corporation.  All rights reserved.
+; Copyright 2007-2014, Cypress Semiconductor Corporation.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions,
 ; disclaimers, and limitations in the end user license agreement accompanying
 ; the software package with which this file was provided.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_cls.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_cls.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  USB Class request handler.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -57,8 +57,8 @@ uint8 USBFS_DispatchClassRqst(void)
             break;
         case USBFS_RQST_RCPT_EP:         /* Class-specific request directed to the endpoint */
             /* Find related interface to the endpoint, wIndexLo contain EP number */
-            interfaceNumber =
-                USBFS_EP[CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED].interface;
+            interfaceNumber = USBFS_EP[CY_GET_REG8(USBFS_wIndexLo) &
+                              USBFS_DIR_UNUSED].interface;
             break;
         default:    /* RequestHandled is initialized as FALSE by default */
             break;
@@ -74,7 +74,7 @@ uint8 USBFS_DispatchClassRqst(void)
         case USBFS_CLASS_AUDIO:
             #if defined(USBFS_ENABLE_AUDIO_CLASS)
                 requestHandled = USBFS_DispatchAUDIOClassRqst();
-            #endif /* USBFS_ENABLE_HID_CLASS */
+            #endif /* USBFS_CLASS_AUDIO */
             break;
         case USBFS_CLASS_CDC:
             #if defined(USBFS_ENABLE_CDC_CLASS)

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_descr.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_descr.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  USB descriptors and storage.
@@ -8,7 +8,7 @@
 *  Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -20,8 +20,7 @@
 
 /*****************************************************************************
 *  User supplied descriptors.  If you want to specify your own descriptors,
-*  remove the comments around the define USER_SUPPLIED_DESCRIPTORS below and
-*  add your descriptors.
+*  define USER_SUPPLIED_DESCRIPTORS below and add your descriptors.
 *****************************************************************************/
 /* `#START USER_DESCRIPTORS_DECLARATIONS` Place your declaration here */
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_drv.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_drv.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  Endpoint 0 Driver for the USBFS Component.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_episr.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_episr.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  Data endpoint Interrupt Service Routines
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -16,9 +16,13 @@
 
 #include "USBFS.h"
 #include "USBFS_pvt.h"
-#if defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u)
+#if (defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u))
     #include "USBFS_midi.h"
-#endif /* End USBFS_ENABLE_MIDI_STREAMING*/
+#endif /* (defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u)) */
+#if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+    #include "USBFS_EP8_DMA_Done_SR.h"
+    #include "USBFS_EP17_DMA_Done_SR.h"
+#endif /* (USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u) */
 
 
 /***************************************
@@ -48,7 +52,8 @@
     ******************************************************************************/
     CY_ISR(USBFS_EP_1_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT)  && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */
 
@@ -56,7 +61,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */
@@ -72,23 +78,25 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR) &
                                                                     (uint8)~USBFS_SIE_EP_INT_EP1_MASK);
 
-        #if( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT )
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP1)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT */
 
         /* `#START EP1_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 )
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */
     }
 
-#endif   /* End USBFS_EP1_ISR_REMOVE */
+#endif   /*  USBFS_EP1_ISR_REMOVE */
 
 
 #if(USBFS_EP2_ISR_REMOVE == 0u)
@@ -109,7 +117,8 @@
     *******************************************************************************/
     CY_ISR(USBFS_EP_2_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */
 
@@ -117,7 +126,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 )
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */
@@ -133,23 +143,25 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)
                                                                         & (uint8)~USBFS_SIE_EP_INT_EP2_MASK);
 
-        #if( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT )
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP2)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT */
 
         /* `#START EP2_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */
     }
 
-#endif   /* End USBFS_EP2_ISR_REMOVE */
+#endif   /*  USBFS_EP2_ISR_REMOVE */
 
 
 #if(USBFS_EP3_ISR_REMOVE == 0u)
@@ -170,7 +182,8 @@
     *******************************************************************************/
     CY_ISR(USBFS_EP_3_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */
 
@@ -178,7 +191,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
@@ -194,23 +208,25 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)
                                                                         & (uint8)~USBFS_SIE_EP_INT_EP3_MASK);
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP3)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT */
 
         /* `#START EP3_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
     }
 
-#endif   /* End USBFS_EP3_ISR_REMOVE */
+#endif   /*  USBFS_EP3_ISR_REMOVE */
 
 
 #if(USBFS_EP4_ISR_REMOVE == 0u)
@@ -231,7 +247,8 @@
     *******************************************************************************/
     CY_ISR(USBFS_EP_4_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
 
@@ -239,7 +256,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
@@ -255,23 +273,25 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)
                                                                         & (uint8)~USBFS_SIE_EP_INT_EP4_MASK);
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP4)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT */
 
         /* `#START EP4_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
     }
 
-#endif   /* End USBFS_EP4_ISR_REMOVE */
+#endif   /*  USBFS_EP4_ISR_REMOVE */
 
 
 #if(USBFS_EP5_ISR_REMOVE == 0u)
@@ -292,7 +312,8 @@
     *******************************************************************************/
     CY_ISR(USBFS_EP_5_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
 
@@ -300,7 +321,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
@@ -316,22 +338,24 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)
                                                                         & (uint8)~USBFS_SIE_EP_INT_EP5_MASK);
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP5)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT */
 
         /* `#START EP5_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
     }
-#endif   /* End USBFS_EP5_ISR_REMOVE */
+#endif   /*  USBFS_EP5_ISR_REMOVE */
 
 
 #if(USBFS_EP6_ISR_REMOVE == 0u)
@@ -352,7 +376,8 @@
     *******************************************************************************/
     CY_ISR(USBFS_EP_6_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
 
@@ -360,7 +385,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
@@ -376,23 +402,25 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)
                                                                         & (uint8)~USBFS_SIE_EP_INT_EP6_MASK);
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP6)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT  */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT  */
 
         /* `#START EP6_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
     }
 
-#endif   /* End USBFS_EP6_ISR_REMOVE */
+#endif   /*  USBFS_EP6_ISR_REMOVE */
 
 
 #if(USBFS_EP7_ISR_REMOVE == 0u)
@@ -413,7 +441,8 @@
     *******************************************************************************/
     CY_ISR(USBFS_EP_7_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
 
@@ -421,7 +450,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
@@ -437,23 +467,25 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)
                                                                         & (uint8)~USBFS_SIE_EP_INT_EP7_MASK);
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP7)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT  */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT  */
 
         /* `#START EP7_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
     }
 
-#endif   /* End USBFS_EP7_ISR_REMOVE */
+#endif   /*  USBFS_EP7_ISR_REMOVE */
 
 
 #if(USBFS_EP8_ISR_REMOVE == 0u)
@@ -474,7 +506,8 @@
     *******************************************************************************/
     CY_ISR(USBFS_EP_8_ISR)
     {
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             uint8 int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
 
@@ -482,7 +515,8 @@
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             int_en = EA;
             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
@@ -498,23 +532,25 @@
         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)
                                                                         & (uint8)~USBFS_SIE_EP_INT_EP8_MASK);
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT)
             if(USBFS_midi_out_ep == USBFS_EP8)
             {
                 USBFS_MIDI_OUT_EP_Service();
             }
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */
+        #endif /*  USBFS_ISR_SERVICE_MIDI_OUT */
 
         /* `#START EP8_END_USER_CODE` Place your code here */
 
         /* `#END` */
 
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
+        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && !defined(USBFS_MAIN_SERVICE_MIDI_OUT) && \
+                     USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)
             EA = int_en;
         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */
     }
 
-#endif   /* End USBFS_EP8_ISR_REMOVE */
+#endif   /*  USBFS_EP8_ISR_REMOVE */
 
 
 /*******************************************************************************
@@ -611,6 +647,17 @@ CY_ISR(USBFS_BUS_RESET_ISR)
                         /* Clear Data ready status */
                         *(reg8 *)(USBFS_ARB_EP1_CFG_IND + ptr) &=
                                                                     (uint8)~USBFS_ARB_EPX_CFG_IN_DATA_RDY;
+                        #if((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+                            /* Setup common area DMA with rest of the data */
+                            if(USBFS_inLength[ep] > USBFS_DMA_BYTES_PER_BURST)
+                            {
+                                USBFS_LoadNextInEP(ep, 0u);
+                            }
+                            else
+                            {
+                                USBFS_inBufFull[ep] = 1u;
+                            }
+                        #endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
                         /* Write the Mode register */
                         CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ptr), USBFS_EP[ep].epMode);
                         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_IN)
@@ -618,7 +665,7 @@ CY_ISR(USBFS_BUS_RESET_ISR)
                             {   /* Clear MIDI input pointer */
                                 USBFS_midiInPointer = 0u;
                             }
-                        #endif /* End USBFS_ENABLE_MIDI_STREAMING*/
+                        #endif /*  USBFS_ENABLE_MIDI_STREAMING*/
                     }
                 }
                 /* (re)arm Out EP only for mode2 */
@@ -634,7 +681,7 @@ CY_ISR(USBFS_BUS_RESET_ISR)
                                                                                     USBFS_EP[ep].epMode);
                         }
                     }
-                #endif /* End USBFS_EP_MM */
+                #endif /*  USBFS_EP_MM */
 
                 /* `#START ARB_USER_CODE` Place your code here for handle Buffer Underflow/Overflow */
 
@@ -652,7 +699,82 @@ CY_ISR(USBFS_BUS_RESET_ISR)
         /* `#END` */
     }
 
-#endif /* End USBFS_EP_MM */
+#endif /*  USBFS_EP_MM */
+
+#if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+    /******************************************************************************
+    * Function Name: USBFS_EP_DMA_DONE_ISR
+    *******************************************************************************
+    *
+    * Summary:
+    *  Endpoint 1 DMA Done Interrupt Service Routine
+    *
+    * Parameters:
+    *  None.
+    *
+    * Return:
+    *  None.
+    *
+    ******************************************************************************/
+    CY_ISR(USBFS_EP_DMA_DONE_ISR)
+    {
+        uint8 int8Status;
+        uint8 int17Status;
+        uint8 ep_status;
+        uint8 ep = USBFS_EP1;
+        uint8 ptr = 0u;
+
+        /* `#START EP_DMA_DONE_BEGIN_USER_CODE` Place your code here */
+
+        /* `#END` */
+
+        /* Read clear on read status register with the EP source of interrupt */
+        int17Status = USBFS_EP17_DMA_Done_SR_Read() & USBFS_EP17_SR_MASK;
+        int8Status = USBFS_EP8_DMA_Done_SR_Read() & USBFS_EP8_SR_MASK;
+
+        while(int8Status != 0u)
+        {
+            while(int17Status != 0u)
+            {
+                if((int17Status & 1u) != 0u)  /* If EpX interrupt present */
+                {
+                    /* Read Endpoint Status Register */
+                    ep_status = CY_GET_REG8((reg8 *)(USBFS_ARB_EP1_SR_IND + ptr));
+                    if( ((ep_status & USBFS_ARB_EPX_SR_IN_BUF_FULL) == 0u) &&
+                        (USBFS_inBufFull[ep] == 0u))
+                    {
+                        /* `#START EP_DMA_DONE_USER_CODE` Place your code here */
+
+                        /* `#END` */
+
+                        CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + ptr), 0x00u);
+                        /* repeat 2 last bytes to prefetch endpoint area */
+                        CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + ptr),
+                                    USBFS_DMA_BYTES_PER_BURST * ep - USBFS_DMA_BYTES_REPEAT);
+                        USBFS_LoadNextInEP(ep, 1);
+                        /* Set Data ready status, This will generate DMA request */
+                        * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ptr) |= USBFS_ARB_EPX_CFG_IN_DATA_RDY;
+                    }
+                }
+                ptr += USBFS_EPX_CNTX_ADDR_OFFSET;               /* prepare pointer for next EP */
+                ep++;
+                int17Status >>= 1u;
+            }
+            int8Status >>= 1u;
+            if(int8Status != 0u)
+            {
+                /* Prepare pointer for EP8 */
+                ptr = ((USBFS_EP8 - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);
+                ep = USBFS_EP8;
+                int17Status = int8Status & 0x01u;
+            }
+        }
+
+        /* `#START EP_DMA_DONE_END_USER_CODE` Place your code here */
+
+        /* `#END` */
+    }
+#endif /* ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_hid.c

@@ -1,14 +1,17 @@
 /*******************************************************************************
 * File Name: USBFS_hid.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  USB HID Class request handler.
 *
+* Related Document:
+*  Device Class Definition for Human Interface Devices (HID) Version 1.11
+*
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -416,7 +419,7 @@ void USBFS_FindReport(void)
 
 /* `#END` */
 
-#endif  /* End USBFS_ENABLE_HID_CLASS */
+#endif  /*  USBFS_ENABLE_HID_CLASS */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_hid.h

@@ -1,12 +1,15 @@
 /*******************************************************************************
 * File Name: USBFS_hid.h
-* Version 2.60
+* Version 2.80
 *
 * Description:
-*  Header File for the USFS component. Contains prototypes and constant values.
+*  Header File for the USBFS component. Contains prototypes and constant values.
+*
+* Related Document:
+*  Device Class Definition for Human Interface Devices (HID) Version 1.11
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -58,7 +61,7 @@ uint8 USBFS_GetProtocol(uint8 interface) ;
 #define USBFS_HID_GET_REPORT_OUTPUT      (0x02u)
 #define USBFS_HID_GET_REPORT_FEATURE     (0x03u)
 
-#endif /* End CY_USBFS_USBFS_hid_H */
+#endif /*  CY_USBFS_USBFS_hid_H */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_midi.c

@@ -1,14 +1,18 @@
 /*******************************************************************************
 * File Name: USBFS_midi.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  MIDI Streaming request handler.
 *  This file contains routines for sending and receiving MIDI
 *  messages, and handles running status in both directions.
 *
+* Related Document:
+*  Universal Serial Bus Device Class Definition for MIDI Devices Release 1.0
+*  MIDI 1.0 Detailed Specification Document Version 4.2
+*
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -60,15 +64,15 @@
         volatile uint16 USBFS_midiInPointer;                            /* Input endpoint buffer pointer */
     #else
         volatile uint8 USBFS_midiInPointer;                             /* Input endpoint buffer pointer */
-    #endif /* End USBFS_MIDI_IN_BUFF_SIZE >=256 */
+    #endif /* (USBFS_MIDI_IN_BUFF_SIZE >= 256) */
     volatile uint8 USBFS_midi_in_ep;                                    /* Input endpoint number */
     uint8 USBFS_midiInBuffer[USBFS_MIDI_IN_BUFF_SIZE];       /* Input endpoint buffer */
-#endif /* USBFS_MIDI_IN_BUFF_SIZE > 0 */
+#endif /* (USBFS_MIDI_IN_BUFF_SIZE > 0) */
 
 #if (USBFS_MIDI_OUT_BUFF_SIZE > 0)
     volatile uint8 USBFS_midi_out_ep;                                   /* Output endpoint number */
     uint8 USBFS_midiOutBuffer[USBFS_MIDI_OUT_BUFF_SIZE];     /* Output endpoint buffer */
-#endif /* USBFS_MIDI_OUT_BUFF_SIZE > 0 */
+#endif /* (USBFS_MIDI_OUT_BUFF_SIZE > 0) */
 
 #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)
     static USBFS_MIDI_RX_STATUS USBFS_MIDI1_Event;            /* MIDI RX status structure */
@@ -79,8 +83,8 @@
         static USBFS_MIDI_RX_STATUS USBFS_MIDI2_Event;        /* MIDI RX status structure */
         static volatile uint8 USBFS_MIDI2_TxRunStat;                     /* MIDI Output running status */
         volatile uint8 USBFS_MIDI2_InqFlags;                             /* Device inquiry flag */
-    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+    #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF) */
+#endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */
 
 
 /***************************************
@@ -134,30 +138,30 @@ void USBFS_MIDI_EP_Init(void)
 {
     #if (USBFS_MIDI_IN_BUFF_SIZE > 0)
        USBFS_midiInPointer = 0u;
-    #endif  /* USBFS_MIDI_IN_BUFF_SIZE > 0 */
+    #endif /* (USBFS_MIDI_IN_BUFF_SIZE > 0) */
 
     #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
         #if (USBFS_MIDI_IN_BUFF_SIZE > 0)
             /* Init DMA configurations for IN EP*/
             USBFS_LoadInEP(USBFS_midi_in_ep, USBFS_midiInBuffer,
                                                                                 USBFS_MIDI_IN_BUFF_SIZE);
-                                                                                
-        #endif  /* USBFS_MIDI_IN_BUFF_SIZE > 0 */
+
+        #endif  /* (USBFS_MIDI_IN_BUFF_SIZE > 0) */
         #if (USBFS_MIDI_OUT_BUFF_SIZE > 0)
             /* Init DMA configurations for OUT EP*/
             (void)USBFS_ReadOutEP(USBFS_midi_out_ep, USBFS_midiOutBuffer,
                                                                                 USBFS_MIDI_OUT_BUFF_SIZE);
-        #endif /*USBFS_MIDI_OUT_BUFF_SIZE > 0 */
-    #endif  /* End USBFS__EP_DMAAUTO */
+        #endif /* (USBFS_MIDI_OUT_BUFF_SIZE > 0) */
+    #endif /* (USBFS_EP_MM == USBFS__EP_DMAAUTO) */
 
     #if (USBFS_MIDI_OUT_BUFF_SIZE > 0)
         USBFS_EnableOutEP(USBFS_midi_out_ep);
-    #endif /* USBFS_MIDI_OUT_BUFF_SIZE > 0 */
+    #endif /* (USBFS_MIDI_OUT_BUFF_SIZE > 0) */
 
     /* Initialize the MIDI port(s) */
     #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)
         USBFS_MIDI_Init();
-    #endif /* USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+    #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */
 }
 
 #if (USBFS_MIDI_OUT_BUFF_SIZE > 0)
@@ -199,37 +203,43 @@ void USBFS_MIDI_EP_Init(void)
         #else
             uint8 outLength;
             uint8 outPointer;
-        #endif /* End USBFS_MIDI_OUT_BUFF_SIZE >=256 */
+        #endif /*  USBFS_MIDI_OUT_BUFF_SIZE >=256 */
 
         uint8 dmaState = 0u;
 
         /* Service the USB MIDI output endpoint */
         if (USBFS_GetEPState(USBFS_midi_out_ep) == USBFS_OUT_BUFFER_FULL)
         {
-            #if USBFS_MIDI_OUT_BUFF_SIZE >= 256
+            #if(USBFS_MIDI_OUT_BUFF_SIZE >= 256)
                 outLength = USBFS_GetEPCount(USBFS_midi_out_ep);
             #else
                 outLength = (uint8)USBFS_GetEPCount(USBFS_midi_out_ep);
-            #endif /* End USBFS_MIDI_OUT_BUFF_SIZE >= 256 */
+            #endif /* (USBFS_MIDI_OUT_BUFF_SIZE >= 256) */
+
             #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)
-                #if USBFS_MIDI_OUT_BUFF_SIZE >= 256
+                #if (USBFS_MIDI_OUT_BUFF_SIZE >= 256)
                     outLength = USBFS_ReadOutEP(USBFS_midi_out_ep,
                                                                     USBFS_midiOutBuffer, outLength);
                 #else
                     outLength = (uint8)USBFS_ReadOutEP(USBFS_midi_out_ep,
                                                                     USBFS_midiOutBuffer, (uint16)outLength);
-                #endif /* End USBFS_MIDI_OUT_BUFF_SIZE >= 256 */
+                #endif /* (USBFS_MIDI_OUT_BUFF_SIZE >= 256) */
+
                 #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)
                     do  /* wait for DMA transfer complete */
                     {
-                        (void)CyDmaChStatus(USBFS_DmaChan[USBFS_midi_out_ep], NULL, &dmaState);
-                    }while((dmaState & (STATUS_TD_ACTIVE | STATUS_CHAIN_ACTIVE)) != 0u);
-                #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */
-            #endif  /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */
+                        (void) CyDmaChStatus(USBFS_DmaChan[USBFS_midi_out_ep], NULL, &dmaState);
+                    }
+                    while((dmaState & (STATUS_TD_ACTIVE | STATUS_CHAIN_ACTIVE)) != 0u);
+                #endif /* (USBFS_EP_MM == USBFS__EP_DMAMANUAL) */
+
+            #endif /* (USBFS_EP_MM != USBFS__EP_DMAAUTO) */
+
             if(dmaState != 0u)
             {
                 /* Suppress compiler warning */
             }
+
             if (outLength >= USBFS_EVENT_LENGTH)
             {
                 outPointer = 0u;
@@ -252,7 +262,7 @@ void USBFS_MIDI_EP_Init(void)
                         {
                             #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)
                                 USBFS_MIDI2_ProcessUsbOut(&USBFS_midiOutBuffer[outPointer]);
-                            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
+                            #endif /*  USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
                         }
                         else
                         {
@@ -260,7 +270,7 @@ void USBFS_MIDI_EP_Init(void)
 
                             /* `#END` */
                         }
-                    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+                    #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */
 
                     /* Process any local MIDI output functions */
                     USBFS_callbackLocalMidiEvent(
@@ -272,7 +282,7 @@ void USBFS_MIDI_EP_Init(void)
             #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
                 /* Enable Out EP*/
                 USBFS_EnableOutEP(USBFS_midi_out_ep);
-            #endif  /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+            #endif  /* (USBFS_EP_MM == USBFS__EP_DMAAUTO) */
         }
     }
 
@@ -322,12 +332,12 @@ void USBFS_MIDI_EP_Init(void)
             #else /* USBFS_EP_MM != USBFS__EP_DMAAUTO */
                 /* rearm IN EP */
                 USBFS_LoadInEP(USBFS_midi_in_ep, NULL, (uint16)USBFS_midiInPointer);
-            #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO*/
+            #endif /* (USBFS_EP_MM != USBFS__EP_DMAAUTO) */
 
             /* Clear the midiInPointer. For DMA mode, clear this pointer in the ARB ISR when data are moved by DMA */
             #if(USBFS_EP_MM == USBFS__EP_MANUAL)
                 USBFS_midiInPointer = 0u;
-            #endif /* USBFS_EP_MM == USBFS__EP_MANUAL */
+            #endif /* (USBFS_EP_MM == USBFS__EP_MANUAL) */
             }
         }
     }
@@ -370,7 +380,8 @@ void USBFS_MIDI_EP_Init(void)
             uint8 m2 = 0u;
             do
             {
-                if (USBFS_midiInPointer <= (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))
+                if (USBFS_midiInPointer <=
+                    (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))
                 {
                     /* Check MIDI1 input port for a complete event */
                     m1 = USBFS_MIDI1_GetEvent();
@@ -382,7 +393,8 @@ void USBFS_MIDI_EP_Init(void)
                 }
 
             #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)
-                if (USBFS_midiInPointer <= (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))
+                if (USBFS_midiInPointer <=
+                    (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))
                 {
                     /* Check MIDI2 input port for a complete event */
                     m2 = USBFS_MIDI2_GetEvent();
@@ -392,11 +404,12 @@ void USBFS_MIDI_EP_Init(void)
                                                     USBFS_MIDI2_Event.size, USBFS_MIDI_CABLE_01);
                     }
                 }
-            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
+            #endif /*  USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
 
-            }while( (USBFS_midiInPointer <= (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))
-                   && ((m1 != 0u) || (m2 != 0u)) );
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+            }while( (USBFS_midiInPointer <=
+                    (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH)) &&
+                    ((m1 != 0u) || (m2 != 0u)) );
+        #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */
 
         /* Service the USB MIDI input endpoint */
         USBFS_MIDI_IN_EP_Service();
@@ -453,8 +466,8 @@ void USBFS_MIDI_EP_Init(void)
             MIDI1_UART_DisableRxInt();
             #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)
                 MIDI2_UART_DisableRxInt();
-            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+            #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF) */
+        #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */
 
         if (USBFS_midiInPointer >
                     (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))
@@ -481,15 +494,16 @@ void USBFS_MIDI_EP_Init(void)
                         (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))
                     {
                         USBFS_MIDI_IN_EP_Service();
-                        if (USBFS_midiInPointer >
-                            (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))
+                        if(USBFS_midiInPointer >
+                          (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))
                         {
                             /* Error condition. HOST is not ready to receive this packet. */
                             retError = USBFS_TRUE;
                             break;
                         }
                     }
-                }while(ic > USBFS_EVENT_BYTE3);
+                }
+                while(ic > USBFS_EVENT_BYTE3);
 
                 if(retError == USBFS_FALSE)
                 {
@@ -507,8 +521,8 @@ void USBFS_MIDI_EP_Init(void)
             MIDI1_UART_EnableRxInt();
             #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)
                 MIDI2_UART_EnableRxInt();
-            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+            #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF) */
+        #endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */
 
         return (retError);
     }
@@ -712,7 +726,7 @@ void USBFS_MIDI_EP_Init(void)
             /* Change the priority of the UART TX interrupt */
             CyIntSetPriority(MIDI2_UART_TX_VECT_NUM, USBFS_CUSTOM_UART_TX_PRIOR_NUM);
             CyIntSetPriority(MIDI2_UART_RX_VECT_NUM, USBFS_CUSTOM_UART_RX_PRIOR_NUM);
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF*/
+        #endif /*  USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF*/
 
         /* `#START MIDI_INIT_CUSTOM` Init other extended UARTs here */
 
@@ -915,12 +929,13 @@ void USBFS_MIDI_EP_Init(void)
         uint8 rxData;
         #if (MIDI1_UART_RXBUFFERSIZE >= 256u)
             uint16 rxBufferRead;
-            #if CY_PSOC3 /* This local variable is required only for PSOC3 and large buffer */
+            #if (CY_PSOC3) /* This local variable is required only for PSOC3 and large buffer */
                 uint16 rxBufferWrite;
-            #endif /* end CY_PSOC3 */
+            #endif /* (CY_PSOC3) */
         #else
             uint8 rxBufferRead;
-        #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */
+        #endif /* (MIDI1_UART_RXBUFFERSIZE >= 256u) */
+
         uint8 rxBufferLoopDetect;
         /* Read buffer loop condition to the local variable */
         rxBufferLoopDetect = MIDI1_UART_rxBufferLoopDetect;
@@ -930,12 +945,12 @@ void USBFS_MIDI_EP_Init(void)
             /* Protect variables that could change on interrupt by disabling Rx interrupt.*/
             #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 CyIntDisable(MIDI1_UART_RX_VECT_NUM);
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
             rxBufferRead = MIDI1_UART_rxBufferRead;
             #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 rxBufferWrite = MIDI1_UART_rxBufferWrite;
                 CyIntEnable(MIDI1_UART_RX_VECT_NUM);
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
 
             /* Stay here until either the buffer is empty or we have a complete message
             *  in the message buffer. Note that we must use a temporary buffer pointer
@@ -948,7 +963,7 @@ void USBFS_MIDI_EP_Init(void)
                 while ( ((rxBufferRead != rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )
             #else
                 while ( ((rxBufferRead != MIDI1_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 && CY_PSOC3 */
+            #endif /*  ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
                 {
                     rxData = MIDI1_UART_rxBuffer[rxBufferRead];
                     /* Increment pointer with a wrap */
@@ -965,11 +980,11 @@ void USBFS_MIDI_EP_Init(void)
                         MIDI1_UART_rxBufferLoopDetect = 0u;
                         #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                             CyIntDisable(MIDI1_UART_RX_VECT_NUM);
-                        #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */
+                        #endif /*  MIDI1_UART_RXBUFFERSIZE >= 256 */
                         MIDI1_UART_rxBufferRead = rxBufferRead;
                         #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                             CyIntEnable(MIDI1_UART_RX_VECT_NUM);
-                        #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */
+                        #endif /*  MIDI1_UART_RXBUFFERSIZE >= 256 */
                     }
 
                     msgRtn = USBFS_ProcessMidiIn(rxData,
@@ -984,11 +999,11 @@ void USBFS_MIDI_EP_Init(void)
             */
             #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 CyIntDisable(MIDI1_UART_RX_VECT_NUM);
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
             MIDI1_UART_rxBufferRead = rxBufferRead;
             #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 CyIntEnable(MIDI1_UART_RX_VECT_NUM);
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
         }
 
         return (msgRtn);
@@ -1105,6 +1120,7 @@ void USBFS_MIDI_EP_Init(void)
         /* `#END` */
     }
 
+
 #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)
 
 
@@ -1137,12 +1153,13 @@ void USBFS_MIDI_EP_Init(void)
         uint8 rxData;
         #if (MIDI2_UART_RXBUFFERSIZE >= 256u)
             uint16 rxBufferRead;
-            #if CY_PSOC3 /* This local variable required only for PSOC3 and large buffer */
+            #if (CY_PSOC3) /* This local variable required only for PSOC3 and large buffer */
                 uint16 rxBufferWrite;
-            #endif /* end CY_PSOC3 */
+            #endif /* (CY_PSOC3) */
         #else
             uint8 rxBufferRead;
-        #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */
+        #endif /* (MIDI2_UART_RXBUFFERSIZE >= 256) */
+
         uint8 rxBufferLoopDetect;
         /* Read buffer loop condition to the local variable */
         rxBufferLoopDetect = MIDI2_UART_rxBufferLoopDetect;
@@ -1152,12 +1169,12 @@ void USBFS_MIDI_EP_Init(void)
             /* Protect variables that could change on interrupt by disabling Rx interrupt.*/
             #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 CyIntDisable(MIDI2_UART_RX_VECT_NUM);
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
             rxBufferRead = MIDI2_UART_rxBufferRead;
             #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 rxBufferWrite = MIDI2_UART_rxBufferWrite;
                 CyIntEnable(MIDI2_UART_RX_VECT_NUM);
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
 
             /* Stay here until either the buffer is empty or we have a complete message
             *  in the message buffer. Note that we must use a temporary output pointer to
@@ -1170,7 +1187,7 @@ void USBFS_MIDI_EP_Init(void)
                 while ( ((rxBufferRead != rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )
             #else
                 while ( ((rxBufferRead != MIDI2_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 && CY_PSOC3 */
+            #endif /* ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
                 {
                     rxData = MIDI2_UART_rxBuffer[rxBufferRead];
                     rxBufferRead++;
@@ -1186,11 +1203,11 @@ void USBFS_MIDI_EP_Init(void)
                         MIDI2_UART_rxBufferLoopDetect = 0u;
                         #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                             CyIntDisable(MIDI2_UART_RX_VECT_NUM);
-                        #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */
+                        #endif /* ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
                         MIDI2_UART_rxBufferRead = rxBufferRead;
                         #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                             CyIntEnable(MIDI2_UART_RX_VECT_NUM);
-                        #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */
+                        #endif /* ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
                     }
 
                     msgRtn = USBFS_ProcessMidiIn(rxData,
@@ -1205,11 +1222,11 @@ void USBFS_MIDI_EP_Init(void)
             */
             #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 CyIntDisable(MIDI2_UART_RX_VECT_NUM);
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
             MIDI2_UART_rxBufferRead = rxBufferRead;
             #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))
                 CyIntEnable(MIDI2_UART_RX_VECT_NUM);
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */
+            #endif /* ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3)) */
         }
 
         return (msgRtn);
@@ -1325,17 +1342,17 @@ void USBFS_MIDI_EP_Init(void)
 
         /* `#END` */
     }
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+#endif /* (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF) */
+#endif /* (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF) */
 
-#endif  /* End (USBFS_ENABLE_MIDI_API != 0u) */
+#endif  /*  (USBFS_ENABLE_MIDI_API != 0u) */
 
 
 /* `#START MIDI_FUNCTIONS` Place any additional functions here */
 
 /* `#END` */
 
-#endif  /* End defined(USBFS_ENABLE_MIDI_STREAMING) */
+#endif  /*  defined(USBFS_ENABLE_MIDI_STREAMING) */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_midi.h

@@ -1,13 +1,17 @@
 /*******************************************************************************
 * File Name: USBFS_midi.h
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  Header File for the USBFS MIDI module.
 *  Contains prototypes and constant values.
 *
+* Related Document:
+*  Universal Serial Bus Device Class Definition for MIDI Devices Release 1.0
+*  MIDI 1.0 Detailed Specification Document Version 4.2
+*
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -21,7 +25,7 @@
 
 
 /***************************************
-*    Data Struct Definition
+*    Data Structure Definition
 ***************************************/
 
 /* The following structure is used to hold status information for
@@ -112,12 +116,13 @@ typedef struct
 #define USBFS_CUSTOM_UART_TX_PRIOR_NUM   (0x04u)
 #define USBFS_CUSTOM_UART_RX_PRIOR_NUM   (0x02u)
 
-#define USBFS_ISR_SERVICE_MIDI_OUT     \
+#define USBFS_ISR_SERVICE_MIDI_OUT         \
         ( (USBFS_ENABLE_MIDI_API != 0u) && \
-          (USBFS_MIDI_OUT_BUFF_SIZE > 0) && (USBFS_EP_MM == USBFS__EP_DMAAUTO) )
+          (USBFS_MIDI_OUT_BUFF_SIZE > 0) && (USBFS_EP_MM == USBFS__EP_DMAAUTO))
 #define USBFS_ISR_SERVICE_MIDI_IN     \
         ( (USBFS_ENABLE_MIDI_API != 0u) && (USBFS_MIDI_IN_BUFF_SIZE > 0) )
 
+
 /***************************************
 * External function references
 ***************************************/
@@ -132,13 +137,13 @@ void USBFS_callbackLocalMidiEvent(uint8 cable, uint8 *midiMsg)
 
 #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)
     #include "MIDI1_UART.h"
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+#endif /*  USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
 #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)
     #include "MIDI2_UART.h"
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
+#endif /*  USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
 #if(USBFS_EP_MM != USBFS__EP_MANUAL)
     #include <CyDmac.h>
-#endif /* End USBFS_EP_MM */
+#endif /*  USBFS_EP_MM */
 
 
 /***************************************
@@ -159,8 +164,8 @@ void USBFS_PrepareInBuffer(uint8 ic, const uint8 srcBuff[], uint8 eventLen, uint
         uint8 USBFS_MIDI2_GetEvent(void) ;
         void USBFS_MIDI2_ProcessUsbOut(const uint8 epBuf[])
                                                     ;
-    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+    #endif /*  USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
+#endif /*  USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
 
 
 /***************************************
@@ -174,7 +179,7 @@ void USBFS_PrepareInBuffer(uint8 ic, const uint8 srcBuff[], uint8 eventLen, uint
         extern volatile uint16 USBFS_midiInPointer;                       /* Input endpoint buffer pointer */
     #else
         extern volatile uint8 USBFS_midiInPointer;                        /* Input endpoint buffer pointer */
-    #endif /* End USBFS_MIDI_IN_BUFF_SIZE >=256 */
+    #endif /*  USBFS_MIDI_IN_BUFF_SIZE >=256 */
     extern volatile uint8 USBFS_midi_in_ep;                               /* Input endpoint number */
     extern uint8 USBFS_midiInBuffer[USBFS_MIDI_IN_BUFF_SIZE];  /* Input endpoint buffer */
 #endif /* USBFS_MIDI_IN_BUFF_SIZE > 0 */
@@ -188,13 +193,13 @@ void USBFS_PrepareInBuffer(uint8 ic, const uint8 srcBuff[], uint8 eventLen, uint
     extern volatile uint8 USBFS_MIDI1_InqFlags;                              /* Device inquiry flag */
     #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)
         extern volatile uint8 USBFS_MIDI2_InqFlags;                          /* Device inquiry flag */
-    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
+    #endif /*  USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */
+#endif /*  USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */
 
 #endif /* USBFS_ENABLE_MIDI_STREAMING */
 
 
-#endif /* End CY_USBFS_USBFS_midi_H */
+#endif /*  CY_USBFS_USBFS_midi_H */
 
 
 /* [] END OF FILE */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_pm.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_pm.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  This file provides Suspend/Resume APIs functionality.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -36,7 +36,6 @@ static USBFS_BACKUP_STRUCT  USBFS_backup;
 
 #if(USBFS_DP_ISR_REMOVE == 0u)
 
-
     /*******************************************************************************
     * Function Name: USBFS_DP_Interrupt
     ********************************************************************************
@@ -119,7 +118,7 @@ void USBFS_RestoreConfig(void)
 ********************************************************************************
 *
 * Summary:
-*  This function disables the USBFS block and prepares for power donwn mode.
+*  This function disables the USBFS block and prepares for power down mode.
 *
 * Parameters:
 *  None.
@@ -145,7 +144,7 @@ void USBFS_Suspend(void)
 
         #if(USBFS_EP_MM != USBFS__EP_MANUAL)
             USBFS_Stop_DMA(USBFS_MAX_EP);     /* Stop all DMAs */
-        #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+        #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
         /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */
         USBFS_USBIO_CR0_REG &= (uint8)~USBFS_USBIO_CR0_TEN;
@@ -158,7 +157,7 @@ void USBFS_Suspend(void)
         /* Disable the SIE */
         USBFS_CR0_REG &= (uint8)~USBFS_CR0_ENABLE;
 
-        CyDelayUs(0u);  /*~50ns delay */
+        CyDelayUs(0u);  /* ~50ns delay */
         /* Store mode and Disable VRegulator*/
         USBFS_backup.mode = USBFS_CR1_REG & USBFS_CR1_REG_ENABLE;
         USBFS_CR1_REG &= (uint8)~USBFS_CR1_REG_ENABLE;
@@ -181,16 +180,16 @@ void USBFS_Suspend(void)
     {
         USBFS_backup.enableState = 0u;
     }
+
     CyExitCriticalSection(enableInterrupts);
 
     /* Set the DP Interrupt for wake-up from sleep mode. */
     #if(USBFS_DP_ISR_REMOVE == 0u)
-        (void) CyIntSetVector(USBFS_DP_INTC_VECT_NUM,   &USBFS_DP_ISR);
+        (void) CyIntSetVector(USBFS_DP_INTC_VECT_NUM, &USBFS_DP_ISR);
         CyIntSetPriority(USBFS_DP_INTC_VECT_NUM, USBFS_DP_INTC_PRIOR);
         CyIntClearPending(USBFS_DP_INTC_VECT_NUM);
         CyIntEnable(USBFS_DP_INTC_VECT_NUM);
     #endif /* (USBFS_DP_ISR_REMOVE == 0u) */
-
 }
 
 
@@ -223,7 +222,7 @@ void USBFS_Resume(void)
     {
         #if(USBFS_DP_ISR_REMOVE == 0u)
             CyIntDisable(USBFS_DP_INTC_VECT_NUM);
-        #endif /* End USBFS_DP_ISR_REMOVE */
+        #endif /*  USBFS_DP_ISR_REMOVE */
 
         /* Enable USB block */
         USBFS_PM_ACT_CFG_REG |= USBFS_PM_ACT_EN_FSUSB;
@@ -245,18 +244,18 @@ void USBFS_Resume(void)
         /* Set the USBIO pull-up enable */
         USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;
 
-        /* Reinit Arbiter configuration for DMA transfers */
+        /* Re-init Arbiter configuration for DMA transfers */
         #if(USBFS_EP_MM != USBFS__EP_MANUAL)
-            /* usb arb interrupt enable */
+            /* Usb arb interrupt enable */
             USBFS_ARB_INT_EN_REG = USBFS_ARB_INT_MASK;
             #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)
                 USBFS_ARB_CFG_REG = USBFS_ARB_CFG_MANUAL_DMA;
-            #endif   /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */
+            #endif   /*  USBFS_EP_MM == USBFS__EP_DMAMANUAL */
             #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
                 /*Set cfg cmplt this rises DMA request when the full configuration is done */
                 USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;
-            #endif   /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
-        #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+            #endif   /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
+        #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
         /* STALL_IN_OUT */
         CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);
@@ -268,8 +267,8 @@ void USBFS_Resume(void)
 
         /* Restore USB register settings */
         USBFS_RestoreConfig();
-
     }
+
     CyExitCriticalSection(enableInterrupts);
 }
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_pvt.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: .h
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  This private file provides constants and parameter values for the
@@ -10,7 +10,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2013, Cypress Semiconductor Corporation. All rights reserved.
+* Copyright 2013-2014, Cypress Semiconductor Corporation. All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -77,7 +77,14 @@ extern volatile T_USBFS_TD USBFS_currentTD;
 #if(USBFS_EP_MM != USBFS__EP_MANUAL)
     extern uint8 USBFS_DmaChan[USBFS_MAX_EP];
     extern uint8 USBFS_DmaTd[USBFS_MAX_EP];
-#endif /* End USBFS_EP_MM */
+#endif /*  USBFS_EP_MM */
+#if((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+    extern uint8 USBFS_DmaNextTd[USBFS_MAX_EP];
+    extern const uint8 USBFS_epX_TD_TERMOUT_EN[USBFS_MAX_EP];
+    extern volatile uint16 USBFS_inLength[USBFS_MAX_EP];
+    extern const uint8 *USBFS_inDataPointer[USBFS_MAX_EP];
+    extern volatile uint8 USBFS_inBufFull[USBFS_MAX_EP];
+#endif /*  ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u)) */
 
 extern volatile uint8 USBFS_ep0Toggle;
 extern volatile uint8 USBFS_lastPacketSize;
@@ -117,7 +124,7 @@ void USBFS_Config(uint8 clearAltSetting) ;
 void USBFS_ConfigAltChanged(void) ;
 void USBFS_ConfigReg(void) ;
 
-const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 c)
+const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 confIndex)
                                                             ;
 const T_USBFS_LUT CYCODE *USBFS_GetDeviceTablePtr(void)
                                                             ;
@@ -130,56 +137,62 @@ uint8 USBFS_ValidateAlternateSetting(void) ;
 void USBFS_SaveConfig(void) ;
 void USBFS_RestoreConfig(void) ;
 
+#if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+    void USBFS_LoadNextInEP(uint8 epNumber, uint8 mode) ;
+#endif /* (USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u) */
+
 #if defined(USBFS_ENABLE_IDSN_STRING)
     void USBFS_ReadDieID(uint8 descr[]) ;
 #endif /* USBFS_ENABLE_IDSN_STRING */
 
 #if defined(USBFS_ENABLE_HID_CLASS)
     uint8 USBFS_DispatchHIDClassRqst(void);
-#endif /* End USBFS_ENABLE_HID_CLASS */
+#endif /*  USBFS_ENABLE_HID_CLASS */
 #if defined(USBFS_ENABLE_AUDIO_CLASS)
     uint8 USBFS_DispatchAUDIOClassRqst(void);
-#endif /* End USBFS_ENABLE_HID_CLASS */
+#endif /*  USBFS_ENABLE_HID_CLASS */
 #if defined(USBFS_ENABLE_CDC_CLASS)
     uint8 USBFS_DispatchCDCClassRqst(void);
-#endif /* End USBFS_ENABLE_CDC_CLASS */
+#endif /*  USBFS_ENABLE_CDC_CLASS */
 
 CY_ISR_PROTO(USBFS_EP_0_ISR);
 #if(USBFS_EP1_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_1_ISR);
-#endif /* End USBFS_EP1_ISR_REMOVE */
+#endif /*  USBFS_EP1_ISR_REMOVE */
 #if(USBFS_EP2_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_2_ISR);
-#endif /* End USBFS_EP2_ISR_REMOVE */
+#endif /*  USBFS_EP2_ISR_REMOVE */
 #if(USBFS_EP3_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_3_ISR);
-#endif /* End USBFS_EP3_ISR_REMOVE */
+#endif /*  USBFS_EP3_ISR_REMOVE */
 #if(USBFS_EP4_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_4_ISR);
-#endif /* End USBFS_EP4_ISR_REMOVE */
+#endif /*  USBFS_EP4_ISR_REMOVE */
 #if(USBFS_EP5_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_5_ISR);
-#endif /* End USBFS_EP5_ISR_REMOVE */
+#endif /*  USBFS_EP5_ISR_REMOVE */
 #if(USBFS_EP6_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_6_ISR);
-#endif /* End USBFS_EP6_ISR_REMOVE */
+#endif /*  USBFS_EP6_ISR_REMOVE */
 #if(USBFS_EP7_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_7_ISR);
-#endif /* End USBFS_EP7_ISR_REMOVE */
+#endif /*  USBFS_EP7_ISR_REMOVE */
 #if(USBFS_EP8_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_EP_8_ISR);
-#endif /* End USBFS_EP8_ISR_REMOVE */
+#endif /*  USBFS_EP8_ISR_REMOVE */
 CY_ISR_PROTO(USBFS_BUS_RESET_ISR);
 #if(USBFS_SOF_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_SOF_ISR);
-#endif /* End USBFS_SOF_ISR_REMOVE */
+#endif /*  USBFS_SOF_ISR_REMOVE */
 #if(USBFS_EP_MM != USBFS__EP_MANUAL)
     CY_ISR_PROTO(USBFS_ARB_ISR);
-#endif /* End USBFS_EP_MM */
+#endif /*  USBFS_EP_MM */
 #if(USBFS_DP_ISR_REMOVE == 0u)
     CY_ISR_PROTO(USBFS_DP_ISR);
-#endif /* End USBFS_DP_ISR_REMOVE */
-
+#endif /*  USBFS_DP_ISR_REMOVE */
+#if ((USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u))
+    CY_ISR_PROTO(USBFS_EP_DMA_DONE_ISR);
+#endif /* (USBFS_EP_MM == USBFS__EP_DMAAUTO) && (USBFS_EP_DMA_AUTO_OPT == 0u) */
 
 /***************************************
 * Request Handlers
@@ -193,6 +206,7 @@ uint8 USBFS_HandleVendorRqst(void) ;
 /***************************************
 *    HID Internal references
 ***************************************/
+
 #if defined(USBFS_ENABLE_HID_CLASS)
     void USBFS_FindReport(void) ;
     void USBFS_FindReportDescriptor(void) ;
@@ -203,6 +217,7 @@ uint8 USBFS_HandleVendorRqst(void) ;
 /***************************************
 *    MIDI Internal references
 ***************************************/
+
 #if defined(USBFS_ENABLE_MIDI_STREAMING)
     void USBFS_MIDI_IN_EP_Service(void) ;
 #endif /* USBFS_ENABLE_MIDI_STREAMING */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_std.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_std.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  USB Standard request handler.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -17,9 +17,9 @@
 #include "USBFS.h"
 #include "USBFS_cdc.h"
 #include "USBFS_pvt.h"
-#if defined(USBFS_ENABLE_MIDI_STREAMING) 
+#if defined(USBFS_ENABLE_MIDI_STREAMING)
     #include "USBFS_midi.h"
-#endif /* End USBFS_ENABLE_MIDI_STREAMING*/
+#endif /*  USBFS_ENABLE_MIDI_STREAMING*/
 
 
 /***************************************
@@ -33,7 +33,6 @@
 
 #if defined(USBFS_ENABLE_FWSN_STRING)
 
-
     /*******************************************************************************
     * Function Name: USBFS_SerialNumString
     ********************************************************************************
@@ -57,10 +56,10 @@
         USBFS_snStringConfirm = USBFS_FALSE;
         if(snString != NULL)
         {
-            USBFS_fwSerialNumberStringDescriptor = snString;
             /* Check descriptor validation */
             if( (snString[0u] > 1u ) && (snString[1u] == USBFS_DESCR_STRING) )
             {
+                USBFS_fwSerialNumberStringDescriptor = snString;
                 USBFS_snStringConfirm = USBFS_TRUE;
             }
         }
@@ -90,6 +89,7 @@ uint8 USBFS_HandleStandardRqst(void)
 {
     uint8 requestHandled = USBFS_FALSE;
     uint8 interfaceNumber;
+    uint8 configurationN;
     #if defined(USBFS_ENABLE_STRINGS)
         volatile uint8 *pStr = 0u;
         #if defined(USBFS_ENABLE_DESCRIPTOR_STRINGS)
@@ -117,11 +117,14 @@ uint8 USBFS_HandleStandardRqst(void)
                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_CONFIG)
                 {
                     pTmp = USBFS_GetConfigTablePtr(CY_GET_REG8(USBFS_wValueLo));
-                    USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;
-                    USBFS_currentTD.count = ((uint16)(USBFS_currentTD.pData)[ \
-                                      USBFS_CONFIG_DESCR_TOTAL_LENGTH_HI] << 8u) | \
-                                     (USBFS_currentTD.pData)[USBFS_CONFIG_DESCR_TOTAL_LENGTH_LOW];
-                    requestHandled  = USBFS_InitControlRead();
+                    if( pTmp != NULL )  /* Verify that requested descriptor exists */
+                    {
+                        USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;
+                        USBFS_currentTD.count = ((uint16)(USBFS_currentTD.pData)[ \
+                                          USBFS_CONFIG_DESCR_TOTAL_LENGTH_HI] << 8u) | \
+                                         (USBFS_currentTD.pData)[USBFS_CONFIG_DESCR_TOTAL_LENGTH_LOW];
+                        requestHandled  = USBFS_InitControlRead();
+                    }
                 }
                 #if defined(USBFS_ENABLE_STRINGS)
                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_STRING)
@@ -138,34 +141,39 @@ uint8 USBFS_HandleStandardRqst(void)
                             pStr = &pStr[descrLength];
                             nStr++;
                         }
-                    #endif /* End USBFS_ENABLE_DESCRIPTOR_STRINGS */
+                    #endif /*  USBFS_ENABLE_DESCRIPTOR_STRINGS */
                     /* Microsoft OS String*/
                     #if defined(USBFS_ENABLE_MSOS_STRING)
                         if( CY_GET_REG8(USBFS_wValueLo) == USBFS_STRING_MSOS )
                         {
                             pStr = (volatile uint8 *)&USBFS_MSOS_DESCRIPTOR[0u];
                         }
-                    #endif /* End USBFS_ENABLE_MSOS_STRING*/
+                    #endif /*  USBFS_ENABLE_MSOS_STRING*/
                     /* SN string */
                     #if defined(USBFS_ENABLE_SN_STRING)
                         if( (CY_GET_REG8(USBFS_wValueLo) != 0u) &&
                             (CY_GET_REG8(USBFS_wValueLo) ==
                             USBFS_DEVICE0_DESCR[USBFS_DEVICE_DESCR_SN_SHIFT]) )
                         {
-                            pStr = (volatile uint8 *)&USBFS_SN_STRING_DESCRIPTOR[0u];
-                            #if defined(USBFS_ENABLE_FWSN_STRING)
-                                if(USBFS_snStringConfirm != USBFS_FALSE)
-                                {
-                                    pStr = USBFS_fwSerialNumberStringDescriptor;
-                                }
-                            #endif  /* USBFS_ENABLE_FWSN_STRING */
+
                             #if defined(USBFS_ENABLE_IDSN_STRING)
                                 /* Read DIE ID and generate string descriptor in RAM */
                                 USBFS_ReadDieID(USBFS_idSerialNumberStringDescriptor);
                                 pStr = USBFS_idSerialNumberStringDescriptor;
-                            #endif    /* End USBFS_ENABLE_IDSN_STRING */
+                            #elif defined(USBFS_ENABLE_FWSN_STRING)
+                                if(USBFS_snStringConfirm != USBFS_FALSE)
+                                {
+                                    pStr = USBFS_fwSerialNumberStringDescriptor;
+                                }
+                                else
+                                {
+                                    pStr = (volatile uint8 *)&USBFS_SN_STRING_DESCRIPTOR[0u];
+                                }
+                            #else
+                                pStr = (volatile uint8 *)&USBFS_SN_STRING_DESCRIPTOR[0u];
+                            #endif  /* defined(USBFS_ENABLE_IDSN_STRING) */
                         }
-                    #endif    /* End USBFS_ENABLE_SN_STRING */
+                    #endif    /*  USBFS_ENABLE_SN_STRING */
                     if (*pStr != 0u)
                     {
                         USBFS_currentTD.count = *pStr;
@@ -173,7 +181,7 @@ uint8 USBFS_HandleStandardRqst(void)
                         requestHandled  = USBFS_InitControlRead();
                     }
                 }
-                #endif /* End USBFS_ENABLE_STRINGS */
+                #endif /*  USBFS_ENABLE_STRINGS */
                 else
                 {
                     requestHandled = USBFS_DispatchClassRqst();
@@ -225,10 +233,23 @@ uint8 USBFS_HandleStandardRqst(void)
                 requestHandled = USBFS_InitNoDataControlTransfer();
                 break;
             case USBFS_SET_CONFIGURATION:
-                USBFS_configuration = CY_GET_REG8(USBFS_wValueLo);
-                USBFS_configurationChanged = USBFS_TRUE;
-                USBFS_Config(USBFS_TRUE);
-                requestHandled = USBFS_InitNoDataControlTransfer();
+                configurationN = CY_GET_REG8(USBFS_wValueLo);
+                if(configurationN > 0u)
+                {   /* Verify that configuration descriptor exists */
+                    pTmp = USBFS_GetConfigTablePtr(configurationN - 1u);
+                }
+                /* Responds with a Request Error when configuration number is invalid */
+                if (((configurationN > 0u) && (pTmp != NULL)) || (configurationN == 0u))
+                {
+                    /* Set new configuration if it has been changed */
+                    if(configurationN != USBFS_configuration)
+                    {
+                        USBFS_configuration = configurationN;
+                        USBFS_configurationChanged = USBFS_TRUE;
+                        USBFS_Config(USBFS_TRUE);
+                    }
+                    requestHandled = USBFS_InitNoDataControlTransfer();
+                }
                 break;
             case USBFS_SET_INTERFACE:
                 if (USBFS_ValidateAlternateSetting() != 0u)
@@ -241,7 +262,7 @@ uint8 USBFS_HandleStandardRqst(void)
                         USBFS_Config(USBFS_FALSE);
                     #else
                         USBFS_ConfigAltChanged();
-                    #endif /* End (USBFS_EP_MA == USBFS__MA_DYNAMIC) */
+                    #endif /*  (USBFS_EP_MA == USBFS__MA_DYNAMIC) */
                     /* Update handled Alt setting changes status */
                     USBFS_interfaceSetting_last[interfaceNumber] =
                          USBFS_interfaceSetting[interfaceNumber];
@@ -342,7 +363,6 @@ uint8 USBFS_HandleStandardRqst(void)
         uint8 value;
         const char8 CYCODE hex[16u] = "0123456789ABCDEF";
 
-
         /* Check descriptor validation */
         if( descr != NULL)
         {
@@ -360,7 +380,7 @@ uint8 USBFS_HandleStandardRqst(void)
         }
     }
 
-#endif /* End USBFS_ENABLE_IDSN_STRING */
+#endif /*  USBFS_ENABLE_IDSN_STRING */
 
 
 /*******************************************************************************
@@ -384,20 +404,18 @@ void USBFS_ConfigReg(void)
     uint8 ep;
     uint8 i;
     #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
-        uint8 ep_type = 0u;
-    #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+        uint8 epType = 0u;
+    #endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
 
     /* Set the endpoint buffer addresses */
     ep = USBFS_EP1;
     for (i = 0u; i < 0x80u; i+= 0x10u)
     {
-        CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_CFG_IND + i), USBFS_ARB_EPX_CFG_CRC_BYPASS |
-                                                          USBFS_ARB_EPX_CFG_RESET);
-
+        CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_CFG_IND + i), USBFS_ARB_EPX_CFG_DEFAULT);
         #if(USBFS_EP_MM != USBFS__EP_MANUAL)
             /* Enable all Arbiter EP Interrupts : err, buf under, buf over, dma gnt(mode2 only), in buf full */
             CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_INT_EN_IND + i), USBFS_ARB_EPX_INT_MASK);
-        #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */
+        #endif   /*  USBFS_EP_MM != USBFS__EP_MANUAL */
 
         if(USBFS_EP[ep].epMode != USBFS_MODE_DISABLE)
         {
@@ -410,8 +428,8 @@ void USBFS_ConfigReg(void)
                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + i), USBFS_MODE_NAK_OUT);
                 /* Prepare EP type mask for automatic memory allocation */
                 #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
-                    ep_type |= (uint8)(0x01u << (ep - USBFS_EP1));
-                #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+                    epType |= (uint8)(0x01u << (ep - USBFS_EP1));
+                #endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
             }
         }
         else
@@ -427,7 +445,7 @@ void USBFS_ConfigReg(void)
             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);
             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + i),     USBFS_EP[ep].buffOffset & 0xFFu);
             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */
+        #endif /*  USBFS_EP_MM != USBFS__EP_DMAAUTO */
 
         ep++;
     }
@@ -438,13 +456,13 @@ void USBFS_ConfigReg(void)
         USBFS_DMA_THRES_REG = USBFS_DMA_BYTES_PER_BURST;   /* DMA burst threshold */
         USBFS_DMA_THRES_MSB_REG = 0u;
         USBFS_EP_ACTIVE_REG = USBFS_ARB_INT_MASK;
-        USBFS_EP_TYPE_REG = ep_type;
+        USBFS_EP_TYPE_REG = epType;
         /* Cfg_cmp bit set to 1 once configuration is complete. */
         USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM |
                                        USBFS_ARB_CFG_CFG_CPM;
         /* Cfg_cmp bit set to 0 during configuration of PFSUSB Registers. */
         USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;
-    #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+    #endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
 
     CY_SET_REG8(USBFS_SIE_EP_INT_EN_PTR, 0xFFu);
 }
@@ -477,11 +495,11 @@ void USBFS_Config(uint8 clearAltSetting)
     uint8 ep;
     uint8 cur_ep;
     uint8 i;
-    uint8 ep_type;
+    uint8 epType;
     const uint8 *pDescr;
     #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)
         uint16 buffCount = 0u;
-    #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */
+    #endif /*  USBFS_EP_MM != USBFS__EP_DMAAUTO */
 
     const T_USBFS_LUT CYCODE *pTmp;
     const T_USBFS_EP_SETTINGS_BLOCK CYCODE *pEP;
@@ -534,56 +552,56 @@ void USBFS_Config(uint8 clearAltSetting)
             pEP = (T_USBFS_EP_SETTINGS_BLOCK *) pTmp->p_list;
             for (i = 0u; i < ep; i++)
             {
-                /* Compare current Alternate setting with EP Alt*/
+                /* Compare current Alternate setting with EP Alt */
                 if(USBFS_interfaceSetting[pEP->interface] == pEP->altSetting)
                 {
                     cur_ep = pEP->addr & USBFS_DIR_UNUSED;
-                    ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;
+                    epType = pEP->attributes & USBFS_EP_TYPE_MASK;
                     if (pEP->addr & USBFS_DIR_IN)
                     {
                         /* IN Endpoint */
                         USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;
-                        USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?
+                        USBFS_EP[cur_ep].epMode = (epType == USBFS_EP_TYPE_ISOC) ?
                                                         USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;
                         #if defined(USBFS_ENABLE_CDC_CLASS)
                             if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||
                                 (pEP->bMisc == USBFS_CLASS_CDC)) &&
-                                (ep_type != USBFS_EP_TYPE_INT))
+                                (epType != USBFS_EP_TYPE_INT))
                             {
                                 USBFS_cdc_data_in_ep = cur_ep;
                             }
-                        #endif  /* End USBFS_ENABLE_CDC_CLASS*/
+                        #endif  /*  USBFS_ENABLE_CDC_CLASS*/
                         #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \
                                              (USBFS_MIDI_IN_BUFF_SIZE > 0) )
                             if((pEP->bMisc == USBFS_CLASS_AUDIO) &&
-                               (ep_type == USBFS_EP_TYPE_BULK))
+                               (epType == USBFS_EP_TYPE_BULK))
                             {
                                 USBFS_midi_in_ep = cur_ep;
                             }
-                        #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/
+                        #endif  /*  USBFS_ENABLE_MIDI_STREAMING*/
                     }
                     else
                     {
                         /* OUT Endpoint */
                         USBFS_EP[cur_ep].apiEpState = USBFS_NO_EVENT_PENDING;
-                        USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?
+                        USBFS_EP[cur_ep].epMode = (epType == USBFS_EP_TYPE_ISOC) ?
                                                     USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;
                         #if defined(USBFS_ENABLE_CDC_CLASS)
                             if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||
                                 (pEP->bMisc == USBFS_CLASS_CDC)) &&
-                                (ep_type != USBFS_EP_TYPE_INT))
+                                (epType != USBFS_EP_TYPE_INT))
                             {
                                 USBFS_cdc_data_out_ep = cur_ep;
                             }
-                        #endif  /* End USBFS_ENABLE_CDC_CLASS*/
+                        #endif  /*  USBFS_ENABLE_CDC_CLASS*/
                         #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \
                                      (USBFS_MIDI_OUT_BUFF_SIZE > 0) )
                             if((pEP->bMisc == USBFS_CLASS_AUDIO) &&
-                               (ep_type == USBFS_EP_TYPE_BULK))
+                               (epType == USBFS_EP_TYPE_BULK))
                             {
                                 USBFS_midi_out_ep = cur_ep;
                             }
-                        #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/
+                        #endif  /*  USBFS_ENABLE_MIDI_STREAMING*/
                     }
                     USBFS_EP[cur_ep].bufferSize = pEP->bufferSize;
                     USBFS_EP[cur_ep].addr = pEP->addr;
@@ -591,7 +609,7 @@ void USBFS_Config(uint8 clearAltSetting)
                 }
                 pEP = &pEP[1u];
             }
-        #else /* Config for static EP memory allocation  */
+        #else /* Configure for static EP memory allocation  */
             for (i = USBFS_EP1; i < USBFS_MAX_EP; i++)
             {
                 /* p_list points the endpoint setting table. */
@@ -610,67 +628,67 @@ void USBFS_Config(uint8 clearAltSetting)
                         /* Compare current Alternate setting with EP Alt*/
                         if(USBFS_interfaceSetting[pEP->interface] == pEP->altSetting)
                         {
-                            ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;
+                            epType = pEP->attributes & USBFS_EP_TYPE_MASK;
                             if ((pEP->addr & USBFS_DIR_IN) != 0u)
                             {
                                 /* IN Endpoint */
                                 USBFS_EP[i].apiEpState = USBFS_EVENT_PENDING;
-                                USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?
+                                USBFS_EP[i].epMode = (epType == USBFS_EP_TYPE_ISOC) ?
                                                         USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;
-                                /* Find and init CDC IN endpoint number */
+                                /* Find and initialize CDC IN endpoint number */
                                 #if defined(USBFS_ENABLE_CDC_CLASS)
                                     if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||
                                         (pEP->bMisc == USBFS_CLASS_CDC)) &&
-                                        (ep_type != USBFS_EP_TYPE_INT))
+                                        (epType != USBFS_EP_TYPE_INT))
                                     {
                                         USBFS_cdc_data_in_ep = i;
                                     }
-                                #endif  /* End USBFS_ENABLE_CDC_CLASS*/
+                                #endif  /*  USBFS_ENABLE_CDC_CLASS*/
                                 #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \
                                              (USBFS_MIDI_IN_BUFF_SIZE > 0) )
                                     if((pEP->bMisc == USBFS_CLASS_AUDIO) &&
-                                       (ep_type == USBFS_EP_TYPE_BULK))
+                                       (epType == USBFS_EP_TYPE_BULK))
                                     {
                                         USBFS_midi_in_ep = i;
                                     }
-                                #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/
+                                #endif  /*  USBFS_ENABLE_MIDI_STREAMING*/
                             }
                             else
                             {
                                 /* OUT Endpoint */
                                 USBFS_EP[i].apiEpState = USBFS_NO_EVENT_PENDING;
-                                USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?
+                                USBFS_EP[i].epMode = (epType == USBFS_EP_TYPE_ISOC) ?
                                                     USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;
-                                /* Find and init CDC IN endpoint number */
+                                /* Find and initialize CDC IN endpoint number */
                                 #if defined(USBFS_ENABLE_CDC_CLASS)
                                     if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||
                                         (pEP->bMisc == USBFS_CLASS_CDC)) &&
-                                        (ep_type != USBFS_EP_TYPE_INT))
+                                        (epType != USBFS_EP_TYPE_INT))
                                     {
                                         USBFS_cdc_data_out_ep = i;
                                     }
-                                #endif  /* End USBFS_ENABLE_CDC_CLASS*/
+                                #endif  /*  USBFS_ENABLE_CDC_CLASS*/
                                 #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \
                                              (USBFS_MIDI_OUT_BUFF_SIZE > 0) )
                                     if((pEP->bMisc == USBFS_CLASS_AUDIO) &&
-                                       (ep_type == USBFS_EP_TYPE_BULK))
+                                       (epType == USBFS_EP_TYPE_BULK))
                                     {
                                         USBFS_midi_out_ep = i;
                                     }
-                                #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/
+                                #endif  /*  USBFS_ENABLE_MIDI_STREAMING*/
                             }
                             USBFS_EP[i].addr = pEP->addr;
                             USBFS_EP[i].attrib = pEP->attributes;
 
                             #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)
                                 break;      /* use first EP setting in Auto memory managment */
-                            #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+                            #endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
                         }
                     }
                     pEP = &pEP[1u];
                 }
             }
-        #endif /* End (USBFS_EP_MA == USBFS__MA_DYNAMIC) */
+        #endif /*  (USBFS_EP_MA == USBFS__MA_DYNAMIC) */
 
         /* Init class array for each interface and interface number for each EP.
         *  It is used for handling Class specific requests directed to either an
@@ -694,7 +712,7 @@ void USBFS_Config(uint8 clearAltSetting)
                 USBFS_EP[ep].buffOffset = buffCount;
                  buffCount += USBFS_EP[ep].bufferSize;
             }
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */
+        #endif /*  USBFS_EP_MM != USBFS__EP_DMAAUTO */
 
         /* Configure hardware registers */
         USBFS_ConfigReg();
@@ -725,7 +743,7 @@ void USBFS_ConfigAltChanged(void)
     uint8 ep;
     uint8 cur_ep;
     uint8 i;
-    uint8 ep_type;
+    uint8 epType;
     uint8 ri;
 
     const T_USBFS_LUT CYCODE *pTmp;
@@ -753,19 +771,19 @@ void USBFS_ConfigAltChanged(void)
             {
                 cur_ep = pEP->addr & USBFS_DIR_UNUSED;
                 ri = ((cur_ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);
-                ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;
+                epType = pEP->attributes & USBFS_EP_TYPE_MASK;
                 if ((pEP->addr & USBFS_DIR_IN) != 0u)
                 {
                     /* IN Endpoint */
                     USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;
-                    USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?
+                    USBFS_EP[cur_ep].epMode = (epType == USBFS_EP_TYPE_ISOC) ?
                                                 USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;
                 }
                 else
                 {
                     /* OUT Endpoint */
                     USBFS_EP[cur_ep].apiEpState = USBFS_NO_EVENT_PENDING;
-                    USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?
+                    USBFS_EP[cur_ep].epMode = (epType == USBFS_EP_TYPE_ISOC) ?
                                                 USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;
                 }
                  /* Change the SIE mode for the selected EP to NAK ALL */
@@ -823,7 +841,7 @@ void USBFS_ConfigAltChanged(void)
                                                                 USBFS_EP[cur_ep].buffOffset & 0xFFu);
                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + ri),
                                                                 USBFS_EP[cur_ep].buffOffset >> 8u);
-            #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */
+            #endif /*  USBFS_EP_MM == USBFS__EP_DMAAUTO */
             }
             /* Get next EP element */
             pEP = &pEP[1u];
@@ -840,13 +858,13 @@ void USBFS_ConfigAltChanged(void)
 *  This routine returns a pointer a configuration table entry
 *
 * Parameters:
-*  c:  Configuration Index
+*  confIndex:  Configuration Index
 *
 * Return:
-*  Device Descriptor pointer.
+*  Device Descriptor pointer or NULL when descriptor isn't exists.
 *
 *******************************************************************************/
-const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 c)
+const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 confIndex)
                                                         
 {
     /* Device Table */
@@ -856,8 +874,20 @@ const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 c)
 
     /* The first entry points to the Device Descriptor,
     *  the rest configuration entries.
-	*/
-    return( (const T_USBFS_LUT CYCODE *) pTmp[c + 1u].p_list );
+    *  Set pointer to the first Configuration Descriptor
+    */
+    pTmp = &pTmp[1u];
+    /* For this table, c is the number of configuration descriptors  */
+    if(confIndex >= pTmp->c)   /* Verify that required configuration descriptor exists */
+    {
+        pTmp = (const T_USBFS_LUT CYCODE *) NULL;
+    }
+    else
+    {
+        pTmp = (const T_USBFS_LUT CYCODE *) pTmp[confIndex].p_list;
+    }
+
+    return( pTmp );
 }
 
 
@@ -902,14 +932,24 @@ const uint8 CYCODE *USBFS_GetInterfaceClassTablePtr(void)
                                                         
 {
     const T_USBFS_LUT CYCODE *pTmp;
+    const uint8 CYCODE *pInterfaceClass;
     uint8 currentInterfacesNum;
 
     pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);
-    currentInterfacesNum  = ((const uint8 *) pTmp->p_list)[USBFS_CONFIG_DESCR_NUM_INTERFACES];
-    /* Third entry in the LUT starts the Interface Table pointers */
-    /* The INTERFACE_CLASS table is located after all interfaces */
-    pTmp = &pTmp[currentInterfacesNum + 2u];
-    return( (const uint8 CYCODE *) pTmp->p_list );
+    if( pTmp != NULL )
+    {
+        currentInterfacesNum  = ((const uint8 *) pTmp->p_list)[USBFS_CONFIG_DESCR_NUM_INTERFACES];
+        /* Third entry in the LUT starts the Interface Table pointers */
+        /* The INTERFACE_CLASS table is located after all interfaces */
+        pTmp = &pTmp[currentInterfacesNum + 2u];
+        pInterfaceClass = (const uint8 CYCODE *) pTmp->p_list;
+    }
+    else
+    {
+        pInterfaceClass = (const uint8 CYCODE *) NULL;
+    }
+
+    return( pInterfaceClass );
 }
 
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/USBFS_vnd.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: USBFS_vnd.c
-* Version 2.60
+* Version 2.80
 *
 * Description:
 *  USB vendor request handler.
@@ -8,7 +8,7 @@
 * Note:
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -34,7 +34,7 @@
 ********************************************************************************
 *
 * Summary:
-*  This routine provide users with a method to implement vendor specifc
+*  This routine provide users with a method to implement vendor specific
 *  requests.
 *
 *  To implement vendor specific requests, add your code in this function to
@@ -66,7 +66,7 @@ uint8 USBFS_HandleVendorRqst(void)
                     USBFS_currentTD.pData = (volatile uint8 *)&USBFS_MSOS_CONFIGURATION_DESCR[0u];
                     USBFS_currentTD.count = USBFS_MSOS_CONFIGURATION_DESCR[0u];
                     requestHandled  = USBFS_InitControlRead();
-                #endif /* End USBFS_ENABLE_MSOS_STRING */
+                #endif /*  USBFS_ENABLE_MSOS_STRING */
                 break;
             default:
                 break;

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cm3gcc.ld

@@ -45,10 +45,10 @@ CY_METADATA_SIZE    = 64;
  */
 EXTERN(Reset)
 
-/* Bring in the interrupt routines & vector */
+/* Bring in interrupt routines & vector */
 EXTERN(main)
 
-/* Bring in the meta data */
+/* Bring in meta data */
 EXTERN(cy_meta_loader cy_bootloader cy_meta_loadable cy_meta_bootloader)
 EXTERN(cy_meta_custnvl cy_meta_wolatch cy_meta_flashprotect cy_metadata)
 
@@ -56,7 +56,7 @@ EXTERN(cy_meta_custnvl cy_meta_wolatch cy_meta_flashprotect cy_metadata)
 PROVIDE(__cy_heap_start = _end);
 PROVIDE(__cy_region_num = (__cy_regions_end - __cy_regions) / 16);
 PROVIDE(__cy_stack = ORIGIN(ram) + LENGTH(ram));
-PROVIDE(__cy_heap_end = __cy_stack - 0x2000);
+PROVIDE(__cy_heap_end = __cy_stack - 0x1000);
 
 
 SECTIONS
@@ -90,7 +90,7 @@ SECTIONS
     /* Make sure we pulled in some reset code.  */
     ASSERT (. != __cy_reset, "No reset code");
 
-	/* Place the DMA initialization before text to ensure it gets placed in first 64K of flash */
+	/* Place DMA initialization before text to ensure it gets placed in first 64K of flash */
     *(.dma_init)
     ASSERT(appl_start + . <= 0x10000 || !0, "DMA Init must be within the first 64k of flash");
 		
@@ -221,10 +221,10 @@ SECTIONS
     __cy_heap_limit = .;
   } >ram
 
-  .stack (__cy_stack - 0x2000) (NOLOAD) :
+  .stack (__cy_stack - 0x1000) (NOLOAD) :
   {
     __cy_stack_limit = .;
-    . += 0x2000;
+    . += 0x1000;
   } >ram
   
   /* Check if data + heap + stack exceeds RAM limit */

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: core_cm3_psoc5.h
-* Version 4.0
+* Version 4.20
 *
 *  Description:
 *   Provides important type information for the PSoC5.  This includes types
@@ -11,7 +11,7 @@
 *   System Reference Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyPm.c

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: cyPm.c
-* Version 4.0
+* Version 4.20
 *
 * Description:
 *  Provides an API for the power management.
@@ -10,7 +10,7 @@
 *  System Reference Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -20,8 +20,8 @@
 
 
 /*******************************************************************
-* Place your includes, defines and code here. Do not use merge
-* region below unless any component datasheet suggest to do so.
+* Place your includes, defines, and code here. Do not use the merge
+* region below unless any component datasheet suggests doing so.
 *******************************************************************/
 /* `#START CY_PM_HEADER_INCLUDE` */
 
@@ -51,8 +51,8 @@ static void CyPmHviLviRestore(void) ;
 *
 * Summary:
 *  This function is called in preparation for entering sleep or hibernate low
-*  power modes. Saves all state of the clocking system that does not persist
-*  during sleep/hibernate or that needs to be altered in preparation for
+*  power modes. Saves all the states of the clocking system that do not persist
+*  during sleep/hibernate or that need to be altered in preparation for
 *  sleep/hibernate. Shutdowns all the digital and analog clock dividers for the
 *  active power mode configuration.
 *
@@ -105,6 +105,45 @@ void CyPmSaveClocks(void)
         cyPmClockBackup.imo2x = CY_PM_DISABLED;
     }
 
+    /* Master clock - save source */
+    cyPmClockBackup.masterClkSrc = CY_PM_CLKDIST_MSTR1_REG & CY_PM_MASTER_CLK_SRC_MASK;
+
+    /* Switch Master clock's source from PLL's output to PLL's source */
+    if(CY_MASTER_SOURCE_PLL == cyPmClockBackup.masterClkSrc)
+    {
+        switch (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_PLL_SRC_MASK)
+        {
+        case CY_PM_CLKDIST_PLL_SRC_IMO:
+            CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);
+            break;
+
+        case CY_PM_CLKDIST_PLL_SRC_XTAL:
+            CyMasterClk_SetSource(CY_MASTER_SOURCE_XTAL);
+            break;
+
+        case CY_PM_CLKDIST_PLL_SRC_DSI:
+            CyMasterClk_SetSource(CY_MASTER_SOURCE_DSI);
+            break;
+
+        default:
+            CYASSERT(0u != 0u);
+            break;
+        }
+    }
+
+    /* PLL - check enable state, disable if needed */
+    if(0u != (CY_PM_FASTCLK_PLL_CFG0_REG & CY_PM_PLL_CFG0_ENABLE))
+    {
+        /* PLL is enabled - save state and disable */
+        cyPmClockBackup.pllEnableState = CY_PM_ENABLED;
+        CyPLL_OUT_Stop();
+    }
+    else
+    {
+        /* PLL is disabled - save state */
+        cyPmClockBackup.pllEnableState = CY_PM_DISABLED;
+    }
+
     /* IMO - set appropriate frequency for LPM */
     CyIMO_SetFreq(CY_PM_IMO_FREQ_LPM);
 
@@ -119,8 +158,11 @@ void CyPmSaveClocks(void)
         /* IMO - save disabled state */
         cyPmClockBackup.imoEnable = CY_PM_DISABLED;
 
-        /* IMO - enable */
+        /* Enable the IMO. Use software delay instead of the FTW-based inside */
         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);
+
+        /* Settling time of the IMO is of the order of less than 6us */
+        CyDelayUs(6u);
     }
 
     /* IMO - save the current IMOCLK source and set to IMO if not yet */
@@ -130,7 +172,7 @@ void CyPmSaveClocks(void)
         cyPmClockBackup.imoClkSrc =
             (0u == (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO2X_SRC)) ? CY_IMO_SOURCE_DSI : CY_IMO_SOURCE_XTAL;
 
-        /* IMO -  set IMOCLK source to MHz OSC */
+        /* IMO -  set IMOCLK source to IMO */
         CyIMO_SetSource(CY_IMO_SOURCE_IMO);
     }
     else
@@ -161,16 +203,13 @@ void CyPmSaveClocks(void)
     if(CY_PM_DIV_BY_ONE != cyPmClockBackup.clkSyncDiv)
     {
         CyMasterClk_SetDivider(CY_PM_DIV_BY_ONE);
-    }    /* Need to change nothing if master clock divider is 1 */
-
-    /* Master clock - save current source */
-    cyPmClockBackup.masterClkSrc = CY_PM_CLKDIST_MSTR1_REG & CY_PM_MASTER_CLK_SRC_MASK;
+    }    /* No change if master clock divider is 1 */
 
     /* Master clock source - set it to IMO if not yet. */
     if(CY_MASTER_SOURCE_IMO != cyPmClockBackup.masterClkSrc)
     {
         CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);
-    }    /* Need to change nothing if master clock source is IMO */
+    }    /* No change if master clock source is IMO */
 
     /* Bus clock - save divider and set it, if needed, to divide-by-one */
     cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);
@@ -180,22 +219,9 @@ void CyPmSaveClocks(void)
         CyBusClk_SetDivider(CY_PM_BUS_CLK_DIV_BY_ONE);
     }    /* Do nothing if saved and actual values are equal */
 
-    /* Set number of wait cycles for the flash according CPU frequency in MHz */
+    /* Set number of wait cycles for flash according to CPU frequency in MHz */
     CyFlash_SetWaitCycles((uint8)CY_PM_GET_CPU_FREQ_MHZ);
 
-    /* PLL - check enable state, disable if needed */
-    if(0u != (CY_PM_FASTCLK_PLL_CFG0_REG & CY_PM_PLL_CFG0_ENABLE))
-    {
-        /* PLL is enabled - save state and disable */
-        cyPmClockBackup.pllEnableState = CY_PM_ENABLED;
-        CyPLL_OUT_Stop();
-    }
-    else
-    {
-        /* PLL is disabled - save state */
-        cyPmClockBackup.pllEnableState = CY_PM_DISABLED;
-    }
-
     /* MHz ECO - check enable state and disable if needed */
     if(0u != (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_ENABLE))
     {
@@ -211,8 +237,8 @@ void CyPmSaveClocks(void)
 
 
     /***************************************************************************
-    * Save enable state of delay between the system bus clock and each of the
-    * 4 individual analog clocks. This bit non-retention and it's value should
+    * Save the enable state of delay between the system bus clock and each of the
+    * 4 individual analog clocks. This bit non-retention and its value should
     * be restored on wakeup.
     ***************************************************************************/
     if(0u != (CY_PM_CLKDIST_DELAY_REG & CY_PM_CLKDIST_DELAY_EN))
@@ -240,11 +266,11 @@ void CyPmSaveClocks(void)
 *
 *  PSoC 3 and PSoC 5LP:
 *  The merge region could be used to process state when the megahertz crystal is
-*  not ready after the hold-off timeout.
+*  not ready after a hold-off timeout.
 *
 *  PSoC 5:
-*  The 130 ms is given for the megahertz crystal to stabilize. It's readiness is
-*  not verified after the hold-off timeout.
+*  The 130 ms is given for the megahertz crystal to stabilize. Its readiness is
+*  not verified after a hold-off timeout.
 *
 * Parameters:
 *  None
@@ -265,10 +291,10 @@ void CyPmRestoreClocks(void)
         CY_IMO_FREQ_12MHZ, CY_IMO_FREQ_6MHZ,  CY_IMO_FREQ_24MHZ, CY_IMO_FREQ_3MHZ,
         CY_IMO_FREQ_48MHZ, 5u, 6u};
 
-    /* Restore enable state of delay between the system bus clock and ACLKs. */
+    /* Restore enable state of delay between system bus clock and ACLKs. */
     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)
     {
-        /* Delay for both the bandgap and the delay line to settle out */
+        /* Delay for both bandgap and delay line to settle out */
         CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) *
                         CY_PM_GET_CPU_FREQ_MHZ);
 
@@ -279,7 +305,7 @@ void CyPmRestoreClocks(void)
     if(CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState)
     {
         /***********************************************************************
-        * Enabling XMHZ XTAL. The actual CyXTAL_Start() with non zero wait
+        * Enabling XMHZ XTAL. The actual CyXTAL_Start() with a non zero wait
         * period uses FTW for period measurement. This could cause a problem
         * if CTW/FTW is used as a wake up time in the low power modes APIs.
         * So, the XTAL wait procedure is implemented with a software delay.
@@ -309,7 +335,7 @@ void CyPmRestoreClocks(void)
         {
             /*******************************************************************
             * Process the situation when megahertz crystal is not ready.
-            * Time to stabialize value is crystal specific.
+            * Time to stabilize the value is crystal specific.
             *******************************************************************/
            /* `#START_MHZ_ECO_TIMEOUT` */
 
@@ -318,10 +344,10 @@ void CyPmRestoreClocks(void)
     }   /* (CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState) */
 
 
-    /* Temprorary set the maximum flash wait cycles */
+    /* Temprorary set maximum flash wait cycles */
     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);
 
-    /* The XTAL and DSI clocks are ready to be source for Master clock. */
+    /* XTAL and DSI clocks are ready to be source for Master clock. */
     if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||
        (CY_PM_MASTER_CLK_SRC_DSI  == cyPmClockBackup.masterClkSrc))
     {
@@ -366,13 +392,6 @@ void CyPmRestoreClocks(void)
         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);
     }
 
-    /* IMO - restore disable state if needed */
-    if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&
-       (0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))
-    {
-        CyIMO_Stop();
-    }
-
     /* IMO - restore IMOCLK source */
     CyIMO_SetSource(cyPmClockBackup.imoClkSrc);
 
@@ -389,6 +408,7 @@ void CyPmRestoreClocks(void)
                                 cyPmClockBackup.clkImoSrc;
     }
 
+
     /* PLL restore state */
     if(CY_PM_ENABLED == cyPmClockBackup.pllEnableState)
     {
@@ -398,12 +418,38 @@ void CyPmRestoreClocks(void)
         * as a wakeup time in the low power modes APIs. To omit this issue PLL
         * wait procedure is implemented with a software delay.
         ***********************************************************************/
+        status = CYRET_TIMEOUT;
 
         /* Enable PLL */
         (void) CyPLL_OUT_Start(CY_PM_PLL_OUT_NO_WAIT);
 
-        /* Make a 250 us delay */
-        CyDelayCycles((uint32)CY_PM_WAIT_250_US * CY_PM_GET_CPU_FREQ_MHZ);
+        /* Read to clear lock status after delay */
+        CyDelayUs((uint32)80u);
+        (void) CY_PM_FASTCLK_PLL_SR_REG;
+
+        /* It should take 250 us lock: 251-80 = 171 */
+        for(i = 171u; i > 0u; i--)
+        {
+            CyDelayUs((uint32)1u);
+
+            /* Accept PLL is OK after two consecutive polls indicate PLL lock */
+            if((0u != (CY_PM_FASTCLK_PLL_SR_REG & CY_PM_FASTCLK_PLL_LOCKED)) &&
+               (0u != (CY_PM_FASTCLK_PLL_SR_REG & CY_PM_FASTCLK_PLL_LOCKED)))
+            {
+                status = CYRET_SUCCESS;
+                break;
+            }
+        }
+
+        if(CYRET_TIMEOUT == status)
+        {
+            /*******************************************************************
+            * Process the situation when PLL is not ready.
+            *******************************************************************/
+           /* `#START_PLL_TIMEOUT` */
+
+           /* `#END` */
+        }
     }   /* (CY_PM_ENABLED == cyPmClockBackup.pllEnableState) */
 
 
@@ -421,6 +467,13 @@ void CyPmRestoreClocks(void)
         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);
     }
 
+    /* IMO - disable if it was originally disabled */
+    if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&
+       (0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))
+    {
+        CyIMO_Stop();
+    }
+
     /* Bus clock - restore divider, if needed */
     clkBusDivTmp = (uint16) ((uint16)CY_PM_CLK_BUS_MSB_DIV_REG << 8u);
     clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;
@@ -490,7 +543,7 @@ void CyPmRestoreClocks(void)
 *  Sleep Timer component and one second interval should be configured with the
 *  RTC component.
 *
-*  The wakeup behavior depends on wakeupSource parameter in the following
+*  The wakeup behavior depends on the wakeupSource parameter in the following
 *  manner: upon function execution the device will be switched from Active to
 *  Alternate Active mode and then the CPU will be halted. When an enabled wakeup
 *  event occurs the device will return to Active mode.  Similarly when an
@@ -534,7 +587,7 @@ void CyPmRestoreClocks(void)
             For PSoC 3 silicon the valid range of  values is 1 to 256.
 *
 *  wakeUpSource:    Specifies a bitwise mask of wakeup sources. In addition, if
-*                   a wakeupTime has been specified the associated timer will be
+*                   a wakeupTime has been specified, the associated timer will be
 *                   included as a wakeup source.
 *
 *           Define                      Source
@@ -556,13 +609,13 @@ void CyPmRestoreClocks(void)
 *  *Note : FTW and HVI/LVI wakeup signals are in the same mask bit.
 *  **Note: CTW and One PPS wakeup signals are in the same mask bit.
 *
-*  When specifying a Comparator as the wakeupSource an instance specific define
-*  should be used that will track with the specific comparator that the instance
-*  is placed into. As an example, for a Comparator instance named MyComp the
+*  When specifying a Comparator as the wakeupSource, an instance specific define
+*  that will track with the specific comparator that the instance
+*  is placed into should be used. As an example, for a Comparator instance named MyComp the
 *  value to OR into the mask is: MyComp_ctComp__CMP_MASK.
 *
 *  When CTW, FTW or One PPS is used as a wakeup source, the CyPmReadStatus()
-*  function must be called upon wakeup with corresponding parameter. Please
+*  function must be called upon wakeup with a corresponding parameter. Please
 *  refer to the CyPmReadStatus() API in the System Reference Guide for more
 *  information.
 *
@@ -576,7 +629,7 @@ void CyPmRestoreClocks(void)
 *  If a wakeupTime other than NONE is specified, then upon exit the state of the
 *  specified timer will be left as specified by wakeupTime with the timer
 *  enabled and the interrupt disabled.  Also, the ILO 1 KHz (if CTW timer is
-*  used as wakeup time) or ILO 100 KHz (if FTW timer is used as wakeup time)
+*  used as wakeup time) or ILO 100 KHz (if the FTW timer is used as wakeup time)
 *  will be left started.
 *
 *******************************************************************************/
@@ -602,7 +655,7 @@ void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource)
         {
             CyPmFtwSetInterval(PM_ALT_ACT_FTW_INTERVAL(wakeupTime));
 
-            /* Include associated timer to the wakeupSource */
+            /* Include associated timer to wakeupSource */
             wakeupSource |= PM_ALT_ACT_SRC_FTW;
         }
 
@@ -612,7 +665,7 @@ void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource)
             /* Save current CTW configuration and set new one */
             CyPmCtwSetInterval((uint8)(wakeupTime - 1u));
 
-            /* Include associated timer to the wakeupSource */
+            /* Include associated timer to wakeupSource */
             wakeupSource |= PM_ALT_ACT_SRC_CTW;
         }
 
@@ -622,7 +675,7 @@ void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource)
             /* Save current 1PPS configuration and set new one */
             CyPmOppsSet();
 
-            /* Include associated timer to the wakeupSource */
+            /* Include associated timer to wakeupSource */
             wakeupSource |= PM_ALT_ACT_SRC_ONE_PPS;
         }
 
@@ -674,7 +727,7 @@ void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource)
 *  Puts the part into the Sleep state.
 *
 *  Note Before calling this function, you must manually configure the power
-*  mode of the source clocks for the timer that is used as wakeup timer.
+*  mode of the source clocks for the timer that is used as the wakeup timer.
 *
 *  Note Before calling this function, you must prepare clock tree configuration
 *  for the low power mode by calling CyPmSaveClocks(). And restore clock
@@ -685,7 +738,7 @@ void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource)
 *  PSoC 3:
 *  Before switching to Sleep, if a wakeupTime other than NONE is specified,
 *  then the appropriate timer state is configured as specified with the
-*  interrupt for that timer disabled.  The wakeup source will be the combination
+*  interrupt for that timer disabled.  The wakeup source will be a combination
 *  of the values specified in the wakeupSource and any timer specified in the
 *  wakeupTime argument.  Once the wakeup condition is satisfied, then all saved
 *  state is restored and the function returns in the Active state.
@@ -706,7 +759,7 @@ void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource)
 *  The wakeupTime parameter is not used and the only NONE can be specified.
 *  The wakeup time must be configured with the component, SleepTimer for CTW
 *  intervals and RTC for 1PPS interval. The component must be configured to
-*  generate an interrrupt.
+*  generate interrupt.
 *
 * Parameters:
 *  wakeupTime:      Specifies a timer wakeup source and the frequency of that
@@ -780,7 +833,7 @@ void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource)
 *  detect (power supply supervising capabilities) are required in a design
 *  during sleep, use the Central Time Wheel (CTW) to periodically wake the
 *  device, perform software buzz, and refresh the supervisory services. If LVI,
-*  HVI, or Brown Out is not required, then use of the CTW is not required.
+*  HVI, or Brown Out is not required, then CTW is not required.
 *  Refer to the device errata for more information.
 *
 *******************************************************************************/
@@ -816,13 +869,14 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
 
     /***********************************************************************
     * PSoC3 < TO6:
-    * - Hardware buzz must be disabled before sleep mode entry.
+    * - Hardware buzz must be disabled before the sleep mode entry.
     * - Voltage supervision (HVI/LVI) requires hardware buzz, so they must
-    *   be aslo disabled.
+    *   be also disabled.
     *
     * PSoC3 >= TO6:
-    * - Voltage supervision (HVI/LVI) requires hardware buzz, so hardware buzz must be
-    *   enabled before sleep mode entry and restored on wakeup.
+    * - Voltage supervision (HVI/LVI) requires hardware buzz, so hardware
+    *   buzz must be enabled before the sleep mode entry and restored on
+    *   the wakeup.
     ***********************************************************************/
     #if(CY_PSOC3)
 
@@ -860,9 +914,9 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
 
 
     /*******************************************************************************
-    * For ARM-based devices, an interrupt is required for the CPU to wake up. The
+    * For ARM-based devices,interrupt is required for the CPU to wake up. The
     * Power Management implementation assumes that wakeup time is configured with a
-    * separate component (component-based wakeup time configuration) for an
+    * separate component (component-based wakeup time configuration) for
     * interrupt to be issued on terminal count. For more information, refer to the
     * Wakeup Time Configuration section of System Reference Guide.
     *******************************************************************************/
@@ -887,10 +941,10 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
         /* CTW - save current and set new configuration */
         if((wakeupTime >= PM_SLEEP_TIME_CTW_2MS) && (wakeupTime <= PM_SLEEP_TIME_CTW_4096MS))
         {
-            /* Save current and set new configuration of the CTW */
+            /* Save current and set new configuration of CTW */
             CyPmCtwSetInterval((uint8)(wakeupTime - 1u));
 
-            /* Include associated timer to the wakeupSource */
+            /* Include associated timer to wakeupSource */
             wakeupSource |= PM_SLEEP_SRC_CTW;
         }
 
@@ -900,7 +954,7 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
             /* Save current and set new configuration of the 1PPS */
             CyPmOppsSet();
 
-            /* Include associated timer to the wakeupSource */
+            /* Include associated timer to wakeupSource */
             wakeupSource |= PM_SLEEP_SRC_ONE_PPS;
         }
 
@@ -923,8 +977,8 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
 
 
     /*******************************************************************
-    * Do not use merge region below unless any component datasheet
-    * suggest to do so.
+    * Do not use the merge region below unless any component datasheet
+    * suggests doing so.
     *******************************************************************/
     /* `#START CY_PM_JUST_BEFORE_SLEEP` */
 
@@ -949,13 +1003,13 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));
     }
 
-    /* Switch to the Sleep mode */
+    /* Switch to Sleep mode */
     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_SLEEP);
 
     /* Recommended readback. */
     (void) CY_PM_MODE_CSR_REG;
 
-    /* Two recommended NOPs to get into the mode. */
+    /* Two recommended NOPs to get into mode. */
     CY_NOP;
     CY_NOP;
 
@@ -1023,7 +1077,7 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
 *  PSoC 3 and PSoC 5LP:
 *  Before switching to Hibernate, the current status of the PICU wakeup source
 *  bit is saved and then set. This configures the device to wake up from the
-*  PICU. Make sure you have at least one pin configured to generate a PICU
+*  PICU. Make sure you have at least one pin configured to generate PICU
 *  interrupt. For pin Px.y, the register "PICU_INTTYPE_PICUx_INTTYPEy" controls
 *  the PICU behavior. In the TRM, this register is "PICU[0..15]_INTTYPE[0..7]."
 *  In the Pins component datasheet, this register is referred to as the IRQ
@@ -1046,14 +1100,14 @@ void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource)
 *  requirement begins when the device wakes up. There is no hardware check that
 *  this requirement is met. The specified delay should be done on ISR entry.
 *
-*  After wakeup PICU interrupt occurs, the Pin_ClearInterrupt() (where Pin is
+*  After the wakeup PICU interrupt occurs, the Pin_ClearInterrupt() (where Pin is
 *  instance name of the Pins component) function must be called to clear the
-*  latched pin events to allow proper Hibernate mode entry andd to enable
+*  latched pin events to allow the proper Hibernate mode entry and to enable
 *  detection of future events.
 *
 *  The 1 kHz ILO clock is expected to be enabled for PSoC 3 and PSoC 5LP to
 *  measure Hibernate/Sleep regulator settling time after a reset. The holdoff
-*  delay is measured using rising edges of the 1 kHz ILO.
+*  delay is measured using the rising edges of the 1 kHz ILO.
 *
 *******************************************************************************/
 void CyPmHibernate(void) 
@@ -1065,8 +1119,8 @@ void CyPmHibernate(void)
 
         /***********************************************************************
         * The Hibernate/Sleep regulator has a settling time after a reset.
-        * During this time, the system ignores requests to enter Sleep and
-        * Hibernate modes. The holdoff delay is measured using rising edges of
+        * During this time, the system ignores requests to enter the Sleep and
+        * Hibernate modes. The holdoff delay is measured using the rising edges of
         * the 1 kHz ILO.
         ***********************************************************************/
         if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))
@@ -1123,7 +1177,7 @@ void CyPmHibernate(void)
     /* Recommended readback. */
     (void) CY_PM_MODE_CSR_REG;
 
-    /* Two recommended NOPs to get into the mode. */
+    /* Two recommended NOPs to get into mode. */
     CY_NOP;
     CY_NOP;
 
@@ -1193,7 +1247,7 @@ uint8 CyPmReadStatus(uint8 mask)
     /* Enter critical section */
     interruptState = CyEnterCriticalSection();
 
-    /* Save value of the register, copy it and clear desired bit */
+    /* Save value of register, copy it and clear desired bit */
     interruptStatus |= CY_PM_INT_SR_REG;
     tmpStatus = interruptStatus;
     interruptStatus &= ((uint8)(~mask));
@@ -1234,11 +1288,11 @@ static void CyPmHibSaveSet(void)
     if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))
     {
         /***********************************************************************
-        * If I2C backup regulator is enabled, all the fixed-function registers
-        * store their values while device is in low power mode, otherwise their
+        * If the I2C backup regulator is enabled, all the fixed-function registers
+        * store their values while the device is in the low power mode, otherwise their
         * configuration is lost. The I2C API makes a decision to restore or not
         * to restore I2C registers based on this. If this regulator will be
-        * disabled and then enabled, I2C API will suppose that I2C block
+        * disabled and then enabled, I2C API will suppose that the I2C block
         * registers preserved their values, while this is not true. So, the
         * backup regulator is disabled. The I2C sleep APIs is responsible for
         * restoration.
@@ -1289,7 +1343,7 @@ static void CyPmHibSaveSet(void)
 
 
     /***************************************************************************
-    * Save and set power mode wakeup trim registers
+    * Save and set the power mode wakeup trim registers
     ***************************************************************************/
     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;
     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;
@@ -1304,12 +1358,12 @@ static void CyPmHibSaveSet(void)
 ********************************************************************************
 *
 * Summary:
-*  Restore device for proper Hibernate mode exit:
-*  - Restore LVI/HVI configuration - call CyPmHviLviRestore()
+*  Restores the device for the proper Hibernate mode exit:
+*  - Restores LVI/HVI configuration - calsl CyPmHviLviRestore()
 *  - CyPmHibSlpSaveRestore() function is called
-*  - Restores ILO power down mode state and enable it
-*  - Restores state of 1 kHz and 100 kHz ILO and disable them
-*  - Restores sleep regulator settings
+*  - Restores ILO power down mode state and enables it
+*  - Restores the state of 1 kHz and 100 kHz ILO and disables them
+*  - Restores the sleep regulator settings
 *
 * Parameters:
 *  None
@@ -1352,7 +1406,7 @@ static void CyPmHibRestore(void)
 
 
     /***************************************************************************
-    * Restore power mode wakeup trim registers
+    * Restore the power mode wakeup trim registers
     ***************************************************************************/
     CY_PM_PWRSYS_WAKE_TR0_REG = cyPmBackup.wakeupTrim0;
     CY_PM_PWRSYS_WAKE_TR1_REG = cyPmBackup.wakeupTrim1;
@@ -1364,10 +1418,10 @@ static void CyPmHibRestore(void)
 ********************************************************************************
 *
 * Summary:
-*  Performs CTW configuration:
-*  - Disables CTW interrupt
+*  Performs the CTW configuration:
+*  - Disables the CTW interrupt
 *  - Enables 1 kHz ILO
-*  - Sets new CTW interval
+*  - Sets a new CTW interval
 *
 * Parameters:
 *  ctwInterval: the CTW interval to be set.
@@ -1404,11 +1458,11 @@ void CyPmCtwSetInterval(uint8 ctwInterval)
         /* Set CTW interval if needed */
         if(CY_PM_TW_CFG1_REG != ctwInterval)
         {
-            /* Set the new CTW interval. Could be changed if CTW is disabled */
+            /* Set new CTW interval. Could be changed if CTW is disabled */
             CY_PM_TW_CFG1_REG = ctwInterval;
         }   /* Required interval is already set */
 
-        /* Enable the CTW */
+        /* Enable CTW */
         CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;
     }
 }
@@ -1421,7 +1475,7 @@ void CyPmCtwSetInterval(uint8 ctwInterval)
 * Summary:
 *  Performs 1PPS configuration:
 *  - Starts 32 KHz XTAL
-*  - Disables 1PPS interupts
+*  - Disables 1PPS interrupts
 *  - Enables 1PPS
 *
 * Parameters:
@@ -1453,10 +1507,10 @@ void CyPmOppsSet(void)
 ********************************************************************************
 *
 * Summary:
-*  Performs FTW configuration:
-*  - Disables FTW interrupt
+*  Performs the FTW configuration:
+*  - Disables the FTW interrupt
 *  - Enables 100 kHz ILO
-*  - Sets new FTW interval.
+*  - Sets a new FTW interval.
 *
 * Parameters:
 *  ftwInterval - FTW counter interval.
@@ -1465,7 +1519,7 @@ void CyPmOppsSet(void)
 *  None
 *
 * Side Effects:
-*  Enables ILO 100 KHz clock and leaves it enabled.
+*  Enables the ILO 100 KHz clock and leaves it enabled.
 *
 *******************************************************************************/
 void CyPmFtwSetInterval(uint8 ftwInterval) 
@@ -1476,13 +1530,13 @@ void CyPmFtwSetInterval(uint8 ftwInterval)
     /* Enable 100kHz ILO */
     CyILO_Start100K();
 
-    /* Iterval could be set only while FTW is disabled */
+    /* Interval could be set only while FTW is disabled */
     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_FTW_EN))
     {
         /* Disable FTW, set new FTW interval if needed and enable it again */
         if(CY_PM_TW_CFG0_REG != ftwInterval)
         {
-            /* Disable the CTW, set new CTW interval and enable it again */
+            /* Disable CTW, set new CTW interval and enable it again */
             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_EN));
             CY_PM_TW_CFG0_REG = ftwInterval;
             CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;
@@ -1493,11 +1547,11 @@ void CyPmFtwSetInterval(uint8 ftwInterval)
         /* Set new FTW counter interval if needed. FTW is disabled. */
         if(CY_PM_TW_CFG0_REG != ftwInterval)
         {
-            /* Set the new CTW interval. Could be changed if CTW is disabled */
+            /* Set new CTW interval. Could be changed if CTW is disabled */
             CY_PM_TW_CFG0_REG = ftwInterval;
         }   /* Required interval is already set */
 
-        /* Enable the FTW */
+        /* Enable FTW */
         CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;
     }
 }
@@ -1508,12 +1562,12 @@ void CyPmFtwSetInterval(uint8 ftwInterval)
 ********************************************************************************
 *
 * Summary:
-*  This API is used for preparing device for Sleep and Hibernate low power
+*  This API is used for preparing the device for the Sleep and Hibernate low power
 *  modes entry:
-*  - Saves COMP, VIDAC, DSM and SAR routing connections (PSoC 5)
-*  - Saves SC/CT routing connections (PSoC 3/5/5LP)
-*  - Disables Serial Wire Viewer (SWV) (PSoC 3)
-*  - Save boost reference selection and set it to internal
+*  - Saves the COMP, VIDAC, DSM, and SAR routing connections (PSoC 5)
+*  - Saves the SC/CT routing connections (PSoC 3/5/5LP)
+*  - Disables the Serial Wire Viewer (SWV) (PSoC 3)
+*  - Saves the boost reference selection and sets it to internal
 *
 * Parameters:
 *  None
@@ -1643,11 +1697,11 @@ static void CyPmHibSlpSaveSet(void)
 ********************************************************************************
 *
 * Summary:
-*  This API is used for restoring device configurations after wakeup from Sleep
+*  This API is used for restoring the device configurations after wakeup from the Sleep
 *  and Hibernate low power modes:
-*  - Restores SC/CT routing connections
-*  - Restores enable state of Serial Wire Viewer (SWV) (PSoC 3)
-*  - Restore boost reference selection
+*  - Restores the SC/CT routing connections
+*  - Restores the enable state of the Serial Wire Viewer (SWV) (PSoC 3)
+*  - Restores the  boost reference selection
 *
 * Parameters:
 *  None
@@ -1740,7 +1794,7 @@ static void CyPmHviLviSaveDisable(void)
         cyPmBackup.lvidEn = CY_PM_ENABLED;
         cyPmBackup.lvidTrip = CY_VD_LVI_TRIP_REG & CY_VD_LVI_TRIP_LVID_MASK;
 
-        /* Save state of reset device at a specified Vddd threshold */
+        /* Save state of reset device at specified Vddd threshold */
         cyPmBackup.lvidRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESD_EN)) ? \
                              CY_PM_DISABLED : CY_PM_ENABLED;
 
@@ -1756,7 +1810,7 @@ static void CyPmHviLviSaveDisable(void)
         cyPmBackup.lviaEn = CY_PM_ENABLED;
         cyPmBackup.lviaTrip = CY_VD_LVI_TRIP_REG >> 4u;
 
-        /* Save state of reset device at a specified Vdda threshold */
+        /* Save state of reset device at specified Vdda threshold */
         cyPmBackup.lviaRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESA_EN)) ? \
                              CY_PM_DISABLED : CY_PM_ENABLED;
 
@@ -1784,7 +1838,7 @@ static void CyPmHviLviSaveDisable(void)
 ********************************************************************************
 *
 * Summary:
-*  Restores analog and digital LVI and HVI configuration.
+*  Restores the analog and digital LVI and HVI configuration.
 *
 * Parameters:
 *  None

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyPm.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * File Name: cyPm.h
-* Version 4.0
+* Version 4.20
 *
 * Description:
 *  Provides the function definitions for the power management API.
@@ -10,7 +10,7 @@
 *  System Reference Guide provided with PSoC Creator.
 *
 ********************************************************************************
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.
+* Copyright 2008-2014, Cypress Semiconductor Corporation.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions,
 * disclaimers, and limitations in the end user license agreement accompanying
 * the software package with which this file was provided.
@@ -54,7 +54,7 @@ void CyPmOppsSet(void) ;
 
 #if(CY_PSOC3)
 
-    /* Wake up time for the Sleep mode */
+    /* Wake up time for Sleep mode */
     #define PM_SLEEP_TIME_ONE_PPS           (0x01u)
     #define PM_SLEEP_TIME_CTW_2MS           (0x02u)
     #define PM_SLEEP_TIME_CTW_4MS           (0x03u)
@@ -72,7 +72,7 @@ void CyPmOppsSet(void) ;
     /* Difference between parameter's value and register's one */
     #define CY_PM_FTW_INTERVAL_SHIFT        (0x000Eu)
 
-    /* Wake up time for the Alternate Active mode */
+    /* Wake up time for Alternate Active mode */
     #define PM_ALT_ACT_TIME_ONE_PPS         (0x0001u)
     #define PM_ALT_ACT_TIME_CTW_2MS         (0x0002u)
     #define PM_ALT_ACT_TIME_CTW_4MS         (0x0003u)
@@ -91,7 +91,7 @@ void CyPmOppsSet(void) ;
 #endif  /* (CY_PSOC3) */
 
 
-/* Wake up sources for the Sleep mode */
+/* Wake up sources for Sleep mode */
 #define PM_SLEEP_SRC_COMPARATOR0        (0x0001u)
 #define PM_SLEEP_SRC_COMPARATOR1        (0x0002u)
 #define PM_SLEEP_SRC_COMPARATOR2        (0x0004u)
@@ -104,7 +104,7 @@ void CyPmOppsSet(void) ;
 #define PM_SLEEP_SRC_ONE_PPS            (0x0800u)
 #define PM_SLEEP_SRC_LCD                (0x1000u)
 
-/* Wake up sources for the Alternate Active mode */
+/* Wake up sources for Alternate Active mode */
 #define PM_ALT_ACT_SRC_COMPARATOR0      (0x0001u)
 #define PM_ALT_ACT_SRC_COMPARATOR1      (0x0002u)
 #define PM_ALT_ACT_SRC_COMPARATOR2      (0x0004u)
@@ -145,7 +145,7 @@ void CyPmOppsSet(void) ;
 #define     CY_PM_MHZ_XTAL_WAIT_NUM_OF_200_US   (5u)
 
 
-/* Delay line bandgap current settling time starting from a wakeup event */
+/* Delay line bandgap current settling time starting from wakeup event */
 #define     CY_PM_CLK_DELAY_BANDGAP_SETTLE_US       (50u)
 
 /* Delay line internal bias settling */
@@ -177,7 +177,7 @@ void CyPmOppsSet(void) ;
 
 #if(CY_PSOC5)
 
-    /* The CPU clock is directly derived from bus clock */
+    /* CPU clock is directly derived from bus clock */
     #define     CY_PM_GET_CPU_FREQ_MHZ (cyPmImoFreqReg2Mhz[CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK])
 
 #endif  /* (CY_PSOC5) */
@@ -186,7 +186,7 @@ void CyPmOppsSet(void) ;
 /*******************************************************************************
 * The low power mode entry is different for PSoC 3 and PSoC 5 devices. The low
 * power modes in PSoC 5 devices are invoked by Wait-For-Interrupt (WFI)
-* instruction. The ARM compilers has __wfi() instristic that inserts a WFI
+* instruction. The ARM compilers has __wfi() intrinsic that inserts a WFI
 * instruction into the instruction stream generated by the compiler. The GCC
 * compiler has to execute assembly language instruction.
 *******************************************************************************/
@@ -219,7 +219,7 @@ void CyPmOppsSet(void) ;
 /*******************************************************************************
 * This macro defines the IMO frequency that will be set by CyPmSaveClocks()
 * function based on Enable Fast IMO during Startup option from the DWR file.
-* The CyPmSleep()/CyPmHibernate() will set IMO 12 MHz just before entering
+* The CyPmSleep()/CyPmHibernate() will set IMO 12 MHz just before entering the
 * low power mode and restore IMO back to the value set by CyPmSaveClocks()
 * immediately on wakeup.
 *******************************************************************************/
@@ -243,7 +243,7 @@ typedef struct cyPmClockBackupStruct
     /* CyPmSaveClocks()/CyPmRestoreClocks() */
     uint8  enClkA;              /* Analog clocks enable         */
     uint8  enClkD;              /* Digital clocks enable        */
-    uint8  masterClkSrc;        /* The Master clock source      */
+    uint8  masterClkSrc;        /* Master clock source          */
     uint8  imoFreq;             /* IMO frequency (reg's value)  */
     uint8  imoUsbClk;           /* IMO USB CLK (reg's value)    */
     uint8  flashWaitCycles;     /* Flash wait cycles            */
@@ -252,7 +252,7 @@ typedef struct cyPmClockBackupStruct
     uint8  clkImoSrc;
     uint8  imo2x;               /* IMO doubler enable state     */
     uint8  clkSyncDiv;          /* Master clk divider           */
-    uint16 clkBusDiv;           /* The clk_bus divider          */
+    uint16 clkBusDiv;           /* clk_bus divider              */
     uint8  pllEnableState;      /* PLL enable state             */
     uint8  xmhzEnableState;     /* XM HZ enable state           */
     uint8  clkDistDelay;        /* Delay for clk_bus and ACLKs  */
@@ -472,6 +472,14 @@ typedef struct cyPmBackupStruct
 #define CY_PM_BOOST_CR2_REG           (* (reg8 *) CYREG_BOOST_CR2 )
 #define CY_PM_BOOST_CR2_PTR           (  (reg8 *) CYREG_BOOST_CR2 )
 
+#if(CY_PSOC3)
+
+    /* Interrrupt Controller Configuration and Status Register */
+    #define CY_PM_INTC_CSR_EN_REG           (* (reg8 *) CYREG_INTC_CSR_EN )
+    #define CY_PM_INTC_CSR_EN_PTR           (  (reg8 *) CYREG_INTC_CSR_EN )
+
+#endif  /* (CY_PSOC3) */
+
 
 /***************************************
 * Register Constants
@@ -521,7 +529,12 @@ typedef struct cyPmBackupStruct
 #define CY_PM_CLKDIST_IMO_OUT_IMO       (0x00u)
 #define CY_PM_CLKDIST_IMO2X_SRC         (0x40u)
 
-/* Waiting for the hibernate/sleep regulator to stabilize */
+#define CY_PM_CLKDIST_PLL_SRC_MASK      (0x03u)
+#define CY_PM_CLKDIST_PLL_SRC_IMO       (0x00u)
+#define CY_PM_CLKDIST_PLL_SRC_XTAL      (0x01u)
+#define CY_PM_CLKDIST_PLL_SRC_DSI       (0x02u)
+
+/* Waiting for hibernate/sleep regulator to stabilize */
 #define CY_PM_MODE_CSR_PWRUP_PULSE_Q    (0x08u)
 
 #define CY_PM_MODE_CSR_ACTIVE           (0x00u)     /* Active power mode      */
@@ -533,10 +546,10 @@ typedef struct cyPmBackupStruct
 /* I2C regulator backup enable */
 #define CY_PM_PWRSYS_CR1_I2CREG_BACKUP  (0x04u)
 
-/* When set, prepares the system to disable the LDO-A */
+/* When set, prepares system to disable LDO-A */
 #define CY_PM_PWRSYS_CR1_LDOA_ISO       (0x01u)
 
-/* When set, disables the analog LDO regulator */
+/* When set, disables analog LDO regulator */
 #define CY_PM_PWRSYS_CR1_LDOA_DIS       (0x02u)
 
 #define CY_PM_PWRSYS_WAKE_TR2_VCCD_CLK_DET  (0x04u)
@@ -554,19 +567,19 @@ typedef struct cyPmBackupStruct
 /* Bus Clock divider to divide-by-one */
 #define CY_PM_BUS_CLK_DIV_BY_ONE        (0x00u)
 
-/* HVI/LVI feature on the external analog and digital supply mask */
+/* HVI/LVI feature on external analog and digital supply mask */
 #define CY_PM_RESET_CR1_HVI_LVI_EN_MASK (0x07u)
 
-/* The high-voltage-interrupt feature on the external analog supply */
+/* High-voltage-interrupt feature on external analog supply */
 #define CY_PM_RESET_CR1_HVIA_EN         (0x04u)
 
-/* The low-voltage-interrupt feature on the external analog supply */
+/* Low-voltage-interrupt feature on external analog supply */
 #define CY_PM_RESET_CR1_LVIA_EN         (0x02u)
 
-/* The low-voltage-interrupt feature on the external digital supply */
+/* Low-voltage-interrupt feature on external digital supply */
 #define CY_PM_RESET_CR1_LVID_EN         (0x01u)
 
-/* Allows the system to program delays on clk_sync_d */
+/* Allows system to program delays on clk_sync_d */
 #define CY_PM_CLKDIST_DELAY_EN          (0x04u)
 
 
@@ -595,7 +608,7 @@ typedef struct cyPmBackupStruct
 #endif  /* (CY_PSOC3) */
 
 
-/* Disable the sleep regulator and shorts vccd to vpwrsleep */
+/* Disables sleep regulator and shorts vccd to vpwrsleep */
 #define CY_PM_PWRSYS_SLP_TR_BYPASS          (0x10u)
 
 /* Boost Control 2: Select external precision reference */
@@ -615,9 +628,37 @@ typedef struct cyPmBackupStruct
 
 #endif  /* (CY_PSOC5) */
 
+#if(CY_PSOC3)
+
+    /* Interrrupt Controller Configuration and Status Register */
+    #define CY_PM_INTC_CSR_EN_CLK       (0x01u)
+
+#endif  /* (CY_PSOC3) */
+
+
+/*******************************************************************************
+* Lock Status Flag. If lock is acquired this flag will stay set (regardless of
+* whether lock is subsequently lost) until it is read. Upon reading it will
+* clear. If lock is still true then the bit will simply set again. If lock
+* happens to be false when the clear on read occurs then the bit will stay
+* cleared until the next lock event.
+*******************************************************************************/
+#define CY_PM_FASTCLK_PLL_LOCKED       (0x01u)
+
 
 /*******************************************************************************
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.30
+* The following code is OBSOLETE and must not be used starting with cy_boot 3.30
+*
+* If the obsoleted macro definitions intended for use in the application use the
+* following scheme, redefine your own versions of these definitions:
+*    #ifdef <OBSOLETED_DEFINE>
+*        #undef  <OBSOLETED_DEFINE>
+*        #define <OBSOLETED_DEFINE>      (<New Value>)
+*    #endif
+*
+* Note: Redefine obsoleted macro definitions with caution. They might still be
+*       used in the application and their modification might lead to unexpected
+*       consequences.
 *******************************************************************************/
 #if(CY_PSOC3)
 

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cybootloader.icf

@@ -1,3 +1,3 @@
 /* GENERATED CODE -- CHANGES WILL BE OVERWRITTEN */
 
-define symbol CYDEV_BTLDR_SIZE = 0x00002300;
+define symbol CYDEV_BTLDR_SIZE = 0x00002400;

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevice.h

@@ -1,7 +1,7 @@
 /*******************************************************************************
 * FILENAME: cydevice.h
 * OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 3.0 Component Pack 7
+* PSoC Creator  3.1
 *
 * DESCRIPTION:
 * This file provides all of the address values for the entire PSoC device.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevice_trm.h

@@ -1,7 +1,7 @@
 /*******************************************************************************
 * FILENAME: cydevice_trm.h
 * 
-* PSoC Creator 3.0 Component Pack 7
+* PSoC Creator  3.1
 *
 * DESCRIPTION:
 * This file provides all of the address values for the entire PSoC device.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicegnu.inc

@@ -1,7 +1,7 @@
 /*******************************************************************************
 * FILENAME: cydevicegnu.inc
 * OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator 3.0 Component Pack 7
+* PSoC Creator  3.1
 *
 * DESCRIPTION:
 * This file provides all of the address values for the entire PSoC device.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicegnu_trm.inc

@@ -1,7 +1,7 @@
 /*******************************************************************************
 * FILENAME: cydevicegnu_trm.inc
 * 
-* PSoC Creator 3.0 Component Pack 7
+* PSoC Creator  3.1
 *
 * DESCRIPTION:
 * This file provides all of the address values for the entire PSoC device.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydeviceiar.inc

@@ -1,7 +1,7 @@
 ;
 ; FILENAME: cydeviceiar.inc
 ; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 3.0 Component Pack 7
+; PSoC Creator  3.1
 ;
 ; DESCRIPTION:
 ; This file provides all of the address values for the entire PSoC device.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydeviceiar_trm.inc

@@ -1,7 +1,7 @@
 ;
 ; FILENAME: cydeviceiar_trm.inc
 ; 
-; PSoC Creator 3.0 Component Pack 7
+; PSoC Creator  3.1
 ;
 ; DESCRIPTION:
 ; This file provides all of the address values for the entire PSoC device.

lib/SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicerv.inc

@@ -1,7 +1,7 @@
 ;
 ; FILENAME: cydevicerv.inc
 ; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator 3.0 Component Pack 7
+; PSoC Creator  3.1
 ;
 ; DESCRIPTION:
 ; This file provides all of the address values for the entire PSoC device.