H. Peter Anvin
|
aac953ed19
Implement FPGA <-> ESP32 communication path
|
2 anni fa |
H. Peter Anvin
|
8b67b5db30
spirom: fix SPI ROM I/O and data downloading
|
2 anni fa |
H. Peter Anvin
|
8eec9b9e0a
Timing improvements; allow SRAM to be read over JTAG
|
2 anni fa |
H. Peter Anvin
|
60be2e1201
v2: v2 has a 16 MHz oscillator instead of 48 MHz
|
3 anni fa |
H. Peter Anvin
|
6db45e74e6
WIP: build both v1 and v2
|
3 anni fa |
H. Peter Anvin
|
75a6dbc7fa
fpga: infrastructure for building v1 and v2 FPGA
|
3 anni fa |