H. Peter Anvin 1836d0830b httpd: disable DEBUG 2 vuotta sitten
..
bsdl 50f7f572a3 WIP: ringbuffer system between ESP32 and FPGA 2 vuotta sitten
ip ee45852b85 Full infrastructure for updating flash via JTAG SVF 2 vuotta sitten
output 1836d0830b httpd: disable DEBUG 2 vuotta sitten
scripts 835310c76e update: .fw file is a single compressed container; simplify I/O code 2 vuotta sitten
simulation f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again 3 vuotta sitten
usb 969d145878 fw: propagate board_info from ESP32 to FPGA 2 vuotta sitten
.gitignore ee45852b85 Full infrastructure for updating flash via JTAG SVF 2 vuotta sitten
Makefile 75e32256b8 fw: add ability to write a board ID string in ESP flash 2 vuotta sitten
abcbus.sv 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC 2 vuotta sitten
assignment_defaults.qdf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 vuotta sitten
bootldr.sv e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI 2 vuotta sitten
bypass.pins f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 2 vuotta sitten
bypass.qsf f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 2 vuotta sitten
bypass.sdc f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 2 vuotta sitten
bypass.sv f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 2 vuotta sitten
bypass_description.txt f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 2 vuotta sitten
clkbuf.sv 808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs 3 vuotta sitten
deglitch.sv a69847d434 fpga: add deglitcher core 2 vuotta sitten
esp.sv 54aa67c9dd esplink: change to 7 interrupt/status bits per direction 2 vuotta sitten
fast_mem.sv 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC 2 vuotta sitten
fpgarst.sv ee45852b85 Full infrastructure for updating flash via JTAG SVF 2 vuotta sitten
functions.sv 54aa67c9dd esplink: change to 7 interrupt/status bits per direction 2 vuotta sitten
i2c.sv 4970fb6ef6 rtc: issue dummy clock cycles if SDA appears stuck 3 vuotta sitten
iodevs.vh 835310c76e update: .fw file is a single compressed container; simplify I/O code 2 vuotta sitten
jic.cof.xml ee45852b85 Full infrastructure for updating flash via JTAG SVF 2 vuotta sitten
max80.qpf 969d145878 fw: propagate board_info from ESP32 to FPGA 2 vuotta sitten
max80.qsf 50f7f572a3 WIP: ringbuffer system between ESP32 and FPGA 2 vuotta sitten
max80.sdc 8b67b5db30 spirom: fix SPI ROM I/O and data downloading 2 vuotta sitten
max80.sv 1917765d2f picorv32: add support for multiple user CPU contexts 2 vuotta sitten
picorv32.v 1917765d2f picorv32: add support for multiple user CPU contexts 2 vuotta sitten
pof.cof.xml ee45852b85 Full infrastructure for updating flash via JTAG SVF 2 vuotta sitten
reconfig.svf 4803e910d3 fpga: .svf file to force a FPGA reconfiguration 2 vuotta sitten
rng.sv de1566292f clocks: centralize strobes; rng: shut down when not in use 3 vuotta sitten
sdcard.sv ec99762a84 Use waitirq rather than suspending a memory transaction for SD card 3 vuotta sitten
sdram.sv 0271d1979a sdram: return start to the right subunit; add ABC-bus latency counter 2 vuotta sitten
serial.sv f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 2 vuotta sitten
spi_master.sv 062a3d9eb1 Reorganize tree so a single Makefile can do the right thing 3 vuotta sitten
spirom.sv ee45852b85 Full infrastructure for updating flash via JTAG SVF 2 vuotta sitten
synchro.sv 4e65673781 spirom: add support for sending arbitrary SPI commands 3 vuotta sitten
sysclock.sv 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC 2 vuotta sitten
tmdsenc.sv 74d9da52b0 hdmi/tmds: fix symbol data ordering 3 vuotta sitten
transpose.sv 510e702728 video: initial simple video generator; add support for HDMI TERC4 3 vuotta sitten
ub.tcl 2ec75f1807 fpga: virtual JTAG interface 2 vuotta sitten
v1.pins aac953ed19 Implement FPGA <-> ESP32 communication path 2 vuotta sitten
v1.qsf e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI 2 vuotta sitten
v1.sv 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC 2 vuotta sitten
v1_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 vuotta sitten
v2.pins aac953ed19 Implement FPGA <-> ESP32 communication path 2 vuotta sitten
v2.qsf 1725fbb91d ESP32 code for FPGA link; test code and fixes 2 vuotta sitten
v2.sv e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI 2 vuotta sitten
v2.vh aac953ed19 Implement FPGA <-> ESP32 communication path 2 vuotta sitten
v2_common.qsf e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI 2 vuotta sitten
v2_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 vuotta sitten
v2boot.sv e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI 2 vuotta sitten
video.sv 980eaf0400 Restructure clock tree; better sdram timing; random number generator 3 vuotta sitten
vjtag_max80.sv 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC 2 vuotta sitten