 H. Peter Anvin
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2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1
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hai 1 ano |
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H. Peter Anvin
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aac953ed19
Implement FPGA <-> ESP32 communication path
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%!s(int64=2) %!d(string=hai) anos |
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H. Peter Anvin
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8b67b5db30
spirom: fix SPI ROM I/O and data downloading
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%!s(int64=2) %!d(string=hai) anos |
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H. Peter Anvin
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8eec9b9e0a
Timing improvements; allow SRAM to be read over JTAG
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%!s(int64=2) %!d(string=hai) anos |
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H. Peter Anvin
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60be2e1201
v2: v2 has a 16 MHz oscillator instead of 48 MHz
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%!s(int64=3) %!d(string=hai) anos |
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H. Peter Anvin
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6db45e74e6
WIP: build both v1 and v2
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%!s(int64=3) %!d(string=hai) anos |
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H. Peter Anvin
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75a6dbc7fa
fpga: infrastructure for building v1 and v2 FPGA
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%!s(int64=3) %!d(string=hai) anos |
