H. Peter Anvin 48456c70c1 Merge branch 'v1.2.x' hai 1 semana
..
int_osc 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
vjtag 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
abcmapram.qip 9005376e47 Enable up to 8 ABC memory maps; additional romhack control registers hai 1 ano
abcmapram.v 9005376e47 Enable up to 8 ABC memory maps; additional romhack control registers hai 1 ano
altera_remote_update_core.v 37de408c19 Allow the CPU to force an FPGA reload; vjtag improvement %!s(int64=2) %!d(string=hai) anos
ddio_out.qip bf1976441c Add *.qip files %!s(int64=3) %!d(string=hai) anos
ddio_out.v 062a3d9eb1 Reorganize tree so a single Makefile can do the right thing %!s(int64=3) %!d(string=hai) anos
ddufifo.qip bf1976441c Add *.qip files %!s(int64=3) %!d(string=hai) anos
ddufifo.v 6ae39aaf12 Make romcopy device programmable and able to zero memory %!s(int64=3) %!d(string=hai) anos
dirtyram.qip 80ad2f4a50 fpga: dirty bit tracking for SDRAM hai 1 ano
dirtyram.v 80ad2f4a50 fpga: dirty bit tracking for SDRAM hai 1 ano
fifo.qip adf6c39024 serial: simplify physical tty and make BREAK reset work %!s(int64=3) %!d(string=hai) anos
fifo.v adf6c39024 serial: simplify physical tty and make BREAK reset work %!s(int64=3) %!d(string=hai) anos
hdmitx.qip bf1976441c Add *.qip files %!s(int64=3) %!d(string=hai) anos
hdmitx.v 980eaf0400 Restructure clock tree; better sdram timing; random number generator %!s(int64=3) %!d(string=hai) anos
int_osc.qsys 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
int_osc.sopcinfo 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
pll2_16.qip 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
pll2_16.v 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
pll2_48.qip 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
pll2_48.v 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
pll3.qip bf1976441c Add *.qip files %!s(int64=3) %!d(string=hai) anos
pll3.v 3dfb6626a1 More clock tree changes; fix rng oscillator sources %!s(int64=3) %!d(string=hai) anos
pll4.qip bf1976441c Add *.qip files %!s(int64=3) %!d(string=hai) anos
pll4.v 3dfb6626a1 More clock tree changes; fix rng oscillator sources %!s(int64=3) %!d(string=hai) anos
statusram.qip bf1976441c Add *.qip files %!s(int64=3) %!d(string=hai) anos
statusram.v 6798b92c04 Simple disk cache; add missing files %!s(int64=3) %!d(string=hai) anos
vjtag.qsys 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana
vjtag.sopcinfo 3bff988d7b Forward port and rebuild with Quartus 23.1 hai 1 semana