ABC80/max80_fw @ 9ac4e30722025b373757352640a7a813bc9798b1

H. Peter Anvin 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC		2 jaren geleden
..
bsdl	50f7f572a3 WIP: ringbuffer system between ESP32 and FPGA	2 jaren geleden
ip	ee45852b85 Full infrastructure for updating flash via JTAG SVF	2 jaren geleden
output	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
scripts	835310c76e update: .fw file is a single compressed container; simplify I/O code	2 jaren geleden
simulation	f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again	3 jaren geleden
usb	4d4291d637 usb: fix descriptor regeneration; add name strings to individual ports	2 jaren geleden
.gitignore	ee45852b85 Full infrastructure for updating flash via JTAG SVF	2 jaren geleden
Makefile	8a98d85fa5 Integrate esp32 build using arduino-cli; www contents in zip file (WIP)	2 jaren geleden
abcbus.sv	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
assignment_defaults.qdf	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 jaren geleden
bootldr.sv	e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI	2 jaren geleden
bypass.pins	f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32	2 jaren geleden
bypass.qsf	f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32	2 jaren geleden
bypass.sdc	f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32	2 jaren geleden
bypass.sv	f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32	2 jaren geleden
bypass_description.txt	f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32	2 jaren geleden
clkbuf.sv	808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs	3 jaren geleden
deglitch.sv	a69847d434 fpga: add deglitcher core	2 jaren geleden
esp.sv	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
fast_mem.sv	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
fpgarst.sv	ee45852b85 Full infrastructure for updating flash via JTAG SVF	2 jaren geleden
functions.sv	f2060589ab Default baud rate = 115200, baud rate programmable	3 jaren geleden
i2c.sv	4970fb6ef6 rtc: issue dummy clock cycles if SDA appears stuck	3 jaren geleden
iodevs.vh	835310c76e update: .fw file is a single compressed container; simplify I/O code	2 jaren geleden
jic.cof.xml	ee45852b85 Full infrastructure for updating flash via JTAG SVF	2 jaren geleden
max80.qpf	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
max80.qsf	50f7f572a3 WIP: ringbuffer system between ESP32 and FPGA	2 jaren geleden
max80.sdc	8b67b5db30 spirom: fix SPI ROM I/O and data downloading	2 jaren geleden
max80.sv	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
picorv32.v	2ec75f1807 fpga: virtual JTAG interface	2 jaren geleden
pof.cof.xml	ee45852b85 Full infrastructure for updating flash via JTAG SVF	2 jaren geleden
reconfig.svf	4803e910d3 fpga: .svf file to force a FPGA reconfiguration	2 jaren geleden
rng.sv	de1566292f clocks: centralize strobes; rng: shut down when not in use	3 jaren geleden
sdcard.sv	ec99762a84 Use waitirq rather than suspending a memory transaction for SD card	3 jaren geleden
sdram.sv	0271d1979a sdram: return start to the right subunit; add ABC-bus latency counter	2 jaren geleden
serial.sv	f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32	2 jaren geleden
spi_master.sv	062a3d9eb1 Reorganize tree so a single Makefile can do the right thing	3 jaren geleden
spirom.sv	ee45852b85 Full infrastructure for updating flash via JTAG SVF	2 jaren geleden
synchro.sv	4e65673781 spirom: add support for sending arbitrary SPI commands	3 jaren geleden
sysclock.sv	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
tmdsenc.sv	74d9da52b0 hdmi/tmds: fix symbol data ordering	3 jaren geleden
transpose.sv	510e702728 video: initial simple video generator; add support for HDMI TERC4	3 jaren geleden
ub.tcl	2ec75f1807 fpga: virtual JTAG interface	2 jaren geleden
v1.pins	aac953ed19 Implement FPGA <-> ESP32 communication path	2 jaren geleden
v1.qsf	e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI	2 jaren geleden
v1.sv	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden
v1_description.txt	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 jaren geleden
v2.pins	aac953ed19 Implement FPGA <-> ESP32 communication path	2 jaren geleden
v2.qsf	1725fbb91d ESP32 code for FPGA link; test code and fixes	2 jaren geleden
v2.sv	e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI	2 jaren geleden
v2.vh	aac953ed19 Implement FPGA <-> ESP32 communication path	2 jaren geleden
v2_common.qsf	e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI	2 jaren geleden
v2_description.txt	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 jaren geleden
v2boot.sv	e05dbe6f40 v2boot: simple boot loader connecting ESP32-SPI to flash-SPI	2 jaren geleden
video.sv	980eaf0400 Restructure clock tree; better sdram timing; random number generator	3 jaren geleden
vjtag_max80.sv	9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC	2 jaren geleden