H. Peter Anvin 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC il y a 2 ans
..
fatfs ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion il y a 3 ans
include ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion il y a 3 ans
roms d2951ecd94 spirom: issue the right 1-bit command; update ufddos80.rom il y a 2 ans
test d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
zlib b3a3490ca5 rv32: build zlib il y a 2 ans
.gitignore b1552eac65 ioregs.pl: add missing script file il y a 3 ans
Makefile 99c9b0ccc3 Better timezone handling; upload helper scripts il y a 2 ans
abcdisk.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
abcdrive.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
abcio.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
abcio.h 50d3a0c3bc usb: timing fixes in the status and IRQ paths il y a 3 ans
abcmem.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
abcpun80.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
abcrtc.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
checksum.h 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC il y a 2 ans
checksum.pl 9471dad838 Move date stamp generation to fpga build; record SDRAM checksum il y a 2 ans
common.h 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC il y a 2 ans
compiler.h 50f7f572a3 WIP: ringbuffer system between ESP32 and FPGA il y a 2 ans
console.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
console.h 6375646603 update: get closer to a working JTAG update infrastructure il y a 2 ans
die.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
diskcache.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
dummy.c ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion il y a 3 ans
esp.c 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC il y a 2 ans
esplink.h 832c07c31f Have ESP issue a handshake interrupt; some common link code il y a 2 ans
head.S 3847060a6e Merge esplink work with mainline il y a 2 ans
io.h ee45852b85 Full infrastructure for updating flash via JTAG SVF il y a 2 ans
iodeva.h 5b686b909a ioregs: export I/O register address as symbols il y a 3 ans
ioregs.h 1725fbb91d ESP32 code for FPGA link; test code and fixes il y a 2 ans
ioregs.pl b1552eac65 ioregs.pl: add missing script file il y a 3 ans
ioregsa.pl 5b686b909a ioregs: export I/O register address as symbols il y a 3 ans
irq.h 2e7c547f79 flash update: handle data from a memory buffer; add header il y a 2 ans
irqasm.S ee45852b85 Full infrastructure for updating flash via JTAG SVF il y a 2 ans
irqtable.S 1db3d07425 PUN80 emulation, per-channel IRQ handlers, TTY IRQ polarity control il y a 3 ans
jtagupd.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
jtagupd.ld 3847060a6e Merge esplink work with mainline il y a 2 ans
list.h d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
max80.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
max80.ld 3847060a6e Merge esplink work with mainline il y a 2 ans
memcpy.S f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 il y a 2 ans
memset.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
picorv32.h 372899ea3b Move most code to SDRAM; fix problems with code in SDRAM; cleanups il y a 3 ans
rom.S ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion il y a 3 ans
romcopy.c 50f7f572a3 WIP: ringbuffer system between ESP32 and FPGA il y a 2 ans
rtc.c 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC il y a 2 ans
runtest.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
sbrk.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
sdcard.c 2e544bb970 sdcard: reinitialize on system (soft) reset il y a 3 ans
sdcard.h d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
spiflash.c 835310c76e update: .fw file is a single compressed container; simplify I/O code il y a 2 ans
spiflash.h 835310c76e update: .fw file is a single compressed container; simplify I/O code il y a 2 ans
spurious_irq.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
start_test.S ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion il y a 3 ans
sys.h ee45852b85 Full infrastructure for updating flash via JTAG SVF il y a 2 ans
system.c d0c6ce11ed rv32: rename fw.h -> common.h for consistency il y a 2 ans
systime.h 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC il y a 2 ans
testdata.S ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion il y a 3 ans
testimg.S ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion il y a 3 ans