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fatfs
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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%!s(int64=3) %!d(string=hai) anos |
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include
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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%!s(int64=3) %!d(string=hai) anos |
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roms
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d2951ecd94
spirom: issue the right 1-bit command; update ufddos80.rom
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%!s(int64=2) %!d(string=hai) anos |
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test
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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zlib
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b3a3490ca5
rv32: build zlib
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%!s(int64=2) %!d(string=hai) anos |
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.gitignore
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b1552eac65
ioregs.pl: add missing script file
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%!s(int64=3) %!d(string=hai) anos |
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Makefile
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99c9b0ccc3
Better timezone handling; upload helper scripts
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%!s(int64=2) %!d(string=hai) anos |
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abcdisk.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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abcdrive.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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abcio.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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abcio.h
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50d3a0c3bc
usb: timing fixes in the status and IRQ paths
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%!s(int64=3) %!d(string=hai) anos |
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abcmem.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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abcpun80.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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abcrtc.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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checksum.h
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9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
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%!s(int64=2) %!d(string=hai) anos |
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checksum.pl
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9471dad838
Move date stamp generation to fpga build; record SDRAM checksum
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%!s(int64=2) %!d(string=hai) anos |
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common.h
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9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
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%!s(int64=2) %!d(string=hai) anos |
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compiler.h
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50f7f572a3
WIP: ringbuffer system between ESP32 and FPGA
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%!s(int64=2) %!d(string=hai) anos |
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console.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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console.h
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6375646603
update: get closer to a working JTAG update infrastructure
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%!s(int64=2) %!d(string=hai) anos |
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die.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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diskcache.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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dummy.c
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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%!s(int64=3) %!d(string=hai) anos |
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esp.c
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9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
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%!s(int64=2) %!d(string=hai) anos |
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esplink.h
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832c07c31f
Have ESP issue a handshake interrupt; some common link code
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%!s(int64=2) %!d(string=hai) anos |
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head.S
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3847060a6e
Merge esplink work with mainline
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%!s(int64=2) %!d(string=hai) anos |
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io.h
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ee45852b85
Full infrastructure for updating flash via JTAG SVF
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%!s(int64=2) %!d(string=hai) anos |
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iodeva.h
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5b686b909a
ioregs: export I/O register address as symbols
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%!s(int64=3) %!d(string=hai) anos |
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ioregs.h
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1725fbb91d
ESP32 code for FPGA link; test code and fixes
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%!s(int64=2) %!d(string=hai) anos |
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ioregs.pl
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b1552eac65
ioregs.pl: add missing script file
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%!s(int64=3) %!d(string=hai) anos |
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ioregsa.pl
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5b686b909a
ioregs: export I/O register address as symbols
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%!s(int64=3) %!d(string=hai) anos |
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irq.h
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2e7c547f79
flash update: handle data from a memory buffer; add header
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%!s(int64=2) %!d(string=hai) anos |
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irqasm.S
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ee45852b85
Full infrastructure for updating flash via JTAG SVF
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%!s(int64=2) %!d(string=hai) anos |
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irqtable.S
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1db3d07425
PUN80 emulation, per-channel IRQ handlers, TTY IRQ polarity control
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%!s(int64=3) %!d(string=hai) anos |
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jtagupd.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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jtagupd.ld
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3847060a6e
Merge esplink work with mainline
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%!s(int64=2) %!d(string=hai) anos |
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list.h
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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max80.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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max80.ld
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3847060a6e
Merge esplink work with mainline
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%!s(int64=2) %!d(string=hai) anos |
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memcpy.S
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f1e04bf5c7
esp32 firmware image with support for OTA updates of both FPGA and ESP32
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%!s(int64=2) %!d(string=hai) anos |
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memset.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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picorv32.h
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372899ea3b
Move most code to SDRAM; fix problems with code in SDRAM; cleanups
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%!s(int64=3) %!d(string=hai) anos |
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rom.S
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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%!s(int64=3) %!d(string=hai) anos |
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romcopy.c
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50f7f572a3
WIP: ringbuffer system between ESP32 and FPGA
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%!s(int64=2) %!d(string=hai) anos |
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rtc.c
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9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
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%!s(int64=2) %!d(string=hai) anos |
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runtest.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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sbrk.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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sdcard.c
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2e544bb970
sdcard: reinitialize on system (soft) reset
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%!s(int64=3) %!d(string=hai) anos |
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sdcard.h
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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spiflash.c
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835310c76e
update: .fw file is a single compressed container; simplify I/O code
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%!s(int64=2) %!d(string=hai) anos |
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spiflash.h
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835310c76e
update: .fw file is a single compressed container; simplify I/O code
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%!s(int64=2) %!d(string=hai) anos |
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spurious_irq.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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start_test.S
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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%!s(int64=3) %!d(string=hai) anos |
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sys.h
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ee45852b85
Full infrastructure for updating flash via JTAG SVF
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%!s(int64=2) %!d(string=hai) anos |
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system.c
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d0c6ce11ed
rv32: rename fw.h -> common.h for consistency
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%!s(int64=2) %!d(string=hai) anos |
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systime.h
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9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
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%!s(int64=2) %!d(string=hai) anos |
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testdata.S
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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%!s(int64=3) %!d(string=hai) anos |
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testimg.S
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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%!s(int64=3) %!d(string=hai) anos |
H. Peter Anvin
9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC