 H. Peter Anvin
|
78fb11f073
fpga, rv32: Add custom atomic instructions lw.l/sw.u
|
il y a 1 an |
|
H. Peter Anvin
|
3672b35b21
picorv32: export user_context and addr[1:0] to outside bus
|
il y a 1 an |
|
H. Peter Anvin
|
ea69fdc29b
fpga/picorv32: fix waitirq instructions after changes
|
il y a 1 an |
|
H. Peter Anvin
|
2ec1af473b
picorv32: further IRQ latency improvements; regenerate with Quartus 22.1
|
il y a 1 an |
|
H. Peter Anvin
|
bf9aa45886
riscv32: add the ctz instruction for better interrupt latency
|
il y a 1 an |
|
H. Peter Anvin
|
1917765d2f
picorv32: add support for multiple user CPU contexts
|
il y a 2 ans |
|
H. Peter Anvin
|
2ec75f1807
fpga: virtual JTAG interface
|
il y a 2 ans |
|
H. Peter Anvin
|
372899ea3b
Move most code to SDRAM; fix problems with code in SDRAM; cleanups
|
il y a 3 ans |
|
H. Peter Anvin
|
ec99762a84
Use waitirq rather than suspending a memory transaction for SD card
|
il y a 3 ans |
|
H. Peter Anvin
|
affd869f20
Add to waitirq and "andmask" and an "ormask".
|
il y a 3 ans |
|
H. Peter Anvin
|
cd15d8fd49
picorv32: revamp the Q registers to be a full bank switch
|
il y a 3 ans |
|
H. Peter Anvin
|
ea8bf559a9
picorv32: fix aliasing of mret = retirq
|
il y a 3 ans |
|
H. Peter Anvin
|
0cf198bfb2
picorv32: have maskirq take a control mask; let mret = retirq
|
il y a 3 ans |
|
H. Peter Anvin
|
c78f9d909d
Roll back picorv32 hacks for unaligned memory support
|
il y a 3 ans |
|
H. Peter Anvin
|
062a3d9eb1
Reorganize tree so a single Makefile can do the right thing
|
il y a 3 ans |
