|  H. Peter Anvin | 99c9b0ccc3
							
							Better timezone handling; upload helper scripts | 3 years ago | 
				
					
						|  H. Peter Anvin | c4320f1f4f
							
							esplink: better error checking, test ESP -> FPGA write direction | 3 years ago | 
				
					
						|  H. Peter Anvin | 065742e213
							
							esplink: fix startup time race condition on ESP32 side | 3 years ago | 
				
					
						|  H. Peter Anvin | d8e0e2d6ac
							
							esplink: handle arbitrary byte ranges; allow ESP to query status | 3 years ago | 
				
					
						|  H. Peter Anvin | 832c07c31f
							
							Have ESP issue a handshake interrupt; some common link code | 3 years ago | 
				
					
						|  H. Peter Anvin | 1725fbb91d
							
							ESP32 code for FPGA link; test code and fixes | 3 years ago | 
				
					
						|  H. Peter Anvin | aac953ed19
							
							Implement FPGA <-> ESP32 communication path | 3 years ago | 
				
					
						|  H. Peter Anvin | f1e04bf5c7
							
							esp32 firmware image with support for OTA updates of both FPGA and ESP32 | 3 years ago | 
				
					
						|  H. Peter Anvin | 0cdd243825
							
							serial.sv: mer generell serieport med Rx och Tx | 3 years ago | 
				
					
						|  H. Peter Anvin | e0305b26e3
							
							system.c: disable the 5 s testing startup delay | 3 years ago | 
				
					
						|  H. Peter Anvin | 4d4291d637
							
							usb: fix descriptor regeneration; add name strings to individual ports | 3 years ago | 
				
					
						|  H. Peter Anvin | 835310c76e
							
							update: .fw file is a single compressed container; simplify I/O code | 3 years ago | 
				
					
						|  H. Peter Anvin | 84afb464e6
							
							update: encode version in the firmware files; better .rpf generation | 3 years ago | 
				
					
						|  H. Peter Anvin | ee45852b85
							
							Full infrastructure for updating flash via JTAG SVF | 3 years ago | 
				
					
						|  H. Peter Anvin | 6375646603
							
							update: get closer to a working JTAG update infrastructure | 3 years ago | 
				
					
						|  H. Peter Anvin | e1c53dfb56
							
							vjtag: allow both SRAM and DRAM to be accessed over VJTAG | 3 years ago | 
				
					
						|  H. Peter Anvin | 8ba4a1a3de
							
							vjtag: fix "one bit behind" problem for write properly; use sys_clk | 3 years ago | 
				
					
						|  H. Peter Anvin | 47300bdbed
							
							vjtag: require a synchronization prefix to write to memory | 3 years ago | 
				
					
						|  H. Peter Anvin | 37de408c19
							
							Allow the CPU to force an FPGA reload; vjtag improvement | 3 years ago | 
				
					
						|  H. Peter Anvin | 2ec75f1807
							
							fpga: virtual JTAG interface | 3 years ago | 
				
					
						|  H. Peter Anvin | 9c1891e562
							
							spiflash.[ch]: a (hopefully) platform-independent SPI flash writer | 3 years ago | 
				
					
						|  H. Peter Anvin | a90ef02f46
							
							fpga: generate .xsvf files | 3 years ago | 
				
					
						|  H. Peter Anvin | e05dbe6f40
							
							v2boot: simple boot loader connecting ESP32-SPI to flash-SPI | 3 years ago | 
				
					
						|  H. Peter Anvin | 4b07e7703d
							
							Fix USB serial number generation | 3 years ago | 
				
					
						|  H. Peter Anvin | aea92d6f7a
							
							fw: download SPI ROM ID and send to USB very early in execution | 3 years ago | 
				
					
						|  H. Peter Anvin | 6014b9c6d7
							
							max80: fix timing bug that affected code execution from SDRAM | 3 years ago | 
				
					
						|  H. Peter Anvin | 8b67b5db30
							
							spirom: fix SPI ROM I/O and data downloading | 3 years ago | 
				
					
						|  H. Peter Anvin | 8eec9b9e0a
							
							Timing improvements; allow SRAM to be read over JTAG | 3 years ago | 
				
					
						|  H. Peter Anvin | 9471dad838
							
							Move date stamp generation to fpga build; record SDRAM checksum | 3 years ago | 
				
					
						|  H. Peter Anvin | d2951ecd94
							
							spirom: issue the right 1-bit command; update ufddos80.rom | 3 years ago |