|
ip
|
30d5acc569
Change core clock to 168 MHz and video clock to 48 MHz
|
3 rokov pred |
|
output_files
|
728e8de139
sdram: allow arbitrary alignments on port 1
|
3 rokov pred |
|
scripts
|
1792b0ac94
pinout: move scripts to scripts/; use a script to read *.pins directly
|
3 rokov pred |
|
.gitignore
|
8bf5d90a2d
.gitignore: add some editor temp file patterns
|
3 rokov pred |
|
functions.sv
|
1355c99091
Add SPI master unit IP, move generally useful functions to a common file
|
3 rokov pred |
|
max80.pins
|
85544a3c97
Add pin for flash_mosi; update some I/O options
|
3 rokov pred |
|
max80.qpf
|
e831938e38
max80 blink test
|
3 rokov pred |
|
max80.qsf
|
1355c99091
Add SPI master unit IP, move generally useful functions to a common file
|
3 rokov pred |
|
max80.sdc
|
728e8de139
sdram: allow arbitrary alignments on port 1
|
3 rokov pred |
|
max80.sv
|
728e8de139
sdram: allow arbitrary alignments on port 1
|
3 rokov pred |
|
max80_assignment_defaults.qdf
|
5ddc02d7cf
Update pinout to match latest schematic
|
3 rokov pred |
|
max80jic.cof
|
7522b73a70
Update configuration assigments, JIC generation
|
3 rokov pred |
|
sdram.sv
|
2517eac8ba
sdram: make the bus protocol actually work sanely
|
3 rokov pred |
|
spi_master.sv
|
35ce29d153
spi_master: remove non-synthesizable constructs
|
3 rokov pred |
|
synchro.sv
|
029238233d
Rename *.v files to *.sv
|
3 rokov pred |
|
tmdsenc.sv
|
029238233d
Rename *.v files to *.sv
|
3 rokov pred |
|
transpose.sv
|
9363f018e1
sdram: rewrite state machine with an operations loop counter
|
3 rokov pred |
H. Peter Anvin
2517eac8ba
sdram: make the bus protocol actually work sanely