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H. Peter Anvin 4b594cfa8b usbdescgen: handle serial number, produce Verilog code with index 3 лет назад
abc 3dd521c55c abc: new directory with ABC programs; first: read/set RTC 3 лет назад
fpga 4b594cfa8b usbdescgen: handle serial number, produce Verilog code with index 3 лет назад
rv32 a99616cbc5 WIP: restructure USB using interfaces to be able to create more endpoints 3 лет назад
tools 4b594cfa8b usbdescgen: handle serial number, produce Verilog code with index 3 лет назад
.gitattributes e1878a396f Detect the presence of an ABC-bus by looking for a clock signal 3 лет назад
.gitignore bf1976441c Add *.qip files 3 лет назад
.gitmodules 3673cdd132 Remove fatfs as a submodule. It is small and needs edits. 3 лет назад
Makefile ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion 3 лет назад
iodevs.conf de1566292f clocks: centralize strobes; rng: shut down when not in use 3 лет назад
riscv-opts.mk 09d392bd4c fw: use -malign-data=natural 3 лет назад