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H. Peter Anvin 4b594cfa8b usbdescgen: handle serial number, produce Verilog code with index пре 3 година
abc 3dd521c55c abc: new directory with ABC programs; first: read/set RTC пре 3 година
fpga 4b594cfa8b usbdescgen: handle serial number, produce Verilog code with index пре 3 година
rv32 a99616cbc5 WIP: restructure USB using interfaces to be able to create more endpoints пре 3 година
tools 4b594cfa8b usbdescgen: handle serial number, produce Verilog code with index пре 3 година
.gitattributes e1878a396f Detect the presence of an ABC-bus by looking for a clock signal пре 3 година
.gitignore bf1976441c Add *.qip files пре 3 година
.gitmodules 3673cdd132 Remove fatfs as a submodule. It is small and needs edits. пре 3 година
Makefile ac8a492ba2 sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion пре 3 година
iodevs.conf de1566292f clocks: centralize strobes; rng: shut down when not in use пре 3 година
riscv-opts.mk 09d392bd4c fw: use -malign-data=natural пре 3 година