H. Peter Anvin 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
..
ip a99616cbc5 WIP: restructure USB using interfaces to be able to create more endpoints 3 rokov pred
output 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
scripts 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
simulation f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again 3 rokov pred
usb 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
.gitignore 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
Makefile 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
abcbus.sv 3dfb6626a1 More clock tree changes; fix rng oscillator sources 3 rokov pred
assignment_defaults.qdf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
fast_mem.sv dd69eafb99 Many timing fixes; better IRQ handling for abcbus 4 rokov pred
functions.sv f2060589ab Default baud rate = 115200, baud rate programmable 4 rokov pred
i2c.sv 4970fb6ef6 rtc: issue dummy clock cycles if SDA appears stuck 4 rokov pred
iodevs.vh de1566292f clocks: centralize strobes; rng: shut down when not in use 3 rokov pred
max80-v1.cof 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
max80-v2.cof 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
max80.qpf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
max80.qsf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
max80.sdc 4e65673781 spirom: add support for sending arbitrary SPI commands 3 rokov pred
max80.sv 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
picorv32.v 372899ea3b Move most code to SDRAM; fix problems with code in SDRAM; cleanups 3 rokov pred
rng.sv de1566292f clocks: centralize strobes; rng: shut down when not in use 3 rokov pred
sdcard.sv ec99762a84 Use waitirq rather than suspending a memory transaction for SD card 4 rokov pred
sdram.sv a99616cbc5 WIP: restructure USB using interfaces to be able to create more endpoints 3 rokov pred
spi_master.sv 062a3d9eb1 Reorganize tree so a single Makefile can do the right thing 4 rokov pred
spirom.sv 4e65673781 spirom: add support for sending arbitrary SPI commands 3 rokov pred
synchro.sv 4e65673781 spirom: add support for sending arbitrary SPI commands 3 rokov pred
sysclock.sv 3dfb6626a1 More clock tree changes; fix rng oscillator sources 3 rokov pred
tmdsenc.sv 74d9da52b0 hdmi/tmds: fix symbol data ordering 3 rokov pred
transpose.sv 510e702728 video: initial simple video generator; add support for HDMI TERC4 3 rokov pred
tty.sv 6ae39aaf12 Make romcopy device programmable and able to zero memory 4 rokov pred
v1.pins 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
v1.qsf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
v1_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
v2.pins 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
v2.qsf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
v2_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 rokov pred
video.sv 980eaf0400 Restructure clock tree; better sdram timing; random number generator 3 rokov pred