 H. Peter Anvin
|
2c6d4d66d2
sdram: fix some timing calculations, pre-ack, cleanups
|
il y a 3 ans |
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H. Peter Anvin
|
7efe6c8d1c
sdram: fix op_cycle counter overflow
|
il y a 3 ans |
|
H. Peter Anvin
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9363f018e1
sdram: rewrite state machine with an operations loop counter
|
il y a 3 ans |
|
H. Peter Anvin
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b2d184d021
Fix polarity of output SDRAM clock; move into sdram module
|
il y a 3 ans |
|
H. Peter Anvin
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30d5acc569
Change core clock to 168 MHz and video clock to 48 MHz
|
il y a 3 ans |
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H. Peter Anvin
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afc9429471
Add simple SDRAM controller
|
il y a 3 ans |
|
H. Peter Anvin
|
43d9806872
Remove unused assignments; use a DDIO buffer for sr_clk
|
il y a 3 ans |
|
H. Peter Anvin
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0cc1a65b5e
Change N/C pins to output driving GND
|
il y a 3 ans |
|
H. Peter Anvin
|
85544a3c97
Add pin for flash_mosi; update some I/O options
|
il y a 3 ans |
|
H. Peter Anvin
|
5ddc02d7cf
Update pinout to match latest schematic
|
il y a 3 ans |
|
H. Peter Anvin
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68d83c5f60
Minor update to max80.qsf
|
il y a 3 ans |
|
H. Peter Anvin
|
515a823a4c
Fixa logiken för rst_n, snygga till ip/pll.v
|
il y a 3 ans |
|
H. Peter Anvin
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6ef7e7822d
Update PLL IP files; fix .sdc file
|
il y a 3 ans |
|
H. Peter Anvin
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e831938e38
max80 blink test
|
il y a 3 ans |
