 H. Peter Anvin
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4b594cfa8b
usbdescgen: handle serial number, produce Verilog code with index
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3 years ago |
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H. Peter Anvin
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dd02802dcb
usb: descriptor generator tool
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3 years ago |
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H. Peter Anvin
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41bd97f3b3
usb: unbreak the data0/1 flipping logic
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3 years ago |
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H. Peter Anvin
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b66e41fe16
usb_device_core: hook up tx_data_strb
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3 years ago |
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H. Peter Anvin
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a99616cbc5
WIP: restructure USB using interfaces to be able to create more endpoints
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3 years ago |
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H. Peter Anvin
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182ff5617a
sdram: simpler implementation of the arbiter/multiplexer
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3 years ago |
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H. Peter Anvin
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ef2d958d8f
rv32: reduce the verbosity of test code
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3 years ago |
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H. Peter Anvin
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de1566292f
clocks: centralize strobes; rng: shut down when not in use
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3 years ago |
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H. Peter Anvin
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2034158a65
sdram: fix state machine problem
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3 years ago |
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H. Peter Anvin
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4e65673781
spirom: add support for sending arbitrary SPI commands
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3 years ago |
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H. Peter Anvin
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2e544bb970
sdcard: reinitialize on system (soft) reset
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3 years ago |
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H. Peter Anvin
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a5abfc202c
reset: don't reset USB of soft reset; soft reset on input BREAK
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3 years ago |
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H. Peter Anvin
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3dfb6626a1
More clock tree changes; fix rng oscillator sources
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3 years ago |
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H. Peter Anvin
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e170347f76
synchro: allow synchronizer to use I/O input registers
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3 years ago |
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H. Peter Anvin
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d64ebed344
rng: add the abc_clk to the inputs
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3 years ago |
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H. Peter Anvin
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da417c5ed7
rng: better LSFR handling
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3 years ago |
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H. Peter Anvin
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dac6cd700a
rng: delay 256 μs before reading a random number
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3 years ago |
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H. Peter Anvin
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bf1976441c
Add *.qip files
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3 years ago |
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H. Peter Anvin
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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3 years ago |
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H. Peter Anvin
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980eaf0400
Restructure clock tree; better sdram timing; random number generator
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3 years ago |
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H. Peter Anvin
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f3ee4f685c
fpga: enable USB core
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3 years ago |
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H. Peter Anvin
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cc37f87c67
sdram: rewrite as parameterized ports; usb: add USB core for testing
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3 years ago |
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H. Peter Anvin
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4000a82467
video: explicitly make the clock a "data" output
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3 years ago |
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H. Peter Anvin
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0b53cefc85
video: revert to outputting "real" data on the HDMI channels
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3 years ago |
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H. Peter Anvin
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74d9da52b0
hdmi/tmds: fix symbol data ordering
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3 years ago |
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H. Peter Anvin
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8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
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3 years ago |
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H. Peter Anvin
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f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
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3 years ago |
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H. Peter Anvin
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d6d6aa5763
Merge in video generator changes
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3 years ago |
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H. Peter Anvin
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510e702728
video: initial simple video generator; add support for HDMI TERC4
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3 years ago |
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H. Peter Anvin
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3dd521c55c
abc: new directory with ABC programs; first: read/set RTC
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3 years ago |
