Historique des commits

Auteur SHA1 Message Date
  H. Peter Anvin e1878a396f Detect the presence of an ABC-bus by looking for a clock signal il y a 3 ans
  H. Peter Anvin 8368aa9534 fpga: parameterize the rtc_32khz workaround il y a 3 ans
  H. Peter Anvin 2ee2c77bd7 sdram: fix initialization sequence again il y a 3 ans
  H. Peter Anvin b5e39487bd max80: change esp_ctr debug signal to 4 Hz il y a 3 ans
  H. Peter Anvin c40501f76e SDRAM access from the ABC-bus il y a 3 ans
  H. Peter Anvin 03fae78888 hack: binary counter on ESP pins to test connectivity il y a 3 ans
  H. Peter Anvin 3608e21183 Add extended devices (xdevs) that require > 128 bytes il y a 3 ans
  H. Peter Anvin f3992b85ad sdcard: run in slow mode (400 kHz during initialization) il y a 3 ans
  H. Peter Anvin 4cc5301813 sdcard: generalize the IP, instantiate for ESP32 SPI channel too il y a 3 ans
  H. Peter Anvin 518503fa99 iodev: centralize definitions and auto-generate boiler plate code il y a 3 ans
  H. Peter Anvin 74ebfc9b60 fw: allow optimization if IRQ_VECTORS < 32 il y a 3 ans
  H. Peter Anvin bc09800c11 fw: make sure to clear the timer IRQ counter on init... il y a 3 ans
  H. Peter Anvin 9535001a01 fw: force instructions in irqasm.S to be aligned il y a 3 ans
  H. Peter Anvin d3cac913de fw: prevent invalid linker relaxation in irqasm.S il y a 3 ans
  H. Peter Anvin 555a856ff4 fw: move .sdata/.sbss into the zero page il y a 3 ans
  H. Peter Anvin 211ec5e0c8 fw: set gp for the IRQ bank too il y a 3 ans
  H. Peter Anvin 2efc87efde Add irqasm.S... still no interrupts, but no crashes either... il y a 3 ans
  H. Peter Anvin cd15d8fd49 picorv32: revamp the Q registers to be a full bank switch il y a 3 ans
  H. Peter Anvin bcefeb445b Switch to aggressive optimization to improve timing il y a 3 ans
  H. Peter Anvin 996bd201be Timing improvements: wait state for iodev, fix handling of sr_clk il y a 3 ans
  H. Peter Anvin 75980f5efb fw: now working interrupt handling, periodic timer flashing LEDs il y a 3 ans
  H. Peter Anvin 7c6cbc57c6 fpga/max80: 32 kHz RTC clock isn't working, workaround il y a 3 ans
  H. Peter Anvin 8ead1845e1 fpga/sysclock: fix off-by-one in periodic pulse generation il y a 3 ans
  H. Peter Anvin f48fe1c4cf fpga: disable pull resistors for SPI to flash chip il y a 3 ans
  H. Peter Anvin ea8bf559a9 picorv32: fix aliasing of mret = retirq il y a 3 ans
  H. Peter Anvin 7f9ba1c3cd Update FPGA generated files il y a 3 ans
  H. Peter Anvin 2b261e54f6 fw: add interrupt support; use a linker script il y a 3 ans
  H. Peter Anvin 0cf198bfb2 picorv32: have maskirq take a control mask; let mret = retirq il y a 3 ans
  H. Peter Anvin 105317a04c sdcard: works now! (At least reading) il y a 3 ans
  H. Peter Anvin 6ead9a1ad1 sdcard: fix switching to high speed mode il y a 3 ans