Commit History

Author SHA1 Message Date
  H. Peter Anvin f6f9bf7ede Add i2c unit 3 years ago
  H. Peter Anvin 55b0aeee3f iodev: move one-register "devices" into a common "sys"; add "abc" device 3 years ago
  H. Peter Anvin e1878a396f Detect the presence of an ABC-bus by looking for a clock signal 3 years ago
  H. Peter Anvin 8368aa9534 fpga: parameterize the rtc_32khz workaround 3 years ago
  H. Peter Anvin 2ee2c77bd7 sdram: fix initialization sequence again 3 years ago
  H. Peter Anvin b5e39487bd max80: change esp_ctr debug signal to 4 Hz 3 years ago
  H. Peter Anvin c40501f76e SDRAM access from the ABC-bus 3 years ago
  H. Peter Anvin 03fae78888 hack: binary counter on ESP pins to test connectivity 3 years ago
  H. Peter Anvin 3608e21183 Add extended devices (xdevs) that require > 128 bytes 3 years ago
  H. Peter Anvin f3992b85ad sdcard: run in slow mode (400 kHz during initialization) 3 years ago
  H. Peter Anvin 4cc5301813 sdcard: generalize the IP, instantiate for ESP32 SPI channel too 3 years ago
  H. Peter Anvin 518503fa99 iodev: centralize definitions and auto-generate boiler plate code 3 years ago
  H. Peter Anvin 74ebfc9b60 fw: allow optimization if IRQ_VECTORS < 32 3 years ago
  H. Peter Anvin bc09800c11 fw: make sure to clear the timer IRQ counter on init... 3 years ago
  H. Peter Anvin 9535001a01 fw: force instructions in irqasm.S to be aligned 3 years ago
  H. Peter Anvin d3cac913de fw: prevent invalid linker relaxation in irqasm.S 3 years ago
  H. Peter Anvin 555a856ff4 fw: move .sdata/.sbss into the zero page 3 years ago
  H. Peter Anvin 211ec5e0c8 fw: set gp for the IRQ bank too 3 years ago
  H. Peter Anvin 2efc87efde Add irqasm.S... still no interrupts, but no crashes either... 3 years ago
  H. Peter Anvin cd15d8fd49 picorv32: revamp the Q registers to be a full bank switch 3 years ago
  H. Peter Anvin bcefeb445b Switch to aggressive optimization to improve timing 3 years ago
  H. Peter Anvin 996bd201be Timing improvements: wait state for iodev, fix handling of sr_clk 3 years ago
  H. Peter Anvin 75980f5efb fw: now working interrupt handling, periodic timer flashing LEDs 3 years ago
  H. Peter Anvin 7c6cbc57c6 fpga/max80: 32 kHz RTC clock isn't working, workaround 3 years ago
  H. Peter Anvin 8ead1845e1 fpga/sysclock: fix off-by-one in periodic pulse generation 3 years ago
  H. Peter Anvin f48fe1c4cf fpga: disable pull resistors for SPI to flash chip 3 years ago
  H. Peter Anvin ea8bf559a9 picorv32: fix aliasing of mret = retirq 3 years ago
  H. Peter Anvin 7f9ba1c3cd Update FPGA generated files 3 years ago
  H. Peter Anvin 2b261e54f6 fw: add interrupt support; use a linker script 3 years ago
  H. Peter Anvin 0cf198bfb2 picorv32: have maskirq take a control mask; let mret = retirq 3 years ago