| .. | 
		
		
			
				
					| int_osc | a99616cbc5
					WIP: restructure USB using interfaces to be able to create more endpoints | 3 years ago | 
		
			
				
					| abcmapram.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| abcmapram.v | f5f6aad21e
					abcbus: drop unused mapram nodes | 4 years ago | 
		
			
				
					| cdc_fifo.qip | 808ba7c43c
					usb: use a direct interface between the CPU and the USB FIFOs | 3 years ago | 
		
			
				
					| cdc_fifo.v | 3d16eb2126
					usb: set FIFO size to 1K | 3 years ago | 
		
			
				
					| ddio_out.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| ddio_out.v | 062a3d9eb1
					Reorganize tree so a single Makefile can do the right thing | 4 years ago | 
		
			
				
					| ddufifo.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| ddufifo.v | 6ae39aaf12
					Make romcopy device programmable and able to zero memory | 4 years ago | 
		
			
				
					| fastmem_ip.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| fastmem_ip.v | ac8a492ba2
					sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion | 3 years ago | 
		
			
				
					| fifo.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| fifo.v | 4f9855b5c4
					tty: simplify by running in the sys_clk domain; use NCO for baud | 4 years ago | 
		
			
				
					| hdmitx.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| hdmitx.v | 980eaf0400
					Restructure clock tree; better sdram timing; random number generator | 3 years ago | 
		
			
				
					| int_osc.qsys | a99616cbc5
					WIP: restructure USB using interfaces to be able to create more endpoints | 3 years ago | 
		
			
				
					| int_osc.sopcinfo | a99616cbc5
					WIP: restructure USB using interfaces to be able to create more endpoints | 3 years ago | 
		
			
				
					| pll2_16.qip | 60be2e1201
					v2: v2 has a 16 MHz oscillator instead of 48 MHz | 3 years ago | 
		
			
				
					| pll2_16.v | 60be2e1201
					v2: v2 has a 16 MHz oscillator instead of 48 MHz | 3 years ago | 
		
			
				
					| pll2_48.qip | 60be2e1201
					v2: v2 has a 16 MHz oscillator instead of 48 MHz | 3 years ago | 
		
			
				
					| pll2_48.v | 60be2e1201
					v2: v2 has a 16 MHz oscillator instead of 48 MHz | 3 years ago | 
		
			
				
					| pll3.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| pll3.v | 3dfb6626a1
					More clock tree changes; fix rng oscillator sources | 3 years ago | 
		
			
				
					| pll4.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| pll4.v | 3dfb6626a1
					More clock tree changes; fix rng oscillator sources | 3 years ago | 
		
			
				
					| statusram.qip | bf1976441c
					Add *.qip files | 3 years ago | 
		
			
				
					| statusram.v | 6798b92c04
					Simple disk cache; add missing files | 4 years ago |