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ip
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30d5acc569
Change core clock to 168 MHz and video clock to 48 MHz
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3 years ago |
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output_files
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30d5acc569
Change core clock to 168 MHz and video clock to 48 MHz
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3 years ago |
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scripts
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1792b0ac94
pinout: move scripts to scripts/; use a script to read *.pins directly
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3 years ago |
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.gitignore
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8bf5d90a2d
.gitignore: add some editor temp file patterns
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3 years ago |
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max80.pins
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85544a3c97
Add pin for flash_mosi; update some I/O options
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3 years ago |
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max80.qpf
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e831938e38
max80 blink test
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3 years ago |
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max80.qsf
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94b62ada47
max80.qsf: restore sourcing of pins.tcl
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3 years ago |
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max80.sdc
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6ef7e7822d
Update PLL IP files; fix .sdc file
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3 years ago |
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max80.sv
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30d5acc569
Change core clock to 168 MHz and video clock to 48 MHz
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3 years ago |
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max80_assignment_defaults.qdf
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5ddc02d7cf
Update pinout to match latest schematic
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3 years ago |
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max80jic.cof
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7522b73a70
Update configuration assigments, JIC generation
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3 years ago |
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sdram.sv
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afc9429471
Add simple SDRAM controller
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3 years ago |
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synchro.sv
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029238233d
Rename *.v files to *.sv
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3 years ago |
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tmdsenc.sv
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029238233d
Rename *.v files to *.sv
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3 years ago |
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transpose.sv
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e831938e38
max80 blink test
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3 years ago |
H. Peter Anvin
8bf5d90a2d
.gitignore: add some editor temp file patterns