 H. Peter Anvin
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a5abfc202c
reset: don't reset USB of soft reset; soft reset on input BREAK
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3 years ago |
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H. Peter Anvin
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3dfb6626a1
More clock tree changes; fix rng oscillator sources
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3 years ago |
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H. Peter Anvin
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d64ebed344
rng: add the abc_clk to the inputs
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3 years ago |
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H. Peter Anvin
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
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3 years ago |
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H. Peter Anvin
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980eaf0400
Restructure clock tree; better sdram timing; random number generator
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3 years ago |
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H. Peter Anvin
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f3ee4f685c
fpga: enable USB core
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3 years ago |
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H. Peter Anvin
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cc37f87c67
sdram: rewrite as parameterized ports; usb: add USB core for testing
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3 years ago |
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H. Peter Anvin
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8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
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3 years ago |
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H. Peter Anvin
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f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
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3 years ago |
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H. Peter Anvin
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510e702728
video: initial simple video generator; add support for HDMI TERC4
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3 years ago |
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H. Peter Anvin
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1dfcf38fed
sdcard: attempt to handle insertion and removal
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3 years ago |
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H. Peter Anvin
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a8cfea4d31
Remove support for 32 kHz and serial port workarounds
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3 years ago |
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H. Peter Anvin
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2f3640b11c
fpga: rename abc_master to abc_host
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3 years ago |
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H. Peter Anvin
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378b746e22
fpga: code lint fixes (no functional change)
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3 years ago |
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H. Peter Anvin
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f9c6fb9913
max80.sv: abc_sr_wd is a bus, not a single wire
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3 years ago |
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H. Peter Anvin
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80cd70eb57
iodevs: auto-generate common constants
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3 years ago |
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H. Peter Anvin
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9ca2889add
cpu: move the reset vector away from 0
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3 years ago |
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H. Peter Anvin
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a642f1f7a9
rtc: assume RTC 32 kHz is supported to work if GPIO serial not used
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3 years ago |
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H. Peter Anvin
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54f6bd3fd6
fw: replace libc _start with a much simpler one
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3 years ago |
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H. Peter Anvin
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6ae39aaf12
Make romcopy device programmable and able to zero memory
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3 years ago |
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H. Peter Anvin
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d6d6390bca
Clean up _start() -- the one in libc doesn't zero bss correctly
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3 years ago |
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H. Peter Anvin
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ec99762a84
Use waitirq rather than suspending a memory transaction for SD card
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3 years ago |
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H. Peter Anvin
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56753cd6a3
abcbus: move abcbus to separate module; add I/O status register
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3 years ago |
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H. Peter Anvin
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69476ffdf6
Add I/O interface to the ABC bus, using SDRAM DMA
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3 years ago |
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H. Peter Anvin
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f6f9bf7ede
Add i2c unit
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3 years ago |
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H. Peter Anvin
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55b0aeee3f
iodev: move one-register "devices" into a common "sys"; add "abc" device
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3 years ago |
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H. Peter Anvin
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e1878a396f
Detect the presence of an ABC-bus by looking for a clock signal
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3 years ago |
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H. Peter Anvin
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8368aa9534
fpga: parameterize the rtc_32khz workaround
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3 years ago |
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H. Peter Anvin
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b5e39487bd
max80: change esp_ctr debug signal to 4 Hz
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3 years ago |
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H. Peter Anvin
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c40501f76e
SDRAM access from the ABC-bus
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3 years ago |
