 H. Peter Anvin
|
3dfb6626a1
More clock tree changes; fix rng oscillator sources
|
3 years ago |
|
H. Peter Anvin
|
d64ebed344
rng: add the abc_clk to the inputs
|
3 years ago |
|
H. Peter Anvin
|
ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
|
3 years ago |
|
H. Peter Anvin
|
980eaf0400
Restructure clock tree; better sdram timing; random number generator
|
3 years ago |
|
H. Peter Anvin
|
f3ee4f685c
fpga: enable USB core
|
3 years ago |
|
H. Peter Anvin
|
cc37f87c67
sdram: rewrite as parameterized ports; usb: add USB core for testing
|
3 years ago |
|
H. Peter Anvin
|
8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
|
3 years ago |
|
H. Peter Anvin
|
f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
|
3 years ago |
|
H. Peter Anvin
|
510e702728
video: initial simple video generator; add support for HDMI TERC4
|
3 years ago |
|
H. Peter Anvin
|
1dfcf38fed
sdcard: attempt to handle insertion and removal
|
3 years ago |
|
H. Peter Anvin
|
a8cfea4d31
Remove support for 32 kHz and serial port workarounds
|
3 years ago |
|
H. Peter Anvin
|
2f3640b11c
fpga: rename abc_master to abc_host
|
3 years ago |
|
H. Peter Anvin
|
378b746e22
fpga: code lint fixes (no functional change)
|
3 years ago |
|
H. Peter Anvin
|
f9c6fb9913
max80.sv: abc_sr_wd is a bus, not a single wire
|
3 years ago |
|
H. Peter Anvin
|
80cd70eb57
iodevs: auto-generate common constants
|
3 years ago |
|
H. Peter Anvin
|
9ca2889add
cpu: move the reset vector away from 0
|
3 years ago |
|
H. Peter Anvin
|
a642f1f7a9
rtc: assume RTC 32 kHz is supported to work if GPIO serial not used
|
3 years ago |
|
H. Peter Anvin
|
54f6bd3fd6
fw: replace libc _start with a much simpler one
|
3 years ago |
|
H. Peter Anvin
|
6ae39aaf12
Make romcopy device programmable and able to zero memory
|
3 years ago |
|
H. Peter Anvin
|
d6d6390bca
Clean up _start() -- the one in libc doesn't zero bss correctly
|
3 years ago |
|
H. Peter Anvin
|
ec99762a84
Use waitirq rather than suspending a memory transaction for SD card
|
3 years ago |
|
H. Peter Anvin
|
56753cd6a3
abcbus: move abcbus to separate module; add I/O status register
|
3 years ago |
|
H. Peter Anvin
|
69476ffdf6
Add I/O interface to the ABC bus, using SDRAM DMA
|
3 years ago |
|
H. Peter Anvin
|
f6f9bf7ede
Add i2c unit
|
3 years ago |
|
H. Peter Anvin
|
55b0aeee3f
iodev: move one-register "devices" into a common "sys"; add "abc" device
|
3 years ago |
|
H. Peter Anvin
|
e1878a396f
Detect the presence of an ABC-bus by looking for a clock signal
|
3 years ago |
|
H. Peter Anvin
|
8368aa9534
fpga: parameterize the rtc_32khz workaround
|
3 years ago |
|
H. Peter Anvin
|
b5e39487bd
max80: change esp_ctr debug signal to 4 Hz
|
3 years ago |
|
H. Peter Anvin
|
c40501f76e
SDRAM access from the ABC-bus
|
3 years ago |
|
H. Peter Anvin
|
03fae78888
hack: binary counter on ESP pins to test connectivity
|
3 years ago |
