Historique des commits

Auteur SHA1 Message Date
  H. Peter Anvin 09273c35a8 Wire up Smartaid Magnum in the FPGA il y a 1 an
  H. Peter Anvin 9005376e47 Enable up to 8 ABC memory maps; additional romhack control registers il y a 1 an
  H. Peter Anvin b761e459c7 fpga/abcbus.sv: sample clock on the rising edge, not falling il y a 1 an
  H. Peter Anvin 5d42a9a139 fpga/abcbus.sv: more paranoia in XINPSTB# and XOUTPSTB# decode il y a 1 an
  H. Peter Anvin e73b0f3487 fpga/abcbus.sv: correct abc_xinpstb_s -> abc_xoutpstb_s il y a 1 an
  H. Peter Anvin de6279a03d fpga/abcbus: only sample for 80/800 on clock changes; allow override il y a 1 an
  H. Peter Anvin 0ccc916f7e abcmem: implement XM# handling and ABC800MAC+"ROM hack" map switching il y a 1 an
  H. Peter Anvin 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC il y a 2 ans
  H. Peter Anvin a0f8eb5820 Fix false positive ABC-bus memory overrun timer il y a 2 ans
  H. Peter Anvin 0271d1979a sdram: return start to the right subunit; add ABC-bus latency counter il y a 2 ans
  H. Peter Anvin 50d3a0c3bc usb: timing fixes in the status and IRQ paths il y a 2 ans
  H. Peter Anvin 81633591fa v2: abc_host and abc_a_oe are redundant and unified in v2 il y a 3 ans
  H. Peter Anvin 344ccf56d4 Fixes for dual version generator il y a 3 ans
  H. Peter Anvin 6db45e74e6 WIP: build both v1 and v2 il y a 3 ans
  H. Peter Anvin 3dfb6626a1 More clock tree changes; fix rng oscillator sources il y a 3 ans
  H. Peter Anvin cc37f87c67 sdram: rewrite as parameterized ports; usb: add USB core for testing il y a 3 ans
  H. Peter Anvin f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again il y a 3 ans
  H. Peter Anvin 0edc64a9c8 abcio, abcdisk: revamp callback interface, fix abcdisk state machine il y a 3 ans
  H. Peter Anvin 2f3640b11c fpga: rename abc_master to abc_host il y a 3 ans
  H. Peter Anvin f5f6aad21e abcbus: drop unused mapram nodes il y a 3 ans
  H. Peter Anvin 378b746e22 fpga: code lint fixes (no functional change) il y a 3 ans
  H. Peter Anvin 770e3b2451 abcbus: not busy until the transaction has completed il y a 3 ans
  H. Peter Anvin 864a989e80 Update register definitions; split out status change IRQ status bits il y a 3 ans
  H. Peter Anvin 0924c443cd WIP: simplify the ABC-bus I/O interface il y a 3 ans
  H. Peter Anvin 46c873bd12 abcbus: make INT#, NMI#, RESIN# and WAIT#/RDY explicitly controllable il y a 3 ans
  H. Peter Anvin 9daa6e28a5 abcbus: don't trigger RESIN# on internal reset il y a 3 ans
  H. Peter Anvin 4a0966e759 abcbus: put the I/O status register (INP 1) in a separate SRAM il y a 3 ans
  H. Peter Anvin 338c4e1649 fpga/abcbus: fix clear_irq signal il y a 3 ans
  H. Peter Anvin dd69eafb99 Many timing fixes; better IRQ handling for abcbus il y a 3 ans
  H. Peter Anvin df521ce35f abcbus: fix missing clock to ABC-bus synchronizer il y a 3 ans