 H. Peter Anvin
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6014b9c6d7
max80: fix timing bug that affected code execution from SDRAM
|
3 年之前 |
|
H. Peter Anvin
|
20994e38da
LED: change sequence of LED on v2
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3 年之前 |
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H. Peter Anvin
|
8eec9b9e0a
Timing improvements; allow SRAM to be read over JTAG
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3 年之前 |
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H. Peter Anvin
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adf6c39024
serial: simplify physical tty and make BREAK reset work
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3 年之前 |
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H. Peter Anvin
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90f0cc21b5
Reset via BREAK on physical TTY or GPIO
|
3 年之前 |
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H. Peter Anvin
|
7dd7eb2ed7
usb: change "console" to "tty", with CON_ used for only the console
|
3 年之前 |
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H. Peter Anvin
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af2600349c
usb: enable four ACM devices
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3 年之前 |
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H. Peter Anvin
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808ba7c43c
usb: use a direct interface between the CPU and the USB FIFOs
|
3 年之前 |
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H. Peter Anvin
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92d18543b8
tty: don't require DTR#; v2: output some clocks on gpio[135]
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3 年之前 |
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H. Peter Anvin
|
60be2e1201
v2: v2 has a 16 MHz oscillator instead of 48 MHz
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3 年之前 |
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H. Peter Anvin
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81633591fa
v2: abc_host and abc_a_oe are redundant and unified in v2
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3 年之前 |
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H. Peter Anvin
|
7c7d4cd52c
usb: set the device serial number
|
3 年之前 |
|
H. Peter Anvin
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08d8d7d2c8
More cleanups of multi-version... still broken?!
|
3 年之前 |
|
H. Peter Anvin
|
344ccf56d4
Fixes for dual version generator
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3 年之前 |
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H. Peter Anvin
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6db45e74e6
WIP: build both v1 and v2
|
3 年之前 |
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H. Peter Anvin
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75a6dbc7fa
fpga: infrastructure for building v1 and v2 FPGA
|
3 年之前 |
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H. Peter Anvin
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372899ea3b
Move most code to SDRAM; fix problems with code in SDRAM; cleanups
|
3 年之前 |
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H. Peter Anvin
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de1566292f
clocks: centralize strobes; rng: shut down when not in use
|
3 年之前 |
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H. Peter Anvin
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4e65673781
spirom: add support for sending arbitrary SPI commands
|
3 年之前 |
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H. Peter Anvin
|
a5abfc202c
reset: don't reset USB of soft reset; soft reset on input BREAK
|
3 年之前 |
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H. Peter Anvin
|
3dfb6626a1
More clock tree changes; fix rng oscillator sources
|
3 年之前 |
|
H. Peter Anvin
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d64ebed344
rng: add the abc_clk to the inputs
|
3 年之前 |
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H. Peter Anvin
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ac8a492ba2
sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion
|
3 年之前 |
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H. Peter Anvin
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980eaf0400
Restructure clock tree; better sdram timing; random number generator
|
3 年之前 |
|
H. Peter Anvin
|
f3ee4f685c
fpga: enable USB core
|
3 年之前 |
|
H. Peter Anvin
|
cc37f87c67
sdram: rewrite as parameterized ports; usb: add USB core for testing
|
3 年之前 |
|
H. Peter Anvin
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8218421642
fpga: set HDMI pixel clock to 56 MHz; correct PLL and HDMITX settings
|
4 年之前 |
|
H. Peter Anvin
|
f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
|
4 年之前 |
|
H. Peter Anvin
|
510e702728
video: initial simple video generator; add support for HDMI TERC4
|
4 年之前 |
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H. Peter Anvin
|
1dfcf38fed
sdcard: attempt to handle insertion and removal
|
4 年之前 |
