 H. Peter Anvin
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09273c35a8
Wire up Smartaid Magnum in the FPGA
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1 year ago |
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H. Peter Anvin
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9005376e47
Enable up to 8 ABC memory maps; additional romhack control registers
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1 year ago |
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H. Peter Anvin
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b761e459c7
fpga/abcbus.sv: sample clock on the rising edge, not falling
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1 year ago |
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H. Peter Anvin
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5d42a9a139
fpga/abcbus.sv: more paranoia in XINPSTB# and XOUTPSTB# decode
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1 year ago |
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H. Peter Anvin
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e73b0f3487
fpga/abcbus.sv: correct abc_xinpstb_s -> abc_xoutpstb_s
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1 year ago |
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H. Peter Anvin
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de6279a03d
fpga/abcbus: only sample for 80/800 on clock changes; allow override
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1 year ago |
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H. Peter Anvin
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0ccc916f7e
abcmem: implement XM# handling and ABC800MAC+"ROM hack" map switching
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1 year ago |
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H. Peter Anvin
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9ac4e30722
time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC
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2 years ago |
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H. Peter Anvin
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a0f8eb5820
Fix false positive ABC-bus memory overrun timer
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2 years ago |
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H. Peter Anvin
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0271d1979a
sdram: return start to the right subunit; add ABC-bus latency counter
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2 years ago |
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H. Peter Anvin
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50d3a0c3bc
usb: timing fixes in the status and IRQ paths
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2 years ago |
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H. Peter Anvin
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81633591fa
v2: abc_host and abc_a_oe are redundant and unified in v2
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3 years ago |
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H. Peter Anvin
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344ccf56d4
Fixes for dual version generator
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3 years ago |
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H. Peter Anvin
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6db45e74e6
WIP: build both v1 and v2
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3 years ago |
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H. Peter Anvin
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3dfb6626a1
More clock tree changes; fix rng oscillator sources
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3 years ago |
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H. Peter Anvin
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cc37f87c67
sdram: rewrite as parameterized ports; usb: add USB core for testing
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3 years ago |
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H. Peter Anvin
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f24cac3c43
fpga: lint code to make ModelSim RTL simulation work again
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3 years ago |
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H. Peter Anvin
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0edc64a9c8
abcio, abcdisk: revamp callback interface, fix abcdisk state machine
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3 years ago |
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H. Peter Anvin
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2f3640b11c
fpga: rename abc_master to abc_host
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3 years ago |
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H. Peter Anvin
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f5f6aad21e
abcbus: drop unused mapram nodes
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3 years ago |
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H. Peter Anvin
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378b746e22
fpga: code lint fixes (no functional change)
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3 years ago |
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H. Peter Anvin
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770e3b2451
abcbus: not busy until the transaction has completed
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3 years ago |
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H. Peter Anvin
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864a989e80
Update register definitions; split out status change IRQ status bits
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3 years ago |
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H. Peter Anvin
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0924c443cd
WIP: simplify the ABC-bus I/O interface
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3 years ago |
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H. Peter Anvin
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46c873bd12
abcbus: make INT#, NMI#, RESIN# and WAIT#/RDY explicitly controllable
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3 years ago |
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H. Peter Anvin
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9daa6e28a5
abcbus: don't trigger RESIN# on internal reset
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3 years ago |
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H. Peter Anvin
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4a0966e759
abcbus: put the I/O status register (INP 1) in a separate SRAM
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3 years ago |
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H. Peter Anvin
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338c4e1649
fpga/abcbus: fix clear_irq signal
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3 years ago |
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H. Peter Anvin
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dd69eafb99
Many timing fixes; better IRQ handling for abcbus
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3 years ago |
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H. Peter Anvin
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df521ce35f
abcbus: fix missing clock to ABC-bus synchronizer
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3 years ago |
