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H. Peter Anvin 20994e38da LED: change sequence of LED on v2 3 жил өмнө
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ip 8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG 3 жил өмнө
output 8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG 3 жил өмнө
scripts 67a2a42fce fpga/Makefile: fix additional dependency generation issues 3 жил өмнө
simulation f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again 3 жил өмнө
usb 7462426469 usb: use showahead on the Rx FIFO, but not the Tx FIFO 3 жил өмнө
.gitignore 9471dad838 Move date stamp generation to fpga build; record SDRAM checksum 3 жил өмнө
Makefile 67a2a42fce fpga/Makefile: fix additional dependency generation issues 3 жил өмнө
abcbus.sv a0f8eb5820 Fix false positive ABC-bus memory overrun timer 3 жил өмнө
assignment_defaults.qdf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 жил өмнө
clkbuf.sv 808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs 3 жил өмнө
fast_mem.sv dd69eafb99 Many timing fixes; better IRQ handling for abcbus 3 жил өмнө
functions.sv f2060589ab Default baud rate = 115200, baud rate programmable 3 жил өмнө
i2c.sv 4970fb6ef6 rtc: issue dummy clock cycles if SDA appears stuck 3 жил өмнө
iodevs.vh 7dd7eb2ed7 usb: change "console" to "tty", with CON_ used for only the console 3 жил өмнө
max80-v1.cof 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 жил өмнө
max80-v2.cof 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 жил өмнө
max80.qpf 8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG 3 жил өмнө
max80.qsf 29a9876c39 USB: I/O standards adjustment 3 жил өмнө
max80.sdc 8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG 3 жил өмнө
max80.sv 20994e38da LED: change sequence of LED on v2 3 жил өмнө
picorv32.v 372899ea3b Move most code to SDRAM; fix problems with code in SDRAM; cleanups 3 жил өмнө
rng.sv de1566292f clocks: centralize strobes; rng: shut down when not in use 3 жил өмнө
sdcard.sv ec99762a84 Use waitirq rather than suspending a memory transaction for SD card 3 жил өмнө
sdram.sv 0271d1979a sdram: return start to the right subunit; add ABC-bus latency counter 3 жил өмнө
serial.sv adf6c39024 serial: simplify physical tty and make BREAK reset work 3 жил өмнө
spi_master.sv 062a3d9eb1 Reorganize tree so a single Makefile can do the right thing 3 жил өмнө
spirom.sv 9471dad838 Move date stamp generation to fpga build; record SDRAM checksum 3 жил өмнө
synchro.sv 4e65673781 spirom: add support for sending arbitrary SPI commands 3 жил өмнө
sysclock.sv 3dfb6626a1 More clock tree changes; fix rng oscillator sources 3 жил өмнө
tmdsenc.sv 74d9da52b0 hdmi/tmds: fix symbol data ordering 3 жил өмнө
transpose.sv 510e702728 video: initial simple video generator; add support for HDMI TERC4 3 жил өмнө
v1.pins 6db45e74e6 WIP: build both v1 and v2 3 жил өмнө
v1.qsf 29a9876c39 USB: I/O standards adjustment 3 жил өмнө
v1.sv 60be2e1201 v2: v2 has a 16 MHz oscillator instead of 48 MHz 3 жил өмнө
v1_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 жил өмнө
v2.pins 20994e38da LED: change sequence of LED on v2 3 жил өмнө
v2.qsf 29a9876c39 USB: I/O standards adjustment 3 жил өмнө
v2.sv 20994e38da LED: change sequence of LED on v2 3 жил өмнө
v2_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA 3 жил өмнө
video.sv 980eaf0400 Restructure clock tree; better sdram timing; random number generator 3 жил өмнө