ABC80/max80_fw @ 20994e38dae9363b065e0a710e2e16d8753a535d

H. Peter Anvin 20994e38da LED: change sequence of LED on v2		3 lat temu
..
ip	8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG	3 lat temu
output	8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG	3 lat temu
scripts	67a2a42fce fpga/Makefile: fix additional dependency generation issues	3 lat temu
simulation	f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again	3 lat temu
usb	7462426469 usb: use showahead on the Rx FIFO, but not the Tx FIFO	3 lat temu
.gitignore	9471dad838 Move date stamp generation to fpga build; record SDRAM checksum	3 lat temu
Makefile	67a2a42fce fpga/Makefile: fix additional dependency generation issues	3 lat temu
abcbus.sv	a0f8eb5820 Fix false positive ABC-bus memory overrun timer	3 lat temu
assignment_defaults.qdf	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 lat temu
clkbuf.sv	808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs	3 lat temu
fast_mem.sv	dd69eafb99 Many timing fixes; better IRQ handling for abcbus	3 lat temu
functions.sv	f2060589ab Default baud rate = 115200, baud rate programmable	3 lat temu
i2c.sv	4970fb6ef6 rtc: issue dummy clock cycles if SDA appears stuck	3 lat temu
iodevs.vh	7dd7eb2ed7 usb: change "console" to "tty", with CON_ used for only the console	3 lat temu
max80-v1.cof	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 lat temu
max80-v2.cof	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 lat temu
max80.qpf	8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG	3 lat temu
max80.qsf	29a9876c39 USB: I/O standards adjustment	3 lat temu
max80.sdc	8eec9b9e0a Timing improvements; allow SRAM to be read over JTAG	3 lat temu
max80.sv	20994e38da LED: change sequence of LED on v2	3 lat temu
picorv32.v	372899ea3b Move most code to SDRAM; fix problems with code in SDRAM; cleanups	3 lat temu
rng.sv	de1566292f clocks: centralize strobes; rng: shut down when not in use	3 lat temu
sdcard.sv	ec99762a84 Use waitirq rather than suspending a memory transaction for SD card	3 lat temu
sdram.sv	0271d1979a sdram: return start to the right subunit; add ABC-bus latency counter	3 lat temu
serial.sv	adf6c39024 serial: simplify physical tty and make BREAK reset work	3 lat temu
spi_master.sv	062a3d9eb1 Reorganize tree so a single Makefile can do the right thing	3 lat temu
spirom.sv	9471dad838 Move date stamp generation to fpga build; record SDRAM checksum	3 lat temu
synchro.sv	4e65673781 spirom: add support for sending arbitrary SPI commands	3 lat temu
sysclock.sv	3dfb6626a1 More clock tree changes; fix rng oscillator sources	3 lat temu
tmdsenc.sv	74d9da52b0 hdmi/tmds: fix symbol data ordering	3 lat temu
transpose.sv	510e702728 video: initial simple video generator; add support for HDMI TERC4	3 lat temu
v1.pins	6db45e74e6 WIP: build both v1 and v2	3 lat temu
v1.qsf	29a9876c39 USB: I/O standards adjustment	3 lat temu
v1.sv	60be2e1201 v2: v2 has a 16 MHz oscillator instead of 48 MHz	3 lat temu
v1_description.txt	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 lat temu
v2.pins	20994e38da LED: change sequence of LED on v2	3 lat temu
v2.qsf	29a9876c39 USB: I/O standards adjustment	3 lat temu
v2.sv	20994e38da LED: change sequence of LED on v2	3 lat temu
v2_description.txt	75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA	3 lat temu
video.sv	980eaf0400 Restructure clock tree; better sdram timing; random number generator	3 lat temu