|  H. Peter Anvin | aac953ed19
							
							Implement FPGA <-> ESP32 communication path | 3 سال پیش | 
				
					
						|  H. Peter Anvin | ee45852b85
							
							Full infrastructure for updating flash via JTAG SVF | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 6375646603
							
							update: get closer to a working JTAG update infrastructure | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 37de408c19
							
							Allow the CPU to force an FPGA reload; vjtag improvement | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 2ec75f1807
							
							fpga: virtual JTAG interface | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 8b67b5db30
							
							spirom: fix SPI ROM I/O and data downloading | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 29a9876c39
							
							USB: I/O standards adjustment | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 9471dad838
							
							Move date stamp generation to fpga build; record SDRAM checksum | 3 سال پیش | 
				
					
						|  H. Peter Anvin | adf6c39024
							
							serial: simplify physical tty and make BREAK reset work | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 7462426469
							
							usb: use showahead on the Rx FIFO, but not the Tx FIFO | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 808ba7c43c
							
							usb: use a direct interface between the CPU and the USB FIFOs | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 92d18543b8
							
							tty: don't require DTR#; v2: output some clocks on gpio[135] | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 60be2e1201
							
							v2: v2 has a 16 MHz oscillator instead of 48 MHz | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 08d8d7d2c8
							
							More cleanups of multi-version... still broken?! | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 344ccf56d4
							
							Fixes for dual version generator | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 6db45e74e6
							
							WIP: build both v1 and v2 | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 75a6dbc7fa
							
							fpga: infrastructure for building v1 and v2 FPGA | 3 سال پیش | 
				
					
						|  H. Peter Anvin | c21293d687
							
							usb: use generated USB descriptors | 3 سال پیش | 
				
					
						|  H. Peter Anvin | a99616cbc5
							
							WIP: restructure USB using interfaces to be able to create more endpoints | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 3dfb6626a1
							
							More clock tree changes; fix rng oscillator sources | 3 سال پیش | 
				
					
						|  H. Peter Anvin | ac8a492ba2
							
							sdram: fix 8-bit ports; rename fw/ to rv32/ to avoid confusion | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 980eaf0400
							
							Restructure clock tree; better sdram timing; random number generator | 3 سال پیش | 
				
					
						|  H. Peter Anvin | cc37f87c67
							
							sdram: rewrite as parameterized ports; usb: add USB core for testing | 3 سال پیش | 
				
					
						|  H. Peter Anvin | 0edc64a9c8
							
							abcio, abcdisk: revamp callback interface, fix abcdisk state machine | 4 سال پیش | 
				
					
						|  H. Peter Anvin | 4a0966e759
							
							abcbus: put the I/O status register (INP 1) in a separate SRAM | 4 سال پیش | 
				
					
						|  H. Peter Anvin | ec99762a84
							
							Use waitirq rather than suspending a memory transaction for SD card | 4 سال پیش | 
				
					
						|  H. Peter Anvin | 56753cd6a3
							
							abcbus: move abcbus to separate module; add I/O status register | 4 سال پیش | 
				
					
						|  H. Peter Anvin | f6f9bf7ede
							
							Add i2c unit | 4 سال پیش | 
				
					
						|  H. Peter Anvin | 8368aa9534
							
							fpga: parameterize the rtc_32khz workaround | 4 سال پیش | 
				
					
						|  H. Peter Anvin | c40501f76e
							
							SDRAM access from the ABC-bus | 4 سال پیش |