|  H. Peter Anvin | 8b67b5db30
							
							spirom: fix SPI ROM I/O and data downloading | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 8eec9b9e0a
							
							Timing improvements; allow SRAM to be read over JTAG | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 60be2e1201
							
							v2: v2 has a 16 MHz oscillator instead of 48 MHz | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 81633591fa
							
							v2: abc_host and abc_a_oe are redundant and unified in v2 | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 6db45e74e6
							
							WIP: build both v1 and v2 | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 4e65673781
							
							spirom: add support for sending arbitrary SPI commands | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 3dfb6626a1
							
							More clock tree changes; fix rng oscillator sources | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 980eaf0400
							
							Restructure clock tree; better sdram timing; random number generator | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | cc37f87c67
							
							sdram: rewrite as parameterized ports; usb: add USB core for testing | %!s(int64=3) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | dd69eafb99
							
							Many timing fixes; better IRQ handling for abcbus | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 8368aa9534
							
							fpga: parameterize the rtc_32khz workaround | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 996bd201be
							
							Timing improvements: wait state for iodev, fix handling of sr_clk | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 8a937a6f83
							
							sdcard: now talking to the SD card; driver fixes still needed | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 72af3bd711
							
							max80.sdc: multicycle path between sdram_clk and sr_clk (why?) | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | a7b663743d
							
							max80.sdc: add back output delay for sr_clk | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 6b7c85430e
							
							sdram: I/O timing tweaks, hopefully for the better... | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 16e9576297
							
							fpga: make the SDRAM work! | %!s(int64=4) %!d(string=hai) anos | 
				
					
						|  H. Peter Anvin | 062a3d9eb1
							
							Reorganize tree so a single Makefile can do the right thing | %!s(int64=4) %!d(string=hai) anos |