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max80_fw
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max80_fw
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fpga
H. Peter Anvin 06f36dc8f0 Merge remote-tracking branch 'origin/main' into slow vor 3 Jahren
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ip 06f36dc8f0 Merge remote-tracking branch 'origin/main' into slow vor 3 Jahren
output 06f36dc8f0 Merge remote-tracking branch 'origin/main' into slow vor 3 Jahren
scripts 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA vor 3 Jahren
simulation f24cac3c43 fpga: lint code to make ModelSim RTL simulation work again vor 3 Jahren
usb 808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs vor 3 Jahren
.gitignore 344ccf56d4 Fixes for dual version generator vor 3 Jahren
Makefile 6db45e74e6 WIP: build both v1 and v2 vor 3 Jahren
abcbus.sv 81633591fa v2: abc_host and abc_a_oe are redundant and unified in v2 vor 3 Jahren
assignment_defaults.qdf 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA vor 3 Jahren
clkbuf.sv 808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs vor 3 Jahren
fast_mem.sv dd69eafb99 Many timing fixes; better IRQ handling for abcbus vor 3 Jahren
functions.sv f2060589ab Default baud rate = 115200, baud rate programmable vor 3 Jahren
i2c.sv 4970fb6ef6 rtc: issue dummy clock cycles if SDA appears stuck vor 3 Jahren
iodevs.vh 7c7d4cd52c usb: set the device serial number vor 3 Jahren
max80-v1.cof 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA vor 3 Jahren
max80-v2.cof 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA vor 3 Jahren
max80.qpf 808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs vor 3 Jahren
max80.qsf 808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs vor 3 Jahren
max80.sdc 60be2e1201 v2: v2 has a 16 MHz oscillator instead of 48 MHz vor 3 Jahren
max80.sv 06f36dc8f0 Merge remote-tracking branch 'origin/main' into slow vor 3 Jahren
picorv32.v 372899ea3b Move most code to SDRAM; fix problems with code in SDRAM; cleanups vor 3 Jahren
rng.sv de1566292f clocks: centralize strobes; rng: shut down when not in use vor 3 Jahren
sdcard.sv ec99762a84 Use waitirq rather than suspending a memory transaction for SD card vor 3 Jahren
sdram.sv 63c8bc2ec8 sdram: fix signal timing that broke dram bss zeroing. vor 3 Jahren
spi_master.sv 062a3d9eb1 Reorganize tree so a single Makefile can do the right thing vor 3 Jahren
spirom.sv 808ba7c43c usb: use a direct interface between the CPU and the USB FIFOs vor 3 Jahren
synchro.sv 4e65673781 spirom: add support for sending arbitrary SPI commands vor 3 Jahren
sysclock.sv 3dfb6626a1 More clock tree changes; fix rng oscillator sources vor 3 Jahren
tmdsenc.sv 74d9da52b0 hdmi/tmds: fix symbol data ordering vor 3 Jahren
transpose.sv 510e702728 video: initial simple video generator; add support for HDMI TERC4 vor 3 Jahren
tty.sv 6ae39aaf12 Make romcopy device programmable and able to zero memory vor 3 Jahren
v1.pins 6db45e74e6 WIP: build both v1 and v2 vor 3 Jahren
v1.qsf 08d8d7d2c8 More cleanups of multi-version... still broken?! vor 3 Jahren
v1.sv 60be2e1201 v2: v2 has a 16 MHz oscillator instead of 48 MHz vor 3 Jahren
v1_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA vor 3 Jahren
v2.pins 60be2e1201 v2: v2 has a 16 MHz oscillator instead of 48 MHz vor 3 Jahren
v2.qsf 08d8d7d2c8 More cleanups of multi-version... still broken?! vor 3 Jahren
v2.sv 92d18543b8 tty: don't require DTR#; v2: output some clocks on gpio[135] vor 3 Jahren
v2_description.txt 75a6dbc7fa fpga: infrastructure for building v1 and v2 FPGA vor 3 Jahren
video.sv 980eaf0400 Restructure clock tree; better sdram timing; random number generator vor 3 Jahren